MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/mbed_overrides.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16
sahilmgandhi 18:6a4db94011d3 17 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19 /* No init flash in this version, 2015/10/27 */
sahilmgandhi 18:6a4db94011d3 20 #if 0
sahilmgandhi 18:6a4db94011d3 21 #define SPIM1_SCK_PIN 11u /**< SPI clock GPIO pin number. */
sahilmgandhi 18:6a4db94011d3 22 #define SPIM1_MOSI_PIN 15u /**< SPI Master Out Slave In GPIO pin number. */
sahilmgandhi 18:6a4db94011d3 23 #define SPIM1_MISO_PIN 9u /**< SPI Master In Slave Out GPIO pin number. */
sahilmgandhi 18:6a4db94011d3 24 #define SPIM1_SS_PIN 28u /**< SPI Slave Select GPIO pin number. */
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 #define CMD_POWER_UP (0xAB)
sahilmgandhi 18:6a4db94011d3 27 #define CMD_POWER_DOWN (0xB9)
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 void flash_init(void)
sahilmgandhi 18:6a4db94011d3 30 {
sahilmgandhi 18:6a4db94011d3 31 NRF_GPIO->PIN_CNF[SPIM1_MOSI_PIN] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 32 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 33 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 34 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 35 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 36 NRF_GPIO->PIN_CNF[SPIM1_MISO_PIN] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 37 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 38 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 39 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 40 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 41 NRF_GPIO->PIN_CNF[SPIM1_SCK_PIN] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 42 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 43 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 44 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 45 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 46
sahilmgandhi 18:6a4db94011d3 47 NRF_GPIO->PIN_CNF[SPIM1_SS_PIN] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 48 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 49 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 50 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 51 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 52 //cs = 1;
sahilmgandhi 18:6a4db94011d3 53 NRF_GPIO->OUTSET = (GPIO_OUTSET_PIN28_High << GPIO_OUTSET_PIN28_Pos);
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 NRF_SPI1->ENABLE = 1;
sahilmgandhi 18:6a4db94011d3 56 NRF_SPI1->PSELSCK = SPIM1_SCK_PIN;
sahilmgandhi 18:6a4db94011d3 57 NRF_SPI1->PSELMOSI = SPIM1_MISO_PIN;
sahilmgandhi 18:6a4db94011d3 58 NRF_SPI1->PSELMISO = SPIM1_MOSI_PIN;
sahilmgandhi 18:6a4db94011d3 59 //spi.frequency(1000000);
sahilmgandhi 18:6a4db94011d3 60 NRF_SPI1->FREQUENCY = 0x10000000; //1MHz
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 //spi.format(8,0);
sahilmgandhi 18:6a4db94011d3 63 uint32_t config_mode = 0;
sahilmgandhi 18:6a4db94011d3 64 config_mode = (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos); //mode 0
sahilmgandhi 18:6a4db94011d3 65 NRF_SPI1->CONFIG = (config_mode | (SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos));
sahilmgandhi 18:6a4db94011d3 66 //cs = 0;
sahilmgandhi 18:6a4db94011d3 67 NRF_GPIO->OUTCLR = (GPIO_OUTCLR_PIN28_Clear << GPIO_OUTCLR_PIN28_Pos);
sahilmgandhi 18:6a4db94011d3 68 //spi.write(CMD_POWER_UP);
sahilmgandhi 18:6a4db94011d3 69 while (!NRF_SPI1->EVENTS_READY == 0) {
sahilmgandhi 18:6a4db94011d3 70 }
sahilmgandhi 18:6a4db94011d3 71 NRF_SPI1->TXD = (uint32_t)CMD_POWER_UP;
sahilmgandhi 18:6a4db94011d3 72 while (!NRF_SPI1->EVENTS_READY == 1) {
sahilmgandhi 18:6a4db94011d3 73 }
sahilmgandhi 18:6a4db94011d3 74 NRF_SPI1->EVENTS_READY = 0;
sahilmgandhi 18:6a4db94011d3 75 NRF_SPI1->RXD;
sahilmgandhi 18:6a4db94011d3 76 //wait_ms(30);
sahilmgandhi 18:6a4db94011d3 77 // Deselect the device
sahilmgandhi 18:6a4db94011d3 78 //cs = 1;
sahilmgandhi 18:6a4db94011d3 79 NRF_GPIO->OUTSET = (GPIO_OUTSET_PIN28_High << GPIO_OUTSET_PIN28_Pos);
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 }
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 void flash_powerDown(void)
sahilmgandhi 18:6a4db94011d3 84 {
sahilmgandhi 18:6a4db94011d3 85 NRF_GPIO->OUTCLR = (GPIO_OUTCLR_PIN28_Clear << GPIO_OUTCLR_PIN28_Pos);
sahilmgandhi 18:6a4db94011d3 86 //spi.write(CMD_POWER_DOWN);
sahilmgandhi 18:6a4db94011d3 87 while (!NRF_SPI1->EVENTS_READY == 0) {
sahilmgandhi 18:6a4db94011d3 88 }
sahilmgandhi 18:6a4db94011d3 89 NRF_SPI1->TXD = (uint32_t)CMD_POWER_DOWN;
sahilmgandhi 18:6a4db94011d3 90 while (!NRF_SPI1->EVENTS_READY == 1) {
sahilmgandhi 18:6a4db94011d3 91 }
sahilmgandhi 18:6a4db94011d3 92 NRF_SPI1->EVENTS_READY = 0;
sahilmgandhi 18:6a4db94011d3 93 NRF_SPI1->RXD;
sahilmgandhi 18:6a4db94011d3 94 NRF_GPIO->OUTSET = (GPIO_OUTSET_PIN28_High << GPIO_OUTSET_PIN28_Pos);
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 //wait for sleep
sahilmgandhi 18:6a4db94011d3 97 //wait_us(3);
sahilmgandhi 18:6a4db94011d3 98 }
sahilmgandhi 18:6a4db94011d3 99 /* No init flash in this version, 2015/10/27 */
sahilmgandhi 18:6a4db94011d3 100 #endif
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 void mbed_sdk_init()
sahilmgandhi 18:6a4db94011d3 103 {
sahilmgandhi 18:6a4db94011d3 104 // Default SWIO setting, pull SWIO(p19) to low for turning antenna switch to BLE radiated path
sahilmgandhi 18:6a4db94011d3 105 NRF_GPIO->PIN_CNF[19] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 106 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 107 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 108 | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 109 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 NRF_GPIO->OUTCLR = (GPIO_OUTCLR_PIN19_Clear << GPIO_OUTCLR_PIN19_Pos);
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 // Config External Crystal to 32MHz
sahilmgandhi 18:6a4db94011d3 114 NRF_CLOCK->XTALFREQ = 0x00;
sahilmgandhi 18:6a4db94011d3 115 NRF_CLOCK->EVENTS_HFCLKSTARTED = 0;
sahilmgandhi 18:6a4db94011d3 116 NRF_CLOCK->TASKS_HFCLKSTART = 1;
sahilmgandhi 18:6a4db94011d3 117 while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0)
sahilmgandhi 18:6a4db94011d3 118 {// Do nothing.
sahilmgandhi 18:6a4db94011d3 119 }
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 /* No init flash in this version, 2015/10/27 */
sahilmgandhi 18:6a4db94011d3 122 // flash_init();
sahilmgandhi 18:6a4db94011d3 123 //
sahilmgandhi 18:6a4db94011d3 124 // //nrf_delay_ms(10);
sahilmgandhi 18:6a4db94011d3 125 // flash_powerDown();
sahilmgandhi 18:6a4db94011d3 126 /* No init flash in this version, 2015/10/27 */
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 }