MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Maxim/TARGET_MAX32625/objects.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*******************************************************************************
sahilmgandhi 18:6a4db94011d3 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Permission is hereby granted, free of charge, to any person obtaining a
sahilmgandhi 18:6a4db94011d3 5 * copy of this software and associated documentation files (the "Software"),
sahilmgandhi 18:6a4db94011d3 6 * to deal in the Software without restriction, including without limitation
sahilmgandhi 18:6a4db94011d3 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
sahilmgandhi 18:6a4db94011d3 8 * and/or sell copies of the Software, and to permit persons to whom the
sahilmgandhi 18:6a4db94011d3 9 * Software is furnished to do so, subject to the following conditions:
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * The above copyright notice and this permission notice shall be included
sahilmgandhi 18:6a4db94011d3 12 * in all copies or substantial portions of the Software.
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
sahilmgandhi 18:6a4db94011d3 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
sahilmgandhi 18:6a4db94011d3 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
sahilmgandhi 18:6a4db94011d3 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
sahilmgandhi 18:6a4db94011d3 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
sahilmgandhi 18:6a4db94011d3 20 * OTHER DEALINGS IN THE SOFTWARE.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 * Except as contained in this notice, the name of Maxim Integrated
sahilmgandhi 18:6a4db94011d3 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
sahilmgandhi 18:6a4db94011d3 24 * Products, Inc. Branding Policy.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * The mere transfer of this software does not imply any licenses
sahilmgandhi 18:6a4db94011d3 27 * of trade secrets, proprietary technology, copyrights, patents,
sahilmgandhi 18:6a4db94011d3 28 * trademarks, maskwork rights, or any other form of intellectual
sahilmgandhi 18:6a4db94011d3 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
sahilmgandhi 18:6a4db94011d3 30 * ownership rights.
sahilmgandhi 18:6a4db94011d3 31 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 32 */
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #ifndef MBED_OBJECTS_H
sahilmgandhi 18:6a4db94011d3 35 #define MBED_OBJECTS_H
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 38 #include "PortNames.h"
sahilmgandhi 18:6a4db94011d3 39 #include "PeripheralNames.h"
sahilmgandhi 18:6a4db94011d3 40 #include "PinNames.h"
sahilmgandhi 18:6a4db94011d3 41 #include "gpio_object.h"
sahilmgandhi 18:6a4db94011d3 42 #include "gpio_regs.h"
sahilmgandhi 18:6a4db94011d3 43 #include "uart_regs.h"
sahilmgandhi 18:6a4db94011d3 44 #include "i2cm_regs.h"
sahilmgandhi 18:6a4db94011d3 45 #include "spim_regs.h"
sahilmgandhi 18:6a4db94011d3 46 #include "pt_regs.h"
sahilmgandhi 18:6a4db94011d3 47 #include "adc_regs.h"
sahilmgandhi 18:6a4db94011d3 48 #include "uart.h"
sahilmgandhi 18:6a4db94011d3 49 #include "adc.h"
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 52 extern "C" {
sahilmgandhi 18:6a4db94011d3 53 #endif
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 struct port_s {
sahilmgandhi 18:6a4db94011d3 56 PortName port;
sahilmgandhi 18:6a4db94011d3 57 uint32_t mask;
sahilmgandhi 18:6a4db94011d3 58 __IO uint32_t *reg_out;
sahilmgandhi 18:6a4db94011d3 59 __I uint32_t *reg_in;
sahilmgandhi 18:6a4db94011d3 60 PinMode mode;
sahilmgandhi 18:6a4db94011d3 61 };
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 struct gpio_irq_s {
sahilmgandhi 18:6a4db94011d3 64 uint8_t port;
sahilmgandhi 18:6a4db94011d3 65 uint8_t pin;
sahilmgandhi 18:6a4db94011d3 66 uint8_t rise_en;
sahilmgandhi 18:6a4db94011d3 67 uint8_t fall_en;
sahilmgandhi 18:6a4db94011d3 68 uint32_t id;
sahilmgandhi 18:6a4db94011d3 69 };
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 struct serial_s {
sahilmgandhi 18:6a4db94011d3 72 int index;
sahilmgandhi 18:6a4db94011d3 73 mxc_uart_regs_t *uart;
sahilmgandhi 18:6a4db94011d3 74 mxc_uart_fifo_regs_t *fifo;
sahilmgandhi 18:6a4db94011d3 75 uint32_t id;
sahilmgandhi 18:6a4db94011d3 76 uart_cfg_t cfg;
sahilmgandhi 18:6a4db94011d3 77 sys_cfg_uart_t sys_cfg;
sahilmgandhi 18:6a4db94011d3 78 PinName tx;
sahilmgandhi 18:6a4db94011d3 79 PinName rx;
sahilmgandhi 18:6a4db94011d3 80 };
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 struct i2c_s {
sahilmgandhi 18:6a4db94011d3 83 mxc_i2cm_regs_t *i2c;
sahilmgandhi 18:6a4db94011d3 84 mxc_i2cm_fifo_regs_t *fifo;
sahilmgandhi 18:6a4db94011d3 85 int start_pending;
sahilmgandhi 18:6a4db94011d3 86 };
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 struct spi_s {
sahilmgandhi 18:6a4db94011d3 89 int index;
sahilmgandhi 18:6a4db94011d3 90 mxc_spim_regs_t *spi;
sahilmgandhi 18:6a4db94011d3 91 };
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 struct pwmout_s {
sahilmgandhi 18:6a4db94011d3 94 mxc_pt_regs_t *pwm;
sahilmgandhi 18:6a4db94011d3 95 int period;
sahilmgandhi 18:6a4db94011d3 96 int pulse_width;
sahilmgandhi 18:6a4db94011d3 97 };
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 struct analogin_s {
sahilmgandhi 18:6a4db94011d3 100 mxc_adc_regs_t *adc;
sahilmgandhi 18:6a4db94011d3 101 mxc_adc_chsel_t channel;
sahilmgandhi 18:6a4db94011d3 102 };
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 typedef struct {
sahilmgandhi 18:6a4db94011d3 105 volatile uint32_t *reg_req;
sahilmgandhi 18:6a4db94011d3 106 volatile uint32_t *reg_ack;
sahilmgandhi 18:6a4db94011d3 107 uint32_t req_val;
sahilmgandhi 18:6a4db94011d3 108 uint32_t ack_mask;
sahilmgandhi 18:6a4db94011d3 109 } pin_function_t;
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 112 }
sahilmgandhi 18:6a4db94011d3 113 #endif
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 #endif
sahilmgandhi 18:6a4db94011d3 116