MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM4/serial_api.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2015 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #include <string.h>
sahilmgandhi 18:6a4db94011d3 17 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 18 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 19 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 20 #include "sysclk.h"
sahilmgandhi 18:6a4db94011d3 21 #include "serial_platform.h"
sahilmgandhi 18:6a4db94011d3 22 #include "ioport.h"
sahilmgandhi 18:6a4db94011d3 23 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 24 #include "PeripheralPins.h"
sahilmgandhi 18:6a4db94011d3 25 #include "pdc.h"
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 #if DEVICE_SERIAL_ASYNCH
sahilmgandhi 18:6a4db94011d3 28 #define pUSART_S(obj) obj->serial.uart
sahilmgandhi 18:6a4db94011d3 29 #define pSERIAL_S(obj) ((struct serial_s*)&(obj->serial))
sahilmgandhi 18:6a4db94011d3 30 #else
sahilmgandhi 18:6a4db94011d3 31 #define pUSART_S(obj) obj->uart
sahilmgandhi 18:6a4db94011d3 32 #define pSERIAL_S(obj) ((struct serial_s*)obj)
sahilmgandhi 18:6a4db94011d3 33 #endif
sahilmgandhi 18:6a4db94011d3 34 #define _USART(obj) ((Usart*)pUSART_S(obj))
sahilmgandhi 18:6a4db94011d3 35 #define USART_NUM 8
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 static uint8_t serial_get_index(serial_t *obj);
sahilmgandhi 18:6a4db94011d3 38 static IRQn_Type get_serial_irq_num (serial_t *obj);
sahilmgandhi 18:6a4db94011d3 39 static uint32_t get_serial_vector (serial_t *obj);
sahilmgandhi 18:6a4db94011d3 40 static uint32_t serial_irq_ids[USART_NUM] = {0};
sahilmgandhi 18:6a4db94011d3 41 static uart_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 42 static void uart0_irq(void);
sahilmgandhi 18:6a4db94011d3 43 static void uart1_irq(void);
sahilmgandhi 18:6a4db94011d3 44 static void uart2_irq(void);
sahilmgandhi 18:6a4db94011d3 45 static void uart3_irq(void);
sahilmgandhi 18:6a4db94011d3 46 static void uart4_irq(void);
sahilmgandhi 18:6a4db94011d3 47 static void uart5_irq(void);
sahilmgandhi 18:6a4db94011d3 48 static void uart6_irq(void);
sahilmgandhi 18:6a4db94011d3 49 static void uart7_irq(void);
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 int stdio_uart_inited = 0;
sahilmgandhi 18:6a4db94011d3 53 serial_t stdio_uart;
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 extern uint8_t g_sys_init;
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 static int get_usart_clock_id(UARTName peripheral)
sahilmgandhi 18:6a4db94011d3 58 {
sahilmgandhi 18:6a4db94011d3 59 int cid;
sahilmgandhi 18:6a4db94011d3 60 switch (peripheral) {
sahilmgandhi 18:6a4db94011d3 61 case UART_0:
sahilmgandhi 18:6a4db94011d3 62 cid = ID_FLEXCOM0;
sahilmgandhi 18:6a4db94011d3 63 break;
sahilmgandhi 18:6a4db94011d3 64 case UART_1:
sahilmgandhi 18:6a4db94011d3 65 cid = ID_FLEXCOM1;
sahilmgandhi 18:6a4db94011d3 66 break;
sahilmgandhi 18:6a4db94011d3 67 case UART_2:
sahilmgandhi 18:6a4db94011d3 68 cid = ID_FLEXCOM2;
sahilmgandhi 18:6a4db94011d3 69 break;
sahilmgandhi 18:6a4db94011d3 70 case UART_3:
sahilmgandhi 18:6a4db94011d3 71 cid = ID_FLEXCOM3;
sahilmgandhi 18:6a4db94011d3 72 break;
sahilmgandhi 18:6a4db94011d3 73 case UART_4:
sahilmgandhi 18:6a4db94011d3 74 cid = ID_FLEXCOM4;
sahilmgandhi 18:6a4db94011d3 75 break;
sahilmgandhi 18:6a4db94011d3 76 case UART_5:
sahilmgandhi 18:6a4db94011d3 77 cid = ID_FLEXCOM5;
sahilmgandhi 18:6a4db94011d3 78 break;
sahilmgandhi 18:6a4db94011d3 79 case UART_6:
sahilmgandhi 18:6a4db94011d3 80 cid = ID_FLEXCOM6;
sahilmgandhi 18:6a4db94011d3 81 break;
sahilmgandhi 18:6a4db94011d3 82 case UART_7:
sahilmgandhi 18:6a4db94011d3 83 cid = ID_FLEXCOM7;
sahilmgandhi 18:6a4db94011d3 84 break;
sahilmgandhi 18:6a4db94011d3 85 default :
sahilmgandhi 18:6a4db94011d3 86 cid = NC;
sahilmgandhi 18:6a4db94011d3 87 break;
sahilmgandhi 18:6a4db94011d3 88 }
sahilmgandhi 18:6a4db94011d3 89 return cid;
sahilmgandhi 18:6a4db94011d3 90 }
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 static int get_flexcom_id(UARTName peripheral)
sahilmgandhi 18:6a4db94011d3 93 {
sahilmgandhi 18:6a4db94011d3 94 int fid;
sahilmgandhi 18:6a4db94011d3 95 switch (peripheral) {
sahilmgandhi 18:6a4db94011d3 96 case UART_0:
sahilmgandhi 18:6a4db94011d3 97 fid = (int)FLEXCOM0;
sahilmgandhi 18:6a4db94011d3 98 break;
sahilmgandhi 18:6a4db94011d3 99 case UART_1:
sahilmgandhi 18:6a4db94011d3 100 fid = (int)FLEXCOM1;
sahilmgandhi 18:6a4db94011d3 101 break;
sahilmgandhi 18:6a4db94011d3 102 case UART_2:
sahilmgandhi 18:6a4db94011d3 103 fid = (int)FLEXCOM2;
sahilmgandhi 18:6a4db94011d3 104 break;
sahilmgandhi 18:6a4db94011d3 105 case UART_3:
sahilmgandhi 18:6a4db94011d3 106 fid = (int)FLEXCOM3;
sahilmgandhi 18:6a4db94011d3 107 break;
sahilmgandhi 18:6a4db94011d3 108 case UART_4:
sahilmgandhi 18:6a4db94011d3 109 fid = (int)FLEXCOM4;
sahilmgandhi 18:6a4db94011d3 110 break;
sahilmgandhi 18:6a4db94011d3 111 case UART_5:
sahilmgandhi 18:6a4db94011d3 112 fid = (int)FLEXCOM5;
sahilmgandhi 18:6a4db94011d3 113 break;
sahilmgandhi 18:6a4db94011d3 114 case UART_6:
sahilmgandhi 18:6a4db94011d3 115 fid = (int)FLEXCOM6;
sahilmgandhi 18:6a4db94011d3 116 break;
sahilmgandhi 18:6a4db94011d3 117 case UART_7:
sahilmgandhi 18:6a4db94011d3 118 fid = (int)FLEXCOM7;
sahilmgandhi 18:6a4db94011d3 119 break;
sahilmgandhi 18:6a4db94011d3 120 default :
sahilmgandhi 18:6a4db94011d3 121 fid = NC;
sahilmgandhi 18:6a4db94011d3 122 break;
sahilmgandhi 18:6a4db94011d3 123 }
sahilmgandhi 18:6a4db94011d3 124 return fid;
sahilmgandhi 18:6a4db94011d3 125 }
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 void serial_init(serial_t *obj, PinName tx, PinName rx)
sahilmgandhi 18:6a4db94011d3 128 {
sahilmgandhi 18:6a4db94011d3 129 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 130 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 131 int clockid = NC, flexcom = NC;
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 /*To determine the uart peripheral associated with pins*/
sahilmgandhi 18:6a4db94011d3 134 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 135 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 136 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 MBED_ASSERT(uart != (UARTName)NC);
sahilmgandhi 18:6a4db94011d3 139
sahilmgandhi 18:6a4db94011d3 140 if (g_sys_init == 0) {
sahilmgandhi 18:6a4db94011d3 141 sysclk_init();
sahilmgandhi 18:6a4db94011d3 142 system_board_init();
sahilmgandhi 18:6a4db94011d3 143 g_sys_init = 1;
sahilmgandhi 18:6a4db94011d3 144 }
sahilmgandhi 18:6a4db94011d3 145 pUSART_S(obj) = uart;
sahilmgandhi 18:6a4db94011d3 146 pSERIAL_S(obj)->uart_serial_options.baudrate = (9600UL);
sahilmgandhi 18:6a4db94011d3 147 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_8_BIT;
sahilmgandhi 18:6a4db94011d3 148 pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_NO;
sahilmgandhi 18:6a4db94011d3 149 pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_1_BIT;
sahilmgandhi 18:6a4db94011d3 150 pSERIAL_S(obj)->actrec = false;
sahilmgandhi 18:6a4db94011d3 151 pSERIAL_S(obj)->acttra = false;
sahilmgandhi 18:6a4db94011d3 152
sahilmgandhi 18:6a4db94011d3 153 /* Configure UART pins */
sahilmgandhi 18:6a4db94011d3 154 if(tx != NC) {
sahilmgandhi 18:6a4db94011d3 155 pin_function(tx, pinmap_find_function(tx, PinMap_UART_TX));
sahilmgandhi 18:6a4db94011d3 156 ioport_disable_pin(tx);
sahilmgandhi 18:6a4db94011d3 157 }
sahilmgandhi 18:6a4db94011d3 158 if(rx != NC) {
sahilmgandhi 18:6a4db94011d3 159 pin_function(rx, pinmap_find_function(rx, PinMap_UART_RX));
sahilmgandhi 18:6a4db94011d3 160 ioport_disable_pin(rx);
sahilmgandhi 18:6a4db94011d3 161 }
sahilmgandhi 18:6a4db94011d3 162 clockid = get_usart_clock_id(uart);
sahilmgandhi 18:6a4db94011d3 163 if (clockid != NC) {
sahilmgandhi 18:6a4db94011d3 164 sysclk_enable_peripheral_clock(clockid);
sahilmgandhi 18:6a4db94011d3 165 }
sahilmgandhi 18:6a4db94011d3 166
sahilmgandhi 18:6a4db94011d3 167 flexcom = (int)get_flexcom_id(uart);
sahilmgandhi 18:6a4db94011d3 168 #if (!SAM4L)
sahilmgandhi 18:6a4db94011d3 169 #if (SAMG55)
sahilmgandhi 18:6a4db94011d3 170 /* Configure flexcom for usart */
sahilmgandhi 18:6a4db94011d3 171 flexcom_enable((Flexcom* )flexcom);
sahilmgandhi 18:6a4db94011d3 172 flexcom_set_opmode((Flexcom* )flexcom, FLEXCOM_USART);
sahilmgandhi 18:6a4db94011d3 173 #else
sahilmgandhi 18:6a4db94011d3 174 sysclk_enable_peripheral_clock(clockid);
sahilmgandhi 18:6a4db94011d3 175 #endif
sahilmgandhi 18:6a4db94011d3 176 /* Configure USART */
sahilmgandhi 18:6a4db94011d3 177 usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options),
sahilmgandhi 18:6a4db94011d3 178 sysclk_get_peripheral_hz());
sahilmgandhi 18:6a4db94011d3 179 #endif
sahilmgandhi 18:6a4db94011d3 180 #if (SAM4L)
sahilmgandhi 18:6a4db94011d3 181 sysclk_enable_peripheral_clock(clockid);
sahilmgandhi 18:6a4db94011d3 182 /* Configure USART */
sahilmgandhi 18:6a4db94011d3 183 usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options, sysclk_get_peripheral_bus_hz((Usart*)uart));
sahilmgandhi 18:6a4db94011d3 184 #endif
sahilmgandhi 18:6a4db94011d3 185 /* Disable rx and tx in case 1 line only required to be configured for usart */
sahilmgandhi 18:6a4db94011d3 186 usart_disable_tx((Usart*)uart);
sahilmgandhi 18:6a4db94011d3 187 usart_disable_rx((Usart*)uart);
sahilmgandhi 18:6a4db94011d3 188 /* Enable the receiver and transmitter. */
sahilmgandhi 18:6a4db94011d3 189 if(tx != NC) {
sahilmgandhi 18:6a4db94011d3 190 usart_enable_tx((Usart*)uart);
sahilmgandhi 18:6a4db94011d3 191 }
sahilmgandhi 18:6a4db94011d3 192 if(rx != NC) {
sahilmgandhi 18:6a4db94011d3 193 usart_enable_rx((Usart*)uart);
sahilmgandhi 18:6a4db94011d3 194 }
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196 if(uart == STDIO_UART) {
sahilmgandhi 18:6a4db94011d3 197 stdio_uart_inited = 1;
sahilmgandhi 18:6a4db94011d3 198 memcpy(&stdio_uart, obj, sizeof(serial_t));
sahilmgandhi 18:6a4db94011d3 199 }
sahilmgandhi 18:6a4db94011d3 200 }
sahilmgandhi 18:6a4db94011d3 201
sahilmgandhi 18:6a4db94011d3 202 void serial_free(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 203 {
sahilmgandhi 18:6a4db94011d3 204 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 205 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 206 usart_reset(_USART(obj));
sahilmgandhi 18:6a4db94011d3 207 }
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 void serial_baud(serial_t *obj, int baudrate)
sahilmgandhi 18:6a4db94011d3 210 {
sahilmgandhi 18:6a4db94011d3 211 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 212 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 213 MBED_ASSERT((baudrate == 110) || (baudrate == 150) || (baudrate == 300) || (baudrate == 1200) ||
sahilmgandhi 18:6a4db94011d3 214 (baudrate == 2400) || (baudrate == 4800) || (baudrate == 9600) || (baudrate == 19200) || (baudrate == 38400) ||
sahilmgandhi 18:6a4db94011d3 215 (baudrate == 57600) || (baudrate == 115200) || (baudrate == 230400) || (baudrate == 460800) || (baudrate == 921600) );
sahilmgandhi 18:6a4db94011d3 216 uint32_t clockid = 0;
sahilmgandhi 18:6a4db94011d3 217 clockid = get_usart_clock_id(pUSART_S(obj));
sahilmgandhi 18:6a4db94011d3 218 if (clockid != (uint32_t)NC) {
sahilmgandhi 18:6a4db94011d3 219 sysclk_disable_peripheral_clock(clockid);
sahilmgandhi 18:6a4db94011d3 220 }
sahilmgandhi 18:6a4db94011d3 221 pSERIAL_S(obj)->uart_serial_options.baudrate = baudrate;
sahilmgandhi 18:6a4db94011d3 222 usart_serial_init(_USART(obj), &(pSERIAL_S(obj)->uart_serial_options));
sahilmgandhi 18:6a4db94011d3 223 sysclk_enable_peripheral_clock(clockid);
sahilmgandhi 18:6a4db94011d3 224 }
sahilmgandhi 18:6a4db94011d3 225
sahilmgandhi 18:6a4db94011d3 226 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
sahilmgandhi 18:6a4db94011d3 227 {
sahilmgandhi 18:6a4db94011d3 228 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 229 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 230 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
sahilmgandhi 18:6a4db94011d3 231 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
sahilmgandhi 18:6a4db94011d3 232 MBED_ASSERT((data_bits == 5) || (data_bits == 6) || (data_bits == 7) || (data_bits == 8));
sahilmgandhi 18:6a4db94011d3 233
sahilmgandhi 18:6a4db94011d3 234 uint32_t clockid = 0;
sahilmgandhi 18:6a4db94011d3 235 clockid = get_usart_clock_id(pUSART_S(obj));
sahilmgandhi 18:6a4db94011d3 236 if (clockid != (uint32_t)NC) {
sahilmgandhi 18:6a4db94011d3 237 sysclk_disable_peripheral_clock(clockid);
sahilmgandhi 18:6a4db94011d3 238 }
sahilmgandhi 18:6a4db94011d3 239
sahilmgandhi 18:6a4db94011d3 240 switch(stop_bits) { /*selecting the stop bits*/
sahilmgandhi 18:6a4db94011d3 241 case 1:
sahilmgandhi 18:6a4db94011d3 242 pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_1_BIT;
sahilmgandhi 18:6a4db94011d3 243 break;
sahilmgandhi 18:6a4db94011d3 244 case 2:
sahilmgandhi 18:6a4db94011d3 245 pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_2_BIT;
sahilmgandhi 18:6a4db94011d3 246 break;
sahilmgandhi 18:6a4db94011d3 247 }
sahilmgandhi 18:6a4db94011d3 248
sahilmgandhi 18:6a4db94011d3 249 switch(parity) { /*selecting the parity bits*/
sahilmgandhi 18:6a4db94011d3 250 case ParityNone:
sahilmgandhi 18:6a4db94011d3 251 pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_NO;
sahilmgandhi 18:6a4db94011d3 252 break;
sahilmgandhi 18:6a4db94011d3 253 case ParityOdd:
sahilmgandhi 18:6a4db94011d3 254 pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_ODD;
sahilmgandhi 18:6a4db94011d3 255 break;
sahilmgandhi 18:6a4db94011d3 256 case ParityEven:
sahilmgandhi 18:6a4db94011d3 257 pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_EVEN;
sahilmgandhi 18:6a4db94011d3 258 break;
sahilmgandhi 18:6a4db94011d3 259 case ParityForced1: /*No Hardware Support*/
sahilmgandhi 18:6a4db94011d3 260 MBED_ASSERT(0);
sahilmgandhi 18:6a4db94011d3 261 break;
sahilmgandhi 18:6a4db94011d3 262 case ParityForced0: /*No Hardware Support*/
sahilmgandhi 18:6a4db94011d3 263 MBED_ASSERT(0);
sahilmgandhi 18:6a4db94011d3 264 break;
sahilmgandhi 18:6a4db94011d3 265 }
sahilmgandhi 18:6a4db94011d3 266
sahilmgandhi 18:6a4db94011d3 267 switch(data_bits) { /*selecting the data bits*/
sahilmgandhi 18:6a4db94011d3 268 case 5:
sahilmgandhi 18:6a4db94011d3 269 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_5_BIT;
sahilmgandhi 18:6a4db94011d3 270 break;
sahilmgandhi 18:6a4db94011d3 271 case 6:
sahilmgandhi 18:6a4db94011d3 272 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_6_BIT;
sahilmgandhi 18:6a4db94011d3 273 break;
sahilmgandhi 18:6a4db94011d3 274 case 7:
sahilmgandhi 18:6a4db94011d3 275 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_7_BIT;
sahilmgandhi 18:6a4db94011d3 276 break;
sahilmgandhi 18:6a4db94011d3 277 case 8:
sahilmgandhi 18:6a4db94011d3 278 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_8_BIT;
sahilmgandhi 18:6a4db94011d3 279 break;
sahilmgandhi 18:6a4db94011d3 280 }
sahilmgandhi 18:6a4db94011d3 281
sahilmgandhi 18:6a4db94011d3 282 usart_serial_init(_USART(obj), &(pSERIAL_S(obj)->uart_serial_options));
sahilmgandhi 18:6a4db94011d3 283 sysclk_enable_peripheral_clock(clockid);
sahilmgandhi 18:6a4db94011d3 284 }
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 #ifdef DEVICE_SERIAL_FC
sahilmgandhi 18:6a4db94011d3 287
sahilmgandhi 18:6a4db94011d3 288 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
sahilmgandhi 18:6a4db94011d3 289 {
sahilmgandhi 18:6a4db94011d3 290 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 291 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 292
sahilmgandhi 18:6a4db94011d3 293 if(FlowControlNone == type) {
sahilmgandhi 18:6a4db94011d3 294 /* Disable Hardware Handshaking. */
sahilmgandhi 18:6a4db94011d3 295 _USART(obj)->US_MR = (_USART(obj)->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_NORMAL;
sahilmgandhi 18:6a4db94011d3 296 return;
sahilmgandhi 18:6a4db94011d3 297 }
sahilmgandhi 18:6a4db94011d3 298
sahilmgandhi 18:6a4db94011d3 299 /*To determine the uart peripheral associated with pins*/
sahilmgandhi 18:6a4db94011d3 300 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
sahilmgandhi 18:6a4db94011d3 301 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
sahilmgandhi 18:6a4db94011d3 302 UARTName uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
sahilmgandhi 18:6a4db94011d3 303 MBED_ASSERT(uart != (UARTName)NC);
sahilmgandhi 18:6a4db94011d3 304
sahilmgandhi 18:6a4db94011d3 305 if((FlowControlCTS == type) || (FlowControlRTSCTS== type)) {
sahilmgandhi 18:6a4db94011d3 306 /* Configure CTS pin. */
sahilmgandhi 18:6a4db94011d3 307 pin_function(txflow, pinmap_find_function(txflow, PinMap_UART_CTS));
sahilmgandhi 18:6a4db94011d3 308 ioport_disable_pin(txflow);
sahilmgandhi 18:6a4db94011d3 309 }
sahilmgandhi 18:6a4db94011d3 310
sahilmgandhi 18:6a4db94011d3 311 if((FlowControlRTS == type) || (FlowControlRTSCTS== type)) {
sahilmgandhi 18:6a4db94011d3 312 /* Configure CTS pin. */
sahilmgandhi 18:6a4db94011d3 313 pin_function(rxflow, pinmap_find_function(rxflow, PinMap_UART_RTS));
sahilmgandhi 18:6a4db94011d3 314 ioport_disable_pin(rxflow);
sahilmgandhi 18:6a4db94011d3 315 }
sahilmgandhi 18:6a4db94011d3 316
sahilmgandhi 18:6a4db94011d3 317 /* Set hardware handshaking mode. */
sahilmgandhi 18:6a4db94011d3 318 _USART(obj)->US_MR = (_USART(obj)->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_HW_HANDSHAKING;
sahilmgandhi 18:6a4db94011d3 319 }
sahilmgandhi 18:6a4db94011d3 320
sahilmgandhi 18:6a4db94011d3 321 #endif //DEVICE_SERIAL_FC
sahilmgandhi 18:6a4db94011d3 322
sahilmgandhi 18:6a4db94011d3 323 void serial_break_set(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 324 {
sahilmgandhi 18:6a4db94011d3 325 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 326 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 327 _USART(obj)->US_CR = US_CR_STTBRK;
sahilmgandhi 18:6a4db94011d3 328
sahilmgandhi 18:6a4db94011d3 329 }
sahilmgandhi 18:6a4db94011d3 330
sahilmgandhi 18:6a4db94011d3 331 void serial_break_clear(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 332 {
sahilmgandhi 18:6a4db94011d3 333 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 334 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 335 _USART(obj)->US_CR = US_CR_STPBRK;
sahilmgandhi 18:6a4db94011d3 336
sahilmgandhi 18:6a4db94011d3 337 }
sahilmgandhi 18:6a4db94011d3 338
sahilmgandhi 18:6a4db94011d3 339 void serial_pinout_tx(PinName tx)
sahilmgandhi 18:6a4db94011d3 340 {
sahilmgandhi 18:6a4db94011d3 341 pin_function(tx, pinmap_find_function(tx, PinMap_UART_TX));
sahilmgandhi 18:6a4db94011d3 342 ioport_disable_pin(tx);
sahilmgandhi 18:6a4db94011d3 343 }
sahilmgandhi 18:6a4db94011d3 344
sahilmgandhi 18:6a4db94011d3 345 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 346 * INTERRUPTS HANDLING
sahilmgandhi 18:6a4db94011d3 347 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 348
sahilmgandhi 18:6a4db94011d3 349 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
sahilmgandhi 18:6a4db94011d3 350 {
sahilmgandhi 18:6a4db94011d3 351 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 352 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 353 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 354 serial_irq_ids[serial_get_index(obj)] = id;
sahilmgandhi 18:6a4db94011d3 355 }
sahilmgandhi 18:6a4db94011d3 356
sahilmgandhi 18:6a4db94011d3 357 #warning "Interrupt only available for Serial Receive complete. Transmit complete not supported by Controller"
sahilmgandhi 18:6a4db94011d3 358
sahilmgandhi 18:6a4db94011d3 359 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
sahilmgandhi 18:6a4db94011d3 360 {
sahilmgandhi 18:6a4db94011d3 361 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 362 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 363 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 364 uint32_t vector = 0;
sahilmgandhi 18:6a4db94011d3 365
sahilmgandhi 18:6a4db94011d3 366 vector = get_serial_vector(obj);
sahilmgandhi 18:6a4db94011d3 367 irq_n = get_serial_irq_num(obj);
sahilmgandhi 18:6a4db94011d3 368
sahilmgandhi 18:6a4db94011d3 369 if (enable) {
sahilmgandhi 18:6a4db94011d3 370 switch (irq) {
sahilmgandhi 18:6a4db94011d3 371 case RxIrq:
sahilmgandhi 18:6a4db94011d3 372 usart_enable_interrupt(_USART(obj), US_IER_RXRDY);
sahilmgandhi 18:6a4db94011d3 373 break;
sahilmgandhi 18:6a4db94011d3 374 case TxIrq:
sahilmgandhi 18:6a4db94011d3 375 break;
sahilmgandhi 18:6a4db94011d3 376 }
sahilmgandhi 18:6a4db94011d3 377 NVIC_ClearPendingIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 378 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 379 NVIC_SetVector(irq_n, vector);
sahilmgandhi 18:6a4db94011d3 380 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 381 } else {
sahilmgandhi 18:6a4db94011d3 382 switch (irq) {
sahilmgandhi 18:6a4db94011d3 383 case RxIrq:
sahilmgandhi 18:6a4db94011d3 384 usart_disable_interrupt(_USART(obj), US_IER_RXRDY);
sahilmgandhi 18:6a4db94011d3 385 break;
sahilmgandhi 18:6a4db94011d3 386 case TxIrq:
sahilmgandhi 18:6a4db94011d3 387 break;
sahilmgandhi 18:6a4db94011d3 388 }
sahilmgandhi 18:6a4db94011d3 389 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 390 }
sahilmgandhi 18:6a4db94011d3 391 }
sahilmgandhi 18:6a4db94011d3 392
sahilmgandhi 18:6a4db94011d3 393 static inline void uart_irq(Usart *const usart, uint32_t index)
sahilmgandhi 18:6a4db94011d3 394 {
sahilmgandhi 18:6a4db94011d3 395 MBED_ASSERT(usart != (void*)0);
sahilmgandhi 18:6a4db94011d3 396 uint32_t mask, status;
sahilmgandhi 18:6a4db94011d3 397 /* Read and clear mask. */
sahilmgandhi 18:6a4db94011d3 398 status = usart_get_status(usart);
sahilmgandhi 18:6a4db94011d3 399 mask = usart_get_interrupt_mask(usart);
sahilmgandhi 18:6a4db94011d3 400 status &= mask;
sahilmgandhi 18:6a4db94011d3 401
sahilmgandhi 18:6a4db94011d3 402 if (serial_irq_ids[index] != 0) {
sahilmgandhi 18:6a4db94011d3 403 if (status & US_IER_RXRDY) { /*For Receive Complete*/
sahilmgandhi 18:6a4db94011d3 404 if (irq_handler) {
sahilmgandhi 18:6a4db94011d3 405 irq_handler(serial_irq_ids[index], RxIrq);
sahilmgandhi 18:6a4db94011d3 406 }
sahilmgandhi 18:6a4db94011d3 407 }
sahilmgandhi 18:6a4db94011d3 408 }
sahilmgandhi 18:6a4db94011d3 409 }
sahilmgandhi 18:6a4db94011d3 410
sahilmgandhi 18:6a4db94011d3 411 void uart0_irq(void)
sahilmgandhi 18:6a4db94011d3 412 {
sahilmgandhi 18:6a4db94011d3 413 uart_irq(USART0, 0);
sahilmgandhi 18:6a4db94011d3 414 }
sahilmgandhi 18:6a4db94011d3 415
sahilmgandhi 18:6a4db94011d3 416 void uart1_irq(void)
sahilmgandhi 18:6a4db94011d3 417 {
sahilmgandhi 18:6a4db94011d3 418 uart_irq(USART1, 1);
sahilmgandhi 18:6a4db94011d3 419 }
sahilmgandhi 18:6a4db94011d3 420
sahilmgandhi 18:6a4db94011d3 421 void uart2_irq(void)
sahilmgandhi 18:6a4db94011d3 422 {
sahilmgandhi 18:6a4db94011d3 423 uart_irq(USART2, 2);
sahilmgandhi 18:6a4db94011d3 424 }
sahilmgandhi 18:6a4db94011d3 425
sahilmgandhi 18:6a4db94011d3 426 void uart3_irq(void)
sahilmgandhi 18:6a4db94011d3 427 {
sahilmgandhi 18:6a4db94011d3 428 uart_irq(USART3, 3);
sahilmgandhi 18:6a4db94011d3 429 }
sahilmgandhi 18:6a4db94011d3 430
sahilmgandhi 18:6a4db94011d3 431 void uart4_irq(void)
sahilmgandhi 18:6a4db94011d3 432 {
sahilmgandhi 18:6a4db94011d3 433 uart_irq(USART4, 4);
sahilmgandhi 18:6a4db94011d3 434 }
sahilmgandhi 18:6a4db94011d3 435
sahilmgandhi 18:6a4db94011d3 436 void uart5_irq(void)
sahilmgandhi 18:6a4db94011d3 437 {
sahilmgandhi 18:6a4db94011d3 438 uart_irq(USART5, 5);
sahilmgandhi 18:6a4db94011d3 439 }
sahilmgandhi 18:6a4db94011d3 440
sahilmgandhi 18:6a4db94011d3 441 void uart6_irq(void)
sahilmgandhi 18:6a4db94011d3 442 {
sahilmgandhi 18:6a4db94011d3 443 uart_irq(USART6, 6);
sahilmgandhi 18:6a4db94011d3 444 }
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446 void uart7_irq(void)
sahilmgandhi 18:6a4db94011d3 447 {
sahilmgandhi 18:6a4db94011d3 448 uart_irq(USART7, 7);
sahilmgandhi 18:6a4db94011d3 449 }
sahilmgandhi 18:6a4db94011d3 450
sahilmgandhi 18:6a4db94011d3 451 static uint8_t serial_get_index(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 452 {
sahilmgandhi 18:6a4db94011d3 453 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 454 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 455 switch ((int)pUSART_S(obj)) {
sahilmgandhi 18:6a4db94011d3 456 case UART_0:
sahilmgandhi 18:6a4db94011d3 457 return 0;
sahilmgandhi 18:6a4db94011d3 458 case UART_1:
sahilmgandhi 18:6a4db94011d3 459 return 1;
sahilmgandhi 18:6a4db94011d3 460 case UART_2:
sahilmgandhi 18:6a4db94011d3 461 return 2;
sahilmgandhi 18:6a4db94011d3 462 case UART_3:
sahilmgandhi 18:6a4db94011d3 463 return 3;
sahilmgandhi 18:6a4db94011d3 464 case UART_4:
sahilmgandhi 18:6a4db94011d3 465 return 4;
sahilmgandhi 18:6a4db94011d3 466 case UART_5:
sahilmgandhi 18:6a4db94011d3 467 return 5;
sahilmgandhi 18:6a4db94011d3 468 case UART_6:
sahilmgandhi 18:6a4db94011d3 469 return 6;
sahilmgandhi 18:6a4db94011d3 470 case UART_7:
sahilmgandhi 18:6a4db94011d3 471 return 7;
sahilmgandhi 18:6a4db94011d3 472 }
sahilmgandhi 18:6a4db94011d3 473 return 0;
sahilmgandhi 18:6a4db94011d3 474 }
sahilmgandhi 18:6a4db94011d3 475
sahilmgandhi 18:6a4db94011d3 476 static uint32_t get_serial_vector (serial_t *obj)
sahilmgandhi 18:6a4db94011d3 477 {
sahilmgandhi 18:6a4db94011d3 478 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 479 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 480 uint32_t vector = 0;
sahilmgandhi 18:6a4db94011d3 481 switch ((int)pUSART_S(obj)) {
sahilmgandhi 18:6a4db94011d3 482 case UART_0:
sahilmgandhi 18:6a4db94011d3 483 vector = (uint32_t)uart0_irq;
sahilmgandhi 18:6a4db94011d3 484 break;
sahilmgandhi 18:6a4db94011d3 485 case UART_1:
sahilmgandhi 18:6a4db94011d3 486 vector = (uint32_t)uart1_irq;
sahilmgandhi 18:6a4db94011d3 487 break;
sahilmgandhi 18:6a4db94011d3 488 case UART_2:
sahilmgandhi 18:6a4db94011d3 489 vector = (uint32_t)uart2_irq;
sahilmgandhi 18:6a4db94011d3 490 break;
sahilmgandhi 18:6a4db94011d3 491 case UART_3:
sahilmgandhi 18:6a4db94011d3 492 vector = (uint32_t)uart3_irq;
sahilmgandhi 18:6a4db94011d3 493 break;
sahilmgandhi 18:6a4db94011d3 494 case UART_4:
sahilmgandhi 18:6a4db94011d3 495 vector = (uint32_t)uart4_irq;
sahilmgandhi 18:6a4db94011d3 496 break;
sahilmgandhi 18:6a4db94011d3 497 case UART_5:
sahilmgandhi 18:6a4db94011d3 498 vector = (uint32_t)uart5_irq;
sahilmgandhi 18:6a4db94011d3 499 break;
sahilmgandhi 18:6a4db94011d3 500 case UART_6:
sahilmgandhi 18:6a4db94011d3 501 vector = (uint32_t)uart6_irq;
sahilmgandhi 18:6a4db94011d3 502 break;
sahilmgandhi 18:6a4db94011d3 503 case UART_7:
sahilmgandhi 18:6a4db94011d3 504 vector = (uint32_t)uart7_irq;
sahilmgandhi 18:6a4db94011d3 505 break;
sahilmgandhi 18:6a4db94011d3 506 }
sahilmgandhi 18:6a4db94011d3 507 return vector;
sahilmgandhi 18:6a4db94011d3 508 }
sahilmgandhi 18:6a4db94011d3 509
sahilmgandhi 18:6a4db94011d3 510 IRQn_Type get_serial_irq_num (serial_t *obj)
sahilmgandhi 18:6a4db94011d3 511 {
sahilmgandhi 18:6a4db94011d3 512 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 513 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 514 switch ((int)pUSART_S(obj)) {
sahilmgandhi 18:6a4db94011d3 515 case UART_0:
sahilmgandhi 18:6a4db94011d3 516 return FLEXCOM0_IRQn;
sahilmgandhi 18:6a4db94011d3 517 case UART_1:
sahilmgandhi 18:6a4db94011d3 518 return FLEXCOM1_IRQn;
sahilmgandhi 18:6a4db94011d3 519 case UART_2:
sahilmgandhi 18:6a4db94011d3 520 return FLEXCOM2_IRQn;
sahilmgandhi 18:6a4db94011d3 521 case UART_3:
sahilmgandhi 18:6a4db94011d3 522 return FLEXCOM3_IRQn;
sahilmgandhi 18:6a4db94011d3 523 case UART_4:
sahilmgandhi 18:6a4db94011d3 524 return FLEXCOM4_IRQn;
sahilmgandhi 18:6a4db94011d3 525 case UART_5:
sahilmgandhi 18:6a4db94011d3 526 return FLEXCOM5_IRQn;
sahilmgandhi 18:6a4db94011d3 527 case UART_6:
sahilmgandhi 18:6a4db94011d3 528 return FLEXCOM6_IRQn;
sahilmgandhi 18:6a4db94011d3 529 case UART_7:
sahilmgandhi 18:6a4db94011d3 530 return FLEXCOM7_IRQn;
sahilmgandhi 18:6a4db94011d3 531 default:
sahilmgandhi 18:6a4db94011d3 532 MBED_ASSERT(0);
sahilmgandhi 18:6a4db94011d3 533 }
sahilmgandhi 18:6a4db94011d3 534 return 0; /*Warning Suppression*/
sahilmgandhi 18:6a4db94011d3 535 }
sahilmgandhi 18:6a4db94011d3 536
sahilmgandhi 18:6a4db94011d3 537 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 538 * READ/WRITE
sahilmgandhi 18:6a4db94011d3 539 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 540 int serial_getc(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 541 {
sahilmgandhi 18:6a4db94011d3 542 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 543 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 544 while (!serial_readable(obj));
sahilmgandhi 18:6a4db94011d3 545 return (int)((_USART(obj)->US_RHR & US_RHR_RXCHR_Msk) & 0xFF);
sahilmgandhi 18:6a4db94011d3 546 }
sahilmgandhi 18:6a4db94011d3 547
sahilmgandhi 18:6a4db94011d3 548 void serial_putc(serial_t *obj, int c)
sahilmgandhi 18:6a4db94011d3 549 {
sahilmgandhi 18:6a4db94011d3 550 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 551 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 552 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 553 _USART(obj)->US_THR = US_THR_TXCHR(c);
sahilmgandhi 18:6a4db94011d3 554 }
sahilmgandhi 18:6a4db94011d3 555
sahilmgandhi 18:6a4db94011d3 556 int serial_readable(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 557 {
sahilmgandhi 18:6a4db94011d3 558 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 559 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 560 uint32_t status = 1;
sahilmgandhi 18:6a4db94011d3 561 if (!(_USART(obj)->US_CSR & US_CSR_RXRDY)) {
sahilmgandhi 18:6a4db94011d3 562 status = 0;
sahilmgandhi 18:6a4db94011d3 563 } else {
sahilmgandhi 18:6a4db94011d3 564 status = 1;
sahilmgandhi 18:6a4db94011d3 565 }
sahilmgandhi 18:6a4db94011d3 566 return status;
sahilmgandhi 18:6a4db94011d3 567 }
sahilmgandhi 18:6a4db94011d3 568
sahilmgandhi 18:6a4db94011d3 569 int serial_writable(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 570 {
sahilmgandhi 18:6a4db94011d3 571 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 572 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 573 uint32_t status = 1;
sahilmgandhi 18:6a4db94011d3 574 if (!(_USART(obj)->US_CSR & US_CSR_TXRDY)) {
sahilmgandhi 18:6a4db94011d3 575 status = 0;
sahilmgandhi 18:6a4db94011d3 576 } else {
sahilmgandhi 18:6a4db94011d3 577 status = 1;
sahilmgandhi 18:6a4db94011d3 578 }
sahilmgandhi 18:6a4db94011d3 579 return status;
sahilmgandhi 18:6a4db94011d3 580 }
sahilmgandhi 18:6a4db94011d3 581
sahilmgandhi 18:6a4db94011d3 582 /************************************************************************************
sahilmgandhi 18:6a4db94011d3 583 * ASYNCHRONOUS HAL *
sahilmgandhi 18:6a4db94011d3 584 ************************************************************************************/
sahilmgandhi 18:6a4db94011d3 585
sahilmgandhi 18:6a4db94011d3 586
sahilmgandhi 18:6a4db94011d3 587 #if DEVICE_SERIAL_ASYNCH
sahilmgandhi 18:6a4db94011d3 588 /************************************
sahilmgandhi 18:6a4db94011d3 589 * HELPER FUNCTIONS *
sahilmgandhi 18:6a4db94011d3 590 ***********************************/
sahilmgandhi 18:6a4db94011d3 591
sahilmgandhi 18:6a4db94011d3 592 void serial_set_char_match(serial_t *obj, uint8_t char_match)
sahilmgandhi 18:6a4db94011d3 593 {
sahilmgandhi 18:6a4db94011d3 594 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 595 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 596 if (char_match != SERIAL_RESERVED_CHAR_MATCH) {
sahilmgandhi 18:6a4db94011d3 597 obj->char_match = char_match;
sahilmgandhi 18:6a4db94011d3 598 _USART(obj)->US_CMPR = (char_match & 0xFF);
sahilmgandhi 18:6a4db94011d3 599 usart_enable_interrupt(_USART(obj), US_IER_CMP);
sahilmgandhi 18:6a4db94011d3 600 }
sahilmgandhi 18:6a4db94011d3 601 }
sahilmgandhi 18:6a4db94011d3 602
sahilmgandhi 18:6a4db94011d3 603 /************************************
sahilmgandhi 18:6a4db94011d3 604 * TRANSFER FUNCTIONS *
sahilmgandhi 18:6a4db94011d3 605 ***********************************/
sahilmgandhi 18:6a4db94011d3 606 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
sahilmgandhi 18:6a4db94011d3 607 {
sahilmgandhi 18:6a4db94011d3 608 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 609 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 610 MBED_ASSERT(tx != (void*)0);
sahilmgandhi 18:6a4db94011d3 611 if(tx_length == 0) return 0;
sahilmgandhi 18:6a4db94011d3 612 Pdc *pdc_base;
sahilmgandhi 18:6a4db94011d3 613 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 614 pdc_packet_t packet;
sahilmgandhi 18:6a4db94011d3 615
sahilmgandhi 18:6a4db94011d3 616 pSERIAL_S(obj)->acttra = true; /* flag for active transmit transfer */
sahilmgandhi 18:6a4db94011d3 617
sahilmgandhi 18:6a4db94011d3 618 irq_n = get_serial_irq_num(obj);
sahilmgandhi 18:6a4db94011d3 619
sahilmgandhi 18:6a4db94011d3 620 /* Get board USART PDC base address and enable transmitter. */
sahilmgandhi 18:6a4db94011d3 621 pdc_base = usart_get_pdc_base(_USART(obj));
sahilmgandhi 18:6a4db94011d3 622 pdc_enable_transfer(pdc_base, PERIPH_PTCR_TXTEN);
sahilmgandhi 18:6a4db94011d3 623
sahilmgandhi 18:6a4db94011d3 624 packet.ul_addr = (uint32_t)tx;
sahilmgandhi 18:6a4db94011d3 625 packet.ul_size = (uint32_t)tx_length;
sahilmgandhi 18:6a4db94011d3 626
sahilmgandhi 18:6a4db94011d3 627 pdc_tx_init(pdc_base, &packet, NULL);
sahilmgandhi 18:6a4db94011d3 628 usart_enable_interrupt(_USART(obj), US_IER_TXBUFE);
sahilmgandhi 18:6a4db94011d3 629
sahilmgandhi 18:6a4db94011d3 630 NVIC_ClearPendingIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 631 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 632 NVIC_SetVector(irq_n, (uint32_t)handler);
sahilmgandhi 18:6a4db94011d3 633 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 634
sahilmgandhi 18:6a4db94011d3 635 return 0;
sahilmgandhi 18:6a4db94011d3 636 }
sahilmgandhi 18:6a4db94011d3 637
sahilmgandhi 18:6a4db94011d3 638 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
sahilmgandhi 18:6a4db94011d3 639 {
sahilmgandhi 18:6a4db94011d3 640 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 641 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 642 MBED_ASSERT(rx != (void*)0);
sahilmgandhi 18:6a4db94011d3 643 if(rx_length == 0) return 0;
sahilmgandhi 18:6a4db94011d3 644 Pdc *pdc_base;
sahilmgandhi 18:6a4db94011d3 645 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 646 pdc_packet_t packet;
sahilmgandhi 18:6a4db94011d3 647
sahilmgandhi 18:6a4db94011d3 648 pSERIAL_S(obj)->actrec = true; /* flag for active receive transfer */
sahilmgandhi 18:6a4db94011d3 649 if (event == SERIAL_EVENT_RX_CHARACTER_MATCH) { /* if event is character match alone */
sahilmgandhi 18:6a4db94011d3 650 pSERIAL_S(obj)->events = SERIAL_EVENT_RX_CHARACTER_MATCH;
sahilmgandhi 18:6a4db94011d3 651 }
sahilmgandhi 18:6a4db94011d3 652
sahilmgandhi 18:6a4db94011d3 653 irq_n = get_serial_irq_num(obj);
sahilmgandhi 18:6a4db94011d3 654
sahilmgandhi 18:6a4db94011d3 655 serial_set_char_match(obj, char_match);
sahilmgandhi 18:6a4db94011d3 656
sahilmgandhi 18:6a4db94011d3 657 /* Get board USART PDC base address and enable transmitter. */
sahilmgandhi 18:6a4db94011d3 658 pdc_base = usart_get_pdc_base(_USART(obj));
sahilmgandhi 18:6a4db94011d3 659 pdc_enable_transfer(pdc_base, PERIPH_PTCR_RXTEN);
sahilmgandhi 18:6a4db94011d3 660 packet.ul_addr = (uint32_t)rx;
sahilmgandhi 18:6a4db94011d3 661 packet.ul_size = (uint32_t)rx_length;
sahilmgandhi 18:6a4db94011d3 662 pdc_rx_init(pdc_base, &packet, NULL);
sahilmgandhi 18:6a4db94011d3 663
sahilmgandhi 18:6a4db94011d3 664 usart_enable_interrupt(_USART(obj), (US_IER_RXBUFF | US_IER_OVRE | US_IER_FRAME | US_IER_PARE));
sahilmgandhi 18:6a4db94011d3 665
sahilmgandhi 18:6a4db94011d3 666 NVIC_ClearPendingIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 667 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 668 NVIC_SetVector(irq_n, (uint32_t)handler);
sahilmgandhi 18:6a4db94011d3 669 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 670
sahilmgandhi 18:6a4db94011d3 671 }
sahilmgandhi 18:6a4db94011d3 672
sahilmgandhi 18:6a4db94011d3 673 uint8_t serial_tx_active(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 674 {
sahilmgandhi 18:6a4db94011d3 675 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 676 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 677 return pSERIAL_S(obj)->acttra;
sahilmgandhi 18:6a4db94011d3 678 }
sahilmgandhi 18:6a4db94011d3 679
sahilmgandhi 18:6a4db94011d3 680 uint8_t serial_rx_active(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 681 {
sahilmgandhi 18:6a4db94011d3 682 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 683 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 684 return pSERIAL_S(obj)->actrec;
sahilmgandhi 18:6a4db94011d3 685 }
sahilmgandhi 18:6a4db94011d3 686
sahilmgandhi 18:6a4db94011d3 687 int serial_tx_irq_handler_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 688 {
sahilmgandhi 18:6a4db94011d3 689 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 690 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 691 serial_tx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 692 return SERIAL_EVENT_TX_COMPLETE;
sahilmgandhi 18:6a4db94011d3 693 }
sahilmgandhi 18:6a4db94011d3 694 int serial_rx_irq_handler_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 695 {
sahilmgandhi 18:6a4db94011d3 696 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 697 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 698 uint32_t ul_status, ulmask;
sahilmgandhi 18:6a4db94011d3 699
sahilmgandhi 18:6a4db94011d3 700 /* Read USART Status. */
sahilmgandhi 18:6a4db94011d3 701 ul_status = usart_get_status(_USART(obj));
sahilmgandhi 18:6a4db94011d3 702 ulmask = usart_get_interrupt_mask(_USART(obj));
sahilmgandhi 18:6a4db94011d3 703 ul_status &= ulmask;
sahilmgandhi 18:6a4db94011d3 704
sahilmgandhi 18:6a4db94011d3 705 if (ul_status & US_CSR_OVRE) { /* Overrun Error */
sahilmgandhi 18:6a4db94011d3 706 usart_disable_interrupt(_USART(obj), US_IDR_OVRE);
sahilmgandhi 18:6a4db94011d3 707 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 708 return SERIAL_EVENT_RX_OVERFLOW;
sahilmgandhi 18:6a4db94011d3 709 }
sahilmgandhi 18:6a4db94011d3 710 if (ul_status & US_CSR_FRAME) { /* Framing Error */
sahilmgandhi 18:6a4db94011d3 711 usart_disable_interrupt(_USART(obj), US_IDR_FRAME);
sahilmgandhi 18:6a4db94011d3 712 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 713 return SERIAL_EVENT_RX_FRAMING_ERROR;
sahilmgandhi 18:6a4db94011d3 714 }
sahilmgandhi 18:6a4db94011d3 715 if (ul_status & US_CSR_PARE) { /* Parity Error */
sahilmgandhi 18:6a4db94011d3 716 usart_disable_interrupt(_USART(obj), US_IDR_PARE);
sahilmgandhi 18:6a4db94011d3 717 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 718 return SERIAL_EVENT_RX_PARITY_ERROR;
sahilmgandhi 18:6a4db94011d3 719 }
sahilmgandhi 18:6a4db94011d3 720 if ((ul_status & (US_IER_RXBUFF | US_IER_CMP)) == (US_IER_RXBUFF | US_IER_CMP)) { /* Character match in last character in transfer*/
sahilmgandhi 18:6a4db94011d3 721 usart_disable_interrupt(_USART(obj), US_IDR_CMP);
sahilmgandhi 18:6a4db94011d3 722 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 723 return SERIAL_EVENT_RX_COMPLETE|SERIAL_EVENT_RX_CHARACTER_MATCH;
sahilmgandhi 18:6a4db94011d3 724 }
sahilmgandhi 18:6a4db94011d3 725 if (ul_status & US_IER_CMP) { /* Character match */
sahilmgandhi 18:6a4db94011d3 726 usart_disable_interrupt(_USART(obj), US_IDR_CMP);
sahilmgandhi 18:6a4db94011d3 727 if (pSERIAL_S(obj)->events == SERIAL_EVENT_RX_CHARACTER_MATCH) { /*if character match is the only event abort transfer */
sahilmgandhi 18:6a4db94011d3 728 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 729 }
sahilmgandhi 18:6a4db94011d3 730 return SERIAL_EVENT_RX_CHARACTER_MATCH;
sahilmgandhi 18:6a4db94011d3 731 }
sahilmgandhi 18:6a4db94011d3 732 if (ul_status & US_IER_RXBUFF) { /* Reception Complete */
sahilmgandhi 18:6a4db94011d3 733 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 734 return SERIAL_EVENT_RX_COMPLETE;
sahilmgandhi 18:6a4db94011d3 735 }
sahilmgandhi 18:6a4db94011d3 736 return 0;
sahilmgandhi 18:6a4db94011d3 737 }
sahilmgandhi 18:6a4db94011d3 738
sahilmgandhi 18:6a4db94011d3 739 int serial_irq_handler_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 740 {
sahilmgandhi 18:6a4db94011d3 741 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 742 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 743 uint32_t ul_status, ulmask;
sahilmgandhi 18:6a4db94011d3 744
sahilmgandhi 18:6a4db94011d3 745 /* Read USART Status. */
sahilmgandhi 18:6a4db94011d3 746 ul_status = usart_get_status(_USART(obj));
sahilmgandhi 18:6a4db94011d3 747 ulmask = usart_get_interrupt_mask(_USART(obj));
sahilmgandhi 18:6a4db94011d3 748
sahilmgandhi 18:6a4db94011d3 749 ul_status &= ulmask;
sahilmgandhi 18:6a4db94011d3 750
sahilmgandhi 18:6a4db94011d3 751 if (ul_status & (US_CSR_RXBUFF | US_CSR_OVRE | US_CSR_FRAME | US_CSR_PARE | US_IER_CMP)) {
sahilmgandhi 18:6a4db94011d3 752 return serial_rx_irq_handler_asynch(obj);
sahilmgandhi 18:6a4db94011d3 753 }
sahilmgandhi 18:6a4db94011d3 754 if (ul_status & US_CSR_TXBUFE) {
sahilmgandhi 18:6a4db94011d3 755 return serial_tx_irq_handler_asynch(obj);
sahilmgandhi 18:6a4db94011d3 756 }
sahilmgandhi 18:6a4db94011d3 757 return 0;
sahilmgandhi 18:6a4db94011d3 758 }
sahilmgandhi 18:6a4db94011d3 759
sahilmgandhi 18:6a4db94011d3 760 void serial_tx_abort_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 761 {
sahilmgandhi 18:6a4db94011d3 762 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 763 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 764 Pdc *pdc_base;
sahilmgandhi 18:6a4db94011d3 765 usart_disable_interrupt(_USART(obj), US_IER_TXBUFE);
sahilmgandhi 18:6a4db94011d3 766 pdc_base = usart_get_pdc_base(_USART(obj));
sahilmgandhi 18:6a4db94011d3 767 pdc_disable_transfer(pdc_base, PERIPH_PTCR_TXTEN);
sahilmgandhi 18:6a4db94011d3 768 pSERIAL_S(obj)->acttra = false;
sahilmgandhi 18:6a4db94011d3 769 }
sahilmgandhi 18:6a4db94011d3 770
sahilmgandhi 18:6a4db94011d3 771 void serial_rx_abort_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 772 {
sahilmgandhi 18:6a4db94011d3 773 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 774 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 775 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 776 Pdc *pdc_base;
sahilmgandhi 18:6a4db94011d3 777 usart_disable_interrupt(_USART(obj), US_IER_RXBUFF);
sahilmgandhi 18:6a4db94011d3 778 pdc_base = usart_get_pdc_base(_USART(obj));
sahilmgandhi 18:6a4db94011d3 779 pdc_disable_transfer(pdc_base, PERIPH_PTCR_RXTEN);
sahilmgandhi 18:6a4db94011d3 780 irq_n = get_serial_irq_num(obj);
sahilmgandhi 18:6a4db94011d3 781 NVIC_ClearPendingIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 782 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 783 pSERIAL_S(obj)->actrec = false;
sahilmgandhi 18:6a4db94011d3 784 }
sahilmgandhi 18:6a4db94011d3 785
sahilmgandhi 18:6a4db94011d3 786 #endif