Mouse code for the MacroRat
mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM4/drivers/supc/supc.c@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | * \file |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * \brief Supply Controller (SUPC) driver for SAM. |
sahilmgandhi | 18:6a4db94011d3 | 5 | * |
sahilmgandhi | 18:6a4db94011d3 | 6 | * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved. |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * \asf_license_start |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * \page License |
sahilmgandhi | 18:6a4db94011d3 | 11 | * |
sahilmgandhi | 18:6a4db94011d3 | 12 | * Redistribution and use in source and binary forms, with or without |
sahilmgandhi | 18:6a4db94011d3 | 13 | * modification, are permitted provided that the following conditions are met: |
sahilmgandhi | 18:6a4db94011d3 | 14 | * |
sahilmgandhi | 18:6a4db94011d3 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 16 | * this list of conditions and the following disclaimer. |
sahilmgandhi | 18:6a4db94011d3 | 17 | * |
sahilmgandhi | 18:6a4db94011d3 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 19 | * this list of conditions and the following disclaimer in the documentation |
sahilmgandhi | 18:6a4db94011d3 | 20 | * and/or other materials provided with the distribution. |
sahilmgandhi | 18:6a4db94011d3 | 21 | * |
sahilmgandhi | 18:6a4db94011d3 | 22 | * 3. The name of Atmel may not be used to endorse or promote products derived |
sahilmgandhi | 18:6a4db94011d3 | 23 | * from this software without specific prior written permission. |
sahilmgandhi | 18:6a4db94011d3 | 24 | * |
sahilmgandhi | 18:6a4db94011d3 | 25 | * 4. This software may only be redistributed and used in connection with an |
sahilmgandhi | 18:6a4db94011d3 | 26 | * Atmel microcontroller product. |
sahilmgandhi | 18:6a4db94011d3 | 27 | * |
sahilmgandhi | 18:6a4db94011d3 | 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
sahilmgandhi | 18:6a4db94011d3 | 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
sahilmgandhi | 18:6a4db94011d3 | 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
sahilmgandhi | 18:6a4db94011d3 | 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
sahilmgandhi | 18:6a4db94011d3 | 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
sahilmgandhi | 18:6a4db94011d3 | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
sahilmgandhi | 18:6a4db94011d3 | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
sahilmgandhi | 18:6a4db94011d3 | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
sahilmgandhi | 18:6a4db94011d3 | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
sahilmgandhi | 18:6a4db94011d3 | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
sahilmgandhi | 18:6a4db94011d3 | 38 | * POSSIBILITY OF SUCH DAMAGE. |
sahilmgandhi | 18:6a4db94011d3 | 39 | * |
sahilmgandhi | 18:6a4db94011d3 | 40 | * \asf_license_stop |
sahilmgandhi | 18:6a4db94011d3 | 41 | * |
sahilmgandhi | 18:6a4db94011d3 | 42 | */ |
sahilmgandhi | 18:6a4db94011d3 | 43 | /* |
sahilmgandhi | 18:6a4db94011d3 | 44 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
sahilmgandhi | 18:6a4db94011d3 | 45 | */ |
sahilmgandhi | 18:6a4db94011d3 | 46 | |
sahilmgandhi | 18:6a4db94011d3 | 47 | #include "supc.h" |
sahilmgandhi | 18:6a4db94011d3 | 48 | |
sahilmgandhi | 18:6a4db94011d3 | 49 | /// @cond 0 |
sahilmgandhi | 18:6a4db94011d3 | 50 | /**INDENT-OFF**/ |
sahilmgandhi | 18:6a4db94011d3 | 51 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 52 | extern "C" { |
sahilmgandhi | 18:6a4db94011d3 | 53 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 54 | /**INDENT-ON**/ |
sahilmgandhi | 18:6a4db94011d3 | 55 | /// @endcond |
sahilmgandhi | 18:6a4db94011d3 | 56 | |
sahilmgandhi | 18:6a4db94011d3 | 57 | /** |
sahilmgandhi | 18:6a4db94011d3 | 58 | * \defgroup sam_drivers_supc_group Supply Controller (SUPC) |
sahilmgandhi | 18:6a4db94011d3 | 59 | * |
sahilmgandhi | 18:6a4db94011d3 | 60 | * Driver for the SUPC (Supply Controller). This driver provides access to the main |
sahilmgandhi | 18:6a4db94011d3 | 61 | * features of the Supply Controller. |
sahilmgandhi | 18:6a4db94011d3 | 62 | * |
sahilmgandhi | 18:6a4db94011d3 | 63 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 64 | */ |
sahilmgandhi | 18:6a4db94011d3 | 65 | |
sahilmgandhi | 18:6a4db94011d3 | 66 | #if (!SAMG) |
sahilmgandhi | 18:6a4db94011d3 | 67 | /** |
sahilmgandhi | 18:6a4db94011d3 | 68 | * \brief Switch off the voltage regulator to put the device in backup mode. |
sahilmgandhi | 18:6a4db94011d3 | 69 | * |
sahilmgandhi | 18:6a4db94011d3 | 70 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 71 | */ |
sahilmgandhi | 18:6a4db94011d3 | 72 | void supc_enable_backup_mode(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 73 | { |
sahilmgandhi | 18:6a4db94011d3 | 74 | p_supc->SUPC_CR = SUPC_CR_KEY_PASSWD | SUPC_CR_VROFF; |
sahilmgandhi | 18:6a4db94011d3 | 75 | __WFE(); |
sahilmgandhi | 18:6a4db94011d3 | 76 | __WFI(); |
sahilmgandhi | 18:6a4db94011d3 | 77 | } |
sahilmgandhi | 18:6a4db94011d3 | 78 | |
sahilmgandhi | 18:6a4db94011d3 | 79 | /** |
sahilmgandhi | 18:6a4db94011d3 | 80 | * \brief Enable the internal voltage regulator. |
sahilmgandhi | 18:6a4db94011d3 | 81 | * |
sahilmgandhi | 18:6a4db94011d3 | 82 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 83 | */ |
sahilmgandhi | 18:6a4db94011d3 | 84 | void supc_enable_voltage_regulator(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 85 | { |
sahilmgandhi | 18:6a4db94011d3 | 86 | #if (SAM3U || SAM3XA) |
sahilmgandhi | 18:6a4db94011d3 | 87 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_VDDIORDYONREG)); |
sahilmgandhi | 18:6a4db94011d3 | 88 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr | SUPC_MR_VDDIORDYONREG; |
sahilmgandhi | 18:6a4db94011d3 | 89 | #else |
sahilmgandhi | 18:6a4db94011d3 | 90 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_ONREG)); |
sahilmgandhi | 18:6a4db94011d3 | 91 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr | SUPC_MR_ONREG; |
sahilmgandhi | 18:6a4db94011d3 | 92 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 93 | } |
sahilmgandhi | 18:6a4db94011d3 | 94 | |
sahilmgandhi | 18:6a4db94011d3 | 95 | /** |
sahilmgandhi | 18:6a4db94011d3 | 96 | * \brief Disable the internal voltage regulator to supply VDDCORE with an external supply. |
sahilmgandhi | 18:6a4db94011d3 | 97 | * |
sahilmgandhi | 18:6a4db94011d3 | 98 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 99 | */ |
sahilmgandhi | 18:6a4db94011d3 | 100 | void supc_disable_voltage_regulator(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 101 | { |
sahilmgandhi | 18:6a4db94011d3 | 102 | #if (SAM3U || SAM3XA) |
sahilmgandhi | 18:6a4db94011d3 | 103 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_VDDIORDYONREG)); |
sahilmgandhi | 18:6a4db94011d3 | 104 | #else |
sahilmgandhi | 18:6a4db94011d3 | 105 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_ONREG)); |
sahilmgandhi | 18:6a4db94011d3 | 106 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 107 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr; |
sahilmgandhi | 18:6a4db94011d3 | 108 | } |
sahilmgandhi | 18:6a4db94011d3 | 109 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 110 | |
sahilmgandhi | 18:6a4db94011d3 | 111 | /** |
sahilmgandhi | 18:6a4db94011d3 | 112 | * \brief Switch slow clock source selection to external 32k (Xtal or Bypass) oscillator. |
sahilmgandhi | 18:6a4db94011d3 | 113 | * This function disables the PLLs. |
sahilmgandhi | 18:6a4db94011d3 | 114 | * |
sahilmgandhi | 18:6a4db94011d3 | 115 | * \note Switching sclk back to 32krc is only possible by shutting down the VDDIO power supply. |
sahilmgandhi | 18:6a4db94011d3 | 116 | * |
sahilmgandhi | 18:6a4db94011d3 | 117 | * \param ul_bypass 0 for Xtal, 1 for bypass. |
sahilmgandhi | 18:6a4db94011d3 | 118 | */ |
sahilmgandhi | 18:6a4db94011d3 | 119 | void supc_switch_sclk_to_32kxtal(Supc *p_supc, uint32_t ul_bypass) |
sahilmgandhi | 18:6a4db94011d3 | 120 | { |
sahilmgandhi | 18:6a4db94011d3 | 121 | /* Set Bypass mode if required */ |
sahilmgandhi | 18:6a4db94011d3 | 122 | if (ul_bypass == 1) { |
sahilmgandhi | 18:6a4db94011d3 | 123 | p_supc->SUPC_MR |= SUPC_MR_KEY_PASSWD | SUPC_MR_OSCBYPASS; |
sahilmgandhi | 18:6a4db94011d3 | 124 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 125 | p_supc->SUPC_MR &= ~(SUPC_MR_KEY_PASSWD | SUPC_MR_OSCBYPASS); |
sahilmgandhi | 18:6a4db94011d3 | 126 | } |
sahilmgandhi | 18:6a4db94011d3 | 127 | |
sahilmgandhi | 18:6a4db94011d3 | 128 | p_supc->SUPC_CR |= SUPC_CR_KEY_PASSWD | SUPC_CR_XTALSEL; |
sahilmgandhi | 18:6a4db94011d3 | 129 | } |
sahilmgandhi | 18:6a4db94011d3 | 130 | |
sahilmgandhi | 18:6a4db94011d3 | 131 | /** |
sahilmgandhi | 18:6a4db94011d3 | 132 | * \brief Enable the core brownout detector. |
sahilmgandhi | 18:6a4db94011d3 | 133 | * |
sahilmgandhi | 18:6a4db94011d3 | 134 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 135 | */ |
sahilmgandhi | 18:6a4db94011d3 | 136 | void supc_enable_brownout_detector(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 137 | { |
sahilmgandhi | 18:6a4db94011d3 | 138 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_BODDIS)); |
sahilmgandhi | 18:6a4db94011d3 | 139 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr; |
sahilmgandhi | 18:6a4db94011d3 | 140 | } |
sahilmgandhi | 18:6a4db94011d3 | 141 | |
sahilmgandhi | 18:6a4db94011d3 | 142 | /** |
sahilmgandhi | 18:6a4db94011d3 | 143 | * \brief Disable the core brownout detector. |
sahilmgandhi | 18:6a4db94011d3 | 144 | * |
sahilmgandhi | 18:6a4db94011d3 | 145 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 146 | */ |
sahilmgandhi | 18:6a4db94011d3 | 147 | void supc_disable_brownout_detector(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 148 | { |
sahilmgandhi | 18:6a4db94011d3 | 149 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_BODDIS)); |
sahilmgandhi | 18:6a4db94011d3 | 150 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr | SUPC_MR_BODDIS; |
sahilmgandhi | 18:6a4db94011d3 | 151 | } |
sahilmgandhi | 18:6a4db94011d3 | 152 | |
sahilmgandhi | 18:6a4db94011d3 | 153 | /** |
sahilmgandhi | 18:6a4db94011d3 | 154 | * \brief Enable the assertion of core reset signal when a brownout detection occurs. |
sahilmgandhi | 18:6a4db94011d3 | 155 | * |
sahilmgandhi | 18:6a4db94011d3 | 156 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 157 | */ |
sahilmgandhi | 18:6a4db94011d3 | 158 | void supc_enable_brownout_reset(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 159 | { |
sahilmgandhi | 18:6a4db94011d3 | 160 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_BODRSTEN)); |
sahilmgandhi | 18:6a4db94011d3 | 161 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr | SUPC_MR_BODRSTEN; |
sahilmgandhi | 18:6a4db94011d3 | 162 | } |
sahilmgandhi | 18:6a4db94011d3 | 163 | |
sahilmgandhi | 18:6a4db94011d3 | 164 | /** |
sahilmgandhi | 18:6a4db94011d3 | 165 | * \brief Disable the assertion of core reset signal when a brownout detection occurs. |
sahilmgandhi | 18:6a4db94011d3 | 166 | * |
sahilmgandhi | 18:6a4db94011d3 | 167 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 168 | */ |
sahilmgandhi | 18:6a4db94011d3 | 169 | void supc_disable_brownout_reset(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 170 | { |
sahilmgandhi | 18:6a4db94011d3 | 171 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_BODRSTEN)); |
sahilmgandhi | 18:6a4db94011d3 | 172 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr; |
sahilmgandhi | 18:6a4db94011d3 | 173 | } |
sahilmgandhi | 18:6a4db94011d3 | 174 | |
sahilmgandhi | 18:6a4db94011d3 | 175 | /** |
sahilmgandhi | 18:6a4db94011d3 | 176 | * \brief Set Supply monitor threshold. |
sahilmgandhi | 18:6a4db94011d3 | 177 | * |
sahilmgandhi | 18:6a4db94011d3 | 178 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 179 | * \param ul_threshold Supply monitor threshold (between 1.9V and 3.4V). |
sahilmgandhi | 18:6a4db94011d3 | 180 | */ |
sahilmgandhi | 18:6a4db94011d3 | 181 | void supc_set_monitor_threshold(Supc *p_supc, uint32_t ul_threshold) |
sahilmgandhi | 18:6a4db94011d3 | 182 | { |
sahilmgandhi | 18:6a4db94011d3 | 183 | uint32_t ul_smmr = p_supc->SUPC_SMMR & (~SUPC_SMMR_SMTH_Msk); |
sahilmgandhi | 18:6a4db94011d3 | 184 | p_supc->SUPC_SMMR = ul_smmr | (SUPC_SMMR_SMTH_Msk & ul_threshold); |
sahilmgandhi | 18:6a4db94011d3 | 185 | } |
sahilmgandhi | 18:6a4db94011d3 | 186 | |
sahilmgandhi | 18:6a4db94011d3 | 187 | /** |
sahilmgandhi | 18:6a4db94011d3 | 188 | * \brief Set Supply monitor sampling period. |
sahilmgandhi | 18:6a4db94011d3 | 189 | * |
sahilmgandhi | 18:6a4db94011d3 | 190 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 191 | * \param ul_period Supply monitor sampling period. |
sahilmgandhi | 18:6a4db94011d3 | 192 | */ |
sahilmgandhi | 18:6a4db94011d3 | 193 | void supc_set_monitor_sampling_period(Supc *p_supc, uint32_t ul_period) |
sahilmgandhi | 18:6a4db94011d3 | 194 | { |
sahilmgandhi | 18:6a4db94011d3 | 195 | uint32_t ul_smmr = p_supc->SUPC_SMMR & (~SUPC_SMMR_SMSMPL_Msk); |
sahilmgandhi | 18:6a4db94011d3 | 196 | p_supc->SUPC_SMMR = ul_smmr | (SUPC_SMMR_SMSMPL_Msk & ul_period); |
sahilmgandhi | 18:6a4db94011d3 | 197 | } |
sahilmgandhi | 18:6a4db94011d3 | 198 | |
sahilmgandhi | 18:6a4db94011d3 | 199 | /** |
sahilmgandhi | 18:6a4db94011d3 | 200 | * \brief Enable the assertion of the core reset signal when a supply monitor detection occurs. |
sahilmgandhi | 18:6a4db94011d3 | 201 | * |
sahilmgandhi | 18:6a4db94011d3 | 202 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 203 | */ |
sahilmgandhi | 18:6a4db94011d3 | 204 | void supc_enable_monitor_reset(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 205 | { |
sahilmgandhi | 18:6a4db94011d3 | 206 | p_supc->SUPC_SMMR |= SUPC_SMMR_SMRSTEN; |
sahilmgandhi | 18:6a4db94011d3 | 207 | } |
sahilmgandhi | 18:6a4db94011d3 | 208 | |
sahilmgandhi | 18:6a4db94011d3 | 209 | /** |
sahilmgandhi | 18:6a4db94011d3 | 210 | * \brief Disable the assertion of core reset signal when a supply monitor detection occurs. |
sahilmgandhi | 18:6a4db94011d3 | 211 | * |
sahilmgandhi | 18:6a4db94011d3 | 212 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 213 | */ |
sahilmgandhi | 18:6a4db94011d3 | 214 | void supc_disable_monitor_reset(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 215 | { |
sahilmgandhi | 18:6a4db94011d3 | 216 | p_supc->SUPC_SMMR &= ~SUPC_SMMR_SMRSTEN; |
sahilmgandhi | 18:6a4db94011d3 | 217 | } |
sahilmgandhi | 18:6a4db94011d3 | 218 | |
sahilmgandhi | 18:6a4db94011d3 | 219 | /** |
sahilmgandhi | 18:6a4db94011d3 | 220 | * \brief Enable the assertion of SUPC interrupt signal when a supply monitor detection occurs. |
sahilmgandhi | 18:6a4db94011d3 | 221 | * |
sahilmgandhi | 18:6a4db94011d3 | 222 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 223 | */ |
sahilmgandhi | 18:6a4db94011d3 | 224 | void supc_enable_monitor_interrupt(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 225 | { |
sahilmgandhi | 18:6a4db94011d3 | 226 | p_supc->SUPC_SMMR |= SUPC_SMMR_SMIEN; |
sahilmgandhi | 18:6a4db94011d3 | 227 | } |
sahilmgandhi | 18:6a4db94011d3 | 228 | |
sahilmgandhi | 18:6a4db94011d3 | 229 | /** |
sahilmgandhi | 18:6a4db94011d3 | 230 | * \brief Disable the assertion of SUPC interrupt signal when a supply monitor detection occurs. |
sahilmgandhi | 18:6a4db94011d3 | 231 | * |
sahilmgandhi | 18:6a4db94011d3 | 232 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 233 | */ |
sahilmgandhi | 18:6a4db94011d3 | 234 | void supc_disable_monitor_interrupt(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 235 | { |
sahilmgandhi | 18:6a4db94011d3 | 236 | p_supc->SUPC_SMMR &= ~SUPC_SMMR_SMIEN; |
sahilmgandhi | 18:6a4db94011d3 | 237 | } |
sahilmgandhi | 18:6a4db94011d3 | 238 | |
sahilmgandhi | 18:6a4db94011d3 | 239 | #if (!(SAMG51 || SAMG53 || SAMG54)) |
sahilmgandhi | 18:6a4db94011d3 | 240 | /** |
sahilmgandhi | 18:6a4db94011d3 | 241 | * \brief Set system controller wake up mode. |
sahilmgandhi | 18:6a4db94011d3 | 242 | * |
sahilmgandhi | 18:6a4db94011d3 | 243 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 244 | * \param ul_mode Bitmask of wake up mode (please refer to datasheet for more details). |
sahilmgandhi | 18:6a4db94011d3 | 245 | */ |
sahilmgandhi | 18:6a4db94011d3 | 246 | void supc_set_wakeup_mode(Supc *p_supc, uint32_t ul_mode) |
sahilmgandhi | 18:6a4db94011d3 | 247 | { |
sahilmgandhi | 18:6a4db94011d3 | 248 | p_supc->SUPC_WUMR = ul_mode; |
sahilmgandhi | 18:6a4db94011d3 | 249 | } |
sahilmgandhi | 18:6a4db94011d3 | 250 | |
sahilmgandhi | 18:6a4db94011d3 | 251 | /** |
sahilmgandhi | 18:6a4db94011d3 | 252 | * \brief Set system controller wake up inputs. |
sahilmgandhi | 18:6a4db94011d3 | 253 | * |
sahilmgandhi | 18:6a4db94011d3 | 254 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 255 | * \param ul_inputs Bitmask of wake-up inputs that can force wake up of |
sahilmgandhi | 18:6a4db94011d3 | 256 | * the core power supply. |
sahilmgandhi | 18:6a4db94011d3 | 257 | * \param ul_transition Bitmask of level transition of the wake-up inputs. |
sahilmgandhi | 18:6a4db94011d3 | 258 | * 1 means a high-to-low level transition forces the wake up of core power supply. |
sahilmgandhi | 18:6a4db94011d3 | 259 | * 0 means a low-to-high level transition forces the wake up of core power supply. |
sahilmgandhi | 18:6a4db94011d3 | 260 | */ |
sahilmgandhi | 18:6a4db94011d3 | 261 | void supc_set_wakeup_inputs(Supc *p_supc, uint32_t ul_inputs, |
sahilmgandhi | 18:6a4db94011d3 | 262 | uint32_t ul_transition) |
sahilmgandhi | 18:6a4db94011d3 | 263 | { |
sahilmgandhi | 18:6a4db94011d3 | 264 | p_supc->SUPC_WUIR = ul_inputs | ul_transition; |
sahilmgandhi | 18:6a4db94011d3 | 265 | } |
sahilmgandhi | 18:6a4db94011d3 | 266 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 267 | |
sahilmgandhi | 18:6a4db94011d3 | 268 | /** |
sahilmgandhi | 18:6a4db94011d3 | 269 | * \brief Get supply controller status. |
sahilmgandhi | 18:6a4db94011d3 | 270 | * |
sahilmgandhi | 18:6a4db94011d3 | 271 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 272 | * |
sahilmgandhi | 18:6a4db94011d3 | 273 | * \return The status of supply controller. |
sahilmgandhi | 18:6a4db94011d3 | 274 | */ |
sahilmgandhi | 18:6a4db94011d3 | 275 | uint32_t supc_get_status(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 276 | { |
sahilmgandhi | 18:6a4db94011d3 | 277 | return p_supc->SUPC_SR; |
sahilmgandhi | 18:6a4db94011d3 | 278 | } |
sahilmgandhi | 18:6a4db94011d3 | 279 | |
sahilmgandhi | 18:6a4db94011d3 | 280 | #if (SAM4C || SAM4CP || SAM4CM) |
sahilmgandhi | 18:6a4db94011d3 | 281 | /** |
sahilmgandhi | 18:6a4db94011d3 | 282 | * \brief Enable Backup Area Power-On Reset. |
sahilmgandhi | 18:6a4db94011d3 | 283 | * |
sahilmgandhi | 18:6a4db94011d3 | 284 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 285 | */ |
sahilmgandhi | 18:6a4db94011d3 | 286 | void supc_enable_backup_power_on_reset(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 287 | { |
sahilmgandhi | 18:6a4db94011d3 | 288 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_BUPPOREN)); |
sahilmgandhi | 18:6a4db94011d3 | 289 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr | SUPC_MR_BUPPOREN; |
sahilmgandhi | 18:6a4db94011d3 | 290 | } |
sahilmgandhi | 18:6a4db94011d3 | 291 | |
sahilmgandhi | 18:6a4db94011d3 | 292 | /** |
sahilmgandhi | 18:6a4db94011d3 | 293 | * \brief Disable Backup Area Power-On Reset. |
sahilmgandhi | 18:6a4db94011d3 | 294 | * |
sahilmgandhi | 18:6a4db94011d3 | 295 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 296 | */ |
sahilmgandhi | 18:6a4db94011d3 | 297 | void supc_disable_backup_power_on_reset(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 298 | { |
sahilmgandhi | 18:6a4db94011d3 | 299 | uint32_t ul_mr = p_supc->SUPC_MR & (~(SUPC_MR_KEY_Msk | SUPC_MR_BUPPOREN)); |
sahilmgandhi | 18:6a4db94011d3 | 300 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr; |
sahilmgandhi | 18:6a4db94011d3 | 301 | } |
sahilmgandhi | 18:6a4db94011d3 | 302 | /** |
sahilmgandhi | 18:6a4db94011d3 | 303 | * \brief Get SLCD power mode. |
sahilmgandhi | 18:6a4db94011d3 | 304 | * |
sahilmgandhi | 18:6a4db94011d3 | 305 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 306 | * |
sahilmgandhi | 18:6a4db94011d3 | 307 | * \return The mode of SLCDC. |
sahilmgandhi | 18:6a4db94011d3 | 308 | */ |
sahilmgandhi | 18:6a4db94011d3 | 309 | enum slcdc_power_mode supc_get_slcd_power_mode(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 310 | { |
sahilmgandhi | 18:6a4db94011d3 | 311 | return (enum slcdc_power_mode)(p_supc->SUPC_MR & SUPC_MR_LCDMODE_Msk); |
sahilmgandhi | 18:6a4db94011d3 | 312 | } |
sahilmgandhi | 18:6a4db94011d3 | 313 | |
sahilmgandhi | 18:6a4db94011d3 | 314 | /** |
sahilmgandhi | 18:6a4db94011d3 | 315 | * \brief Set SLCD power mode. |
sahilmgandhi | 18:6a4db94011d3 | 316 | * |
sahilmgandhi | 18:6a4db94011d3 | 317 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 318 | * \param mode The mode of SLCDC. |
sahilmgandhi | 18:6a4db94011d3 | 319 | */ |
sahilmgandhi | 18:6a4db94011d3 | 320 | void supc_set_slcd_power_mode(Supc *p_supc, enum slcdc_power_mode mode) |
sahilmgandhi | 18:6a4db94011d3 | 321 | { |
sahilmgandhi | 18:6a4db94011d3 | 322 | enum slcdc_power_mode pre_mode; |
sahilmgandhi | 18:6a4db94011d3 | 323 | uint32_t tmp; |
sahilmgandhi | 18:6a4db94011d3 | 324 | |
sahilmgandhi | 18:6a4db94011d3 | 325 | pre_mode = supc_get_slcd_power_mode(p_supc); |
sahilmgandhi | 18:6a4db94011d3 | 326 | |
sahilmgandhi | 18:6a4db94011d3 | 327 | if ((pre_mode == SLCDC_POWER_MODE_LCDON_EXTVR) && |
sahilmgandhi | 18:6a4db94011d3 | 328 | (mode == SLCDC_POWER_MODE_LCDON_INVR)) { |
sahilmgandhi | 18:6a4db94011d3 | 329 | return; |
sahilmgandhi | 18:6a4db94011d3 | 330 | } else if ((pre_mode == SLCDC_POWER_MODE_LCDON_INVR) && |
sahilmgandhi | 18:6a4db94011d3 | 331 | (mode == SLCDC_POWER_MODE_LCDON_EXTVR)) { |
sahilmgandhi | 18:6a4db94011d3 | 332 | return; |
sahilmgandhi | 18:6a4db94011d3 | 333 | } |
sahilmgandhi | 18:6a4db94011d3 | 334 | tmp = p_supc->SUPC_MR; |
sahilmgandhi | 18:6a4db94011d3 | 335 | tmp &= ~SUPC_MR_LCDMODE_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 336 | tmp |= SUPC_MR_KEY_PASSWD | mode; |
sahilmgandhi | 18:6a4db94011d3 | 337 | p_supc->SUPC_MR = tmp; |
sahilmgandhi | 18:6a4db94011d3 | 338 | |
sahilmgandhi | 18:6a4db94011d3 | 339 | if (mode == SLCDC_POWER_MODE_LCDOFF) { |
sahilmgandhi | 18:6a4db94011d3 | 340 | while(supc_get_status(p_supc) & SUPC_SR_LCDS_ENABLED); |
sahilmgandhi | 18:6a4db94011d3 | 341 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 342 | while(!(supc_get_status(p_supc) & SUPC_SR_LCDS_ENABLED)); |
sahilmgandhi | 18:6a4db94011d3 | 343 | } |
sahilmgandhi | 18:6a4db94011d3 | 344 | } |
sahilmgandhi | 18:6a4db94011d3 | 345 | |
sahilmgandhi | 18:6a4db94011d3 | 346 | /** |
sahilmgandhi | 18:6a4db94011d3 | 347 | * \brief Set LCD Voltage Regulator Output. |
sahilmgandhi | 18:6a4db94011d3 | 348 | * |
sahilmgandhi | 18:6a4db94011d3 | 349 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 350 | * \param vol The voltage of Regulator Output. |
sahilmgandhi | 18:6a4db94011d3 | 351 | */ |
sahilmgandhi | 18:6a4db94011d3 | 352 | void supc_set_slcd_vol(Supc *p_supc, uint32_t vol) |
sahilmgandhi | 18:6a4db94011d3 | 353 | { |
sahilmgandhi | 18:6a4db94011d3 | 354 | uint32_t tmp= p_supc->SUPC_MR; |
sahilmgandhi | 18:6a4db94011d3 | 355 | tmp &= ~SUPC_MR_LCDVROUT_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 356 | tmp |= SUPC_MR_KEY_PASSWD | SUPC_MR_LCDVROUT(vol); |
sahilmgandhi | 18:6a4db94011d3 | 357 | p_supc->SUPC_MR = tmp; |
sahilmgandhi | 18:6a4db94011d3 | 358 | |
sahilmgandhi | 18:6a4db94011d3 | 359 | } |
sahilmgandhi | 18:6a4db94011d3 | 360 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 361 | |
sahilmgandhi | 18:6a4db94011d3 | 362 | #if SAMG54 |
sahilmgandhi | 18:6a4db94011d3 | 363 | /** |
sahilmgandhi | 18:6a4db94011d3 | 364 | * \brief Set the internal voltage regulator to use factory trim value. |
sahilmgandhi | 18:6a4db94011d3 | 365 | * |
sahilmgandhi | 18:6a4db94011d3 | 366 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 367 | */ |
sahilmgandhi | 18:6a4db94011d3 | 368 | void supc_set_regulator_trim_factory(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 369 | { |
sahilmgandhi | 18:6a4db94011d3 | 370 | uint32_t ul_mr = p_supc->SUPC_MR & |
sahilmgandhi | 18:6a4db94011d3 | 371 | (~(SUPC_MR_VRVDD_Msk | SUPC_MR_VDDSEL_USER_VRVDD)); |
sahilmgandhi | 18:6a4db94011d3 | 372 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr; |
sahilmgandhi | 18:6a4db94011d3 | 373 | } |
sahilmgandhi | 18:6a4db94011d3 | 374 | |
sahilmgandhi | 18:6a4db94011d3 | 375 | /** |
sahilmgandhi | 18:6a4db94011d3 | 376 | * \brief Set the internal voltage regulator trim value. |
sahilmgandhi | 18:6a4db94011d3 | 377 | * |
sahilmgandhi | 18:6a4db94011d3 | 378 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 379 | * \param value the trim value. |
sahilmgandhi | 18:6a4db94011d3 | 380 | * |
sahilmgandhi | 18:6a4db94011d3 | 381 | * \note For the trim value in 96M PLL, please read the value in flash unique identifier area. |
sahilmgandhi | 18:6a4db94011d3 | 382 | */ |
sahilmgandhi | 18:6a4db94011d3 | 383 | void supc_set_regulator_trim_user(Supc *p_supc, uint32_t value) |
sahilmgandhi | 18:6a4db94011d3 | 384 | { |
sahilmgandhi | 18:6a4db94011d3 | 385 | uint32_t ul_mr = p_supc->SUPC_MR & (~SUPC_MR_VRVDD_Msk); |
sahilmgandhi | 18:6a4db94011d3 | 386 | p_supc->SUPC_MR = SUPC_MR_KEY_PASSWD | ul_mr | SUPC_MR_VDDSEL_USER_VRVDD |
sahilmgandhi | 18:6a4db94011d3 | 387 | | SUPC_MR_VRVDD(value); |
sahilmgandhi | 18:6a4db94011d3 | 388 | } |
sahilmgandhi | 18:6a4db94011d3 | 389 | |
sahilmgandhi | 18:6a4db94011d3 | 390 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 391 | |
sahilmgandhi | 18:6a4db94011d3 | 392 | #if (SAMV70 || SAMV71 || SAME70 || SAMS70) |
sahilmgandhi | 18:6a4db94011d3 | 393 | /** |
sahilmgandhi | 18:6a4db94011d3 | 394 | * \brief SRAM On In Backup Mode. |
sahilmgandhi | 18:6a4db94011d3 | 395 | * |
sahilmgandhi | 18:6a4db94011d3 | 396 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 397 | * |
sahilmgandhi | 18:6a4db94011d3 | 398 | */ |
sahilmgandhi | 18:6a4db94011d3 | 399 | void supc_backup_sram_on(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 400 | { |
sahilmgandhi | 18:6a4db94011d3 | 401 | p_supc->SUPC_MR |= (SUPC_MR_KEY_PASSWD | SUPC_MR_BKUPRETON); |
sahilmgandhi | 18:6a4db94011d3 | 402 | } |
sahilmgandhi | 18:6a4db94011d3 | 403 | |
sahilmgandhi | 18:6a4db94011d3 | 404 | /** |
sahilmgandhi | 18:6a4db94011d3 | 405 | * \brief SRAM Off In Backup Mode. |
sahilmgandhi | 18:6a4db94011d3 | 406 | * |
sahilmgandhi | 18:6a4db94011d3 | 407 | * \param p_supc Pointer to a SUPC instance. |
sahilmgandhi | 18:6a4db94011d3 | 408 | * |
sahilmgandhi | 18:6a4db94011d3 | 409 | */ |
sahilmgandhi | 18:6a4db94011d3 | 410 | void supc_backup_sram_off(Supc *p_supc) |
sahilmgandhi | 18:6a4db94011d3 | 411 | { |
sahilmgandhi | 18:6a4db94011d3 | 412 | p_supc->SUPC_MR &= (~(SUPC_MR_KEY_PASSWD | SUPC_MR_BKUPRETON)); |
sahilmgandhi | 18:6a4db94011d3 | 413 | } |
sahilmgandhi | 18:6a4db94011d3 | 414 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 415 | |
sahilmgandhi | 18:6a4db94011d3 | 416 | //@} |
sahilmgandhi | 18:6a4db94011d3 | 417 | |
sahilmgandhi | 18:6a4db94011d3 | 418 | /// @cond 0 |
sahilmgandhi | 18:6a4db94011d3 | 419 | /**INDENT-OFF**/ |
sahilmgandhi | 18:6a4db94011d3 | 420 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 421 | } |
sahilmgandhi | 18:6a4db94011d3 | 422 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 423 | /**INDENT-ON**/ |
sahilmgandhi | 18:6a4db94011d3 | 424 | /// @endcond |