Mouse code for the MacroRat
mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/us_ticker.c@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2006-2015 ARM Limited |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | #include <stddef.h> |
sahilmgandhi | 18:6a4db94011d3 | 17 | #include "us_ticker_api.h" |
sahilmgandhi | 18:6a4db94011d3 | 18 | #include "cmsis.h" |
sahilmgandhi | 18:6a4db94011d3 | 19 | #include "mbed_assert.h" |
sahilmgandhi | 18:6a4db94011d3 | 20 | #include "ins_gclk.h" |
sahilmgandhi | 18:6a4db94011d3 | 21 | #include "compiler.h" |
sahilmgandhi | 18:6a4db94011d3 | 22 | #include "system.h" |
sahilmgandhi | 18:6a4db94011d3 | 23 | #include "tc.h" |
sahilmgandhi | 18:6a4db94011d3 | 24 | #include "tc_interrupt.h" |
sahilmgandhi | 18:6a4db94011d3 | 25 | |
sahilmgandhi | 18:6a4db94011d3 | 26 | #if (SAMD21) || (SAMR21) |
sahilmgandhi | 18:6a4db94011d3 | 27 | #define TICKER_COUNTER_uS TC4 |
sahilmgandhi | 18:6a4db94011d3 | 28 | #define TICKER_COUNTER_IRQn TC4_IRQn |
sahilmgandhi | 18:6a4db94011d3 | 29 | #define TICKER_COUNTER_Handlr TC4_Handler |
sahilmgandhi | 18:6a4db94011d3 | 30 | #elif (SAML21) /*SAML21 TCC4 does not support 32 bit counter operations*/ |
sahilmgandhi | 18:6a4db94011d3 | 31 | #define TICKER_COUNTER_uS TC0 |
sahilmgandhi | 18:6a4db94011d3 | 32 | #define TICKER_COUNTER_IRQn TC0_IRQn |
sahilmgandhi | 18:6a4db94011d3 | 33 | #define TICKER_COUNTER_Handlr TC0_Handler |
sahilmgandhi | 18:6a4db94011d3 | 34 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 35 | |
sahilmgandhi | 18:6a4db94011d3 | 36 | static int us_ticker_inited = 0; |
sahilmgandhi | 18:6a4db94011d3 | 37 | extern uint8_t g_sys_init; |
sahilmgandhi | 18:6a4db94011d3 | 38 | |
sahilmgandhi | 18:6a4db94011d3 | 39 | struct tc_module us_ticker_module; |
sahilmgandhi | 18:6a4db94011d3 | 40 | |
sahilmgandhi | 18:6a4db94011d3 | 41 | |
sahilmgandhi | 18:6a4db94011d3 | 42 | static inline void tc_clear_interrupt( |
sahilmgandhi | 18:6a4db94011d3 | 43 | struct tc_module *const module, |
sahilmgandhi | 18:6a4db94011d3 | 44 | const enum tc_callback callback_type) |
sahilmgandhi | 18:6a4db94011d3 | 45 | { |
sahilmgandhi | 18:6a4db94011d3 | 46 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 47 | MBED_ASSERT(module); |
sahilmgandhi | 18:6a4db94011d3 | 48 | |
sahilmgandhi | 18:6a4db94011d3 | 49 | /* Clear interrupt flags */ |
sahilmgandhi | 18:6a4db94011d3 | 50 | if (callback_type == TC_CALLBACK_CC_CHANNEL0) { |
sahilmgandhi | 18:6a4db94011d3 | 51 | module->hw->COUNT8.INTENCLR.reg = TC_INTFLAG_MC(1); |
sahilmgandhi | 18:6a4db94011d3 | 52 | } else if (callback_type == TC_CALLBACK_CC_CHANNEL1) { |
sahilmgandhi | 18:6a4db94011d3 | 53 | module->hw->COUNT8.INTENCLR.reg = TC_INTFLAG_MC(2); |
sahilmgandhi | 18:6a4db94011d3 | 54 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 55 | module->hw->COUNT8.INTENCLR.reg = (1 << callback_type); |
sahilmgandhi | 18:6a4db94011d3 | 56 | } |
sahilmgandhi | 18:6a4db94011d3 | 57 | } |
sahilmgandhi | 18:6a4db94011d3 | 58 | |
sahilmgandhi | 18:6a4db94011d3 | 59 | void us_ticker_irq_handler_internal(struct tc_module* us_tc_module) |
sahilmgandhi | 18:6a4db94011d3 | 60 | { |
sahilmgandhi | 18:6a4db94011d3 | 61 | uint32_t status_flags; |
sahilmgandhi | 18:6a4db94011d3 | 62 | |
sahilmgandhi | 18:6a4db94011d3 | 63 | /* Clear TC capture overflow and TC count overflow */ |
sahilmgandhi | 18:6a4db94011d3 | 64 | status_flags = TC_STATUS_CAPTURE_OVERFLOW | TC_STATUS_COUNT_OVERFLOW; |
sahilmgandhi | 18:6a4db94011d3 | 65 | tc_clear_status(&us_ticker_module, status_flags); |
sahilmgandhi | 18:6a4db94011d3 | 66 | |
sahilmgandhi | 18:6a4db94011d3 | 67 | us_ticker_irq_handler(); |
sahilmgandhi | 18:6a4db94011d3 | 68 | } |
sahilmgandhi | 18:6a4db94011d3 | 69 | |
sahilmgandhi | 18:6a4db94011d3 | 70 | void us_ticker_init(void) |
sahilmgandhi | 18:6a4db94011d3 | 71 | { |
sahilmgandhi | 18:6a4db94011d3 | 72 | uint32_t cycles_per_us; |
sahilmgandhi | 18:6a4db94011d3 | 73 | uint32_t prescaler = 0; |
sahilmgandhi | 18:6a4db94011d3 | 74 | struct tc_config config_tc; |
sahilmgandhi | 18:6a4db94011d3 | 75 | |
sahilmgandhi | 18:6a4db94011d3 | 76 | if (us_ticker_inited) return; |
sahilmgandhi | 18:6a4db94011d3 | 77 | us_ticker_inited = 1; |
sahilmgandhi | 18:6a4db94011d3 | 78 | |
sahilmgandhi | 18:6a4db94011d3 | 79 | if (g_sys_init == 0) { |
sahilmgandhi | 18:6a4db94011d3 | 80 | system_init(); |
sahilmgandhi | 18:6a4db94011d3 | 81 | g_sys_init = 1; |
sahilmgandhi | 18:6a4db94011d3 | 82 | } |
sahilmgandhi | 18:6a4db94011d3 | 83 | |
sahilmgandhi | 18:6a4db94011d3 | 84 | tc_get_config_defaults(&config_tc); |
sahilmgandhi | 18:6a4db94011d3 | 85 | |
sahilmgandhi | 18:6a4db94011d3 | 86 | cycles_per_us = system_gclk_gen_get_hz(config_tc.clock_source) / 1000000; |
sahilmgandhi | 18:6a4db94011d3 | 87 | MBED_ASSERT(cycles_per_us > 0); |
sahilmgandhi | 18:6a4db94011d3 | 88 | /*while((cycles_per_us & 1) == 0 && prescaler <= 10) { |
sahilmgandhi | 18:6a4db94011d3 | 89 | cycles_per_us = cycles_per_us >> 1; |
sahilmgandhi | 18:6a4db94011d3 | 90 | prescaler++; |
sahilmgandhi | 18:6a4db94011d3 | 91 | }*/ |
sahilmgandhi | 18:6a4db94011d3 | 92 | while((cycles_per_us > 1) && (prescaler <= 10)) { |
sahilmgandhi | 18:6a4db94011d3 | 93 | cycles_per_us = cycles_per_us >> 1; |
sahilmgandhi | 18:6a4db94011d3 | 94 | prescaler++; |
sahilmgandhi | 18:6a4db94011d3 | 95 | } |
sahilmgandhi | 18:6a4db94011d3 | 96 | if (prescaler >= 9) { |
sahilmgandhi | 18:6a4db94011d3 | 97 | prescaler = 7; |
sahilmgandhi | 18:6a4db94011d3 | 98 | } else if (prescaler >= 7) { |
sahilmgandhi | 18:6a4db94011d3 | 99 | prescaler = 6; |
sahilmgandhi | 18:6a4db94011d3 | 100 | } else if (prescaler >= 5) { |
sahilmgandhi | 18:6a4db94011d3 | 101 | prescaler = 5; |
sahilmgandhi | 18:6a4db94011d3 | 102 | } |
sahilmgandhi | 18:6a4db94011d3 | 103 | |
sahilmgandhi | 18:6a4db94011d3 | 104 | config_tc.clock_prescaler = (enum tc_clock_prescaler)TC_CTRLA_PRESCALER(prescaler); |
sahilmgandhi | 18:6a4db94011d3 | 105 | config_tc.counter_size = TC_COUNTER_SIZE_32BIT; |
sahilmgandhi | 18:6a4db94011d3 | 106 | config_tc.run_in_standby = true; |
sahilmgandhi | 18:6a4db94011d3 | 107 | config_tc.counter_32_bit.value = 0; |
sahilmgandhi | 18:6a4db94011d3 | 108 | config_tc.counter_32_bit.compare_capture_channel[TC_COMPARE_CAPTURE_CHANNEL_0] = 0xFFFFFFFF; |
sahilmgandhi | 18:6a4db94011d3 | 109 | |
sahilmgandhi | 18:6a4db94011d3 | 110 | /* Initialize the timer */ |
sahilmgandhi | 18:6a4db94011d3 | 111 | tc_init(&us_ticker_module, TICKER_COUNTER_uS, &config_tc); |
sahilmgandhi | 18:6a4db94011d3 | 112 | |
sahilmgandhi | 18:6a4db94011d3 | 113 | /* Register callback function */ |
sahilmgandhi | 18:6a4db94011d3 | 114 | tc_register_callback(&us_ticker_module, (tc_callback_t)us_ticker_irq_handler_internal, TC_CALLBACK_CC_CHANNEL0); |
sahilmgandhi | 18:6a4db94011d3 | 115 | |
sahilmgandhi | 18:6a4db94011d3 | 116 | /* Enable the timer module */ |
sahilmgandhi | 18:6a4db94011d3 | 117 | tc_enable(&us_ticker_module); |
sahilmgandhi | 18:6a4db94011d3 | 118 | } |
sahilmgandhi | 18:6a4db94011d3 | 119 | |
sahilmgandhi | 18:6a4db94011d3 | 120 | uint32_t us_ticker_read() |
sahilmgandhi | 18:6a4db94011d3 | 121 | { |
sahilmgandhi | 18:6a4db94011d3 | 122 | if (!us_ticker_inited) |
sahilmgandhi | 18:6a4db94011d3 | 123 | us_ticker_init(); |
sahilmgandhi | 18:6a4db94011d3 | 124 | |
sahilmgandhi | 18:6a4db94011d3 | 125 | return tc_get_count_value(&us_ticker_module); |
sahilmgandhi | 18:6a4db94011d3 | 126 | } |
sahilmgandhi | 18:6a4db94011d3 | 127 | |
sahilmgandhi | 18:6a4db94011d3 | 128 | void us_ticker_set_interrupt(timestamp_t timestamp) |
sahilmgandhi | 18:6a4db94011d3 | 129 | { |
sahilmgandhi | 18:6a4db94011d3 | 130 | uint32_t cur_time; |
sahilmgandhi | 18:6a4db94011d3 | 131 | int32_t delta; |
sahilmgandhi | 18:6a4db94011d3 | 132 | |
sahilmgandhi | 18:6a4db94011d3 | 133 | cur_time = us_ticker_read(); |
sahilmgandhi | 18:6a4db94011d3 | 134 | delta = (int32_t)((uint32_t)timestamp - cur_time); |
sahilmgandhi | 18:6a4db94011d3 | 135 | if (delta < 0) { |
sahilmgandhi | 18:6a4db94011d3 | 136 | /* Event already occurred in past */ |
sahilmgandhi | 18:6a4db94011d3 | 137 | us_ticker_irq_handler(); |
sahilmgandhi | 18:6a4db94011d3 | 138 | return; |
sahilmgandhi | 18:6a4db94011d3 | 139 | } |
sahilmgandhi | 18:6a4db94011d3 | 140 | |
sahilmgandhi | 18:6a4db94011d3 | 141 | NVIC_DisableIRQ(TICKER_COUNTER_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 142 | NVIC_SetVector(TICKER_COUNTER_IRQn, (uint32_t)TICKER_COUNTER_Handlr); |
sahilmgandhi | 18:6a4db94011d3 | 143 | |
sahilmgandhi | 18:6a4db94011d3 | 144 | /* Enable the callback */ |
sahilmgandhi | 18:6a4db94011d3 | 145 | tc_enable_callback(&us_ticker_module, TC_CALLBACK_CC_CHANNEL0); |
sahilmgandhi | 18:6a4db94011d3 | 146 | tc_set_compare_value(&us_ticker_module, TC_COMPARE_CAPTURE_CHANNEL_0, (uint32_t)timestamp); |
sahilmgandhi | 18:6a4db94011d3 | 147 | |
sahilmgandhi | 18:6a4db94011d3 | 148 | NVIC_EnableIRQ(TICKER_COUNTER_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 149 | } |
sahilmgandhi | 18:6a4db94011d3 | 150 | |
sahilmgandhi | 18:6a4db94011d3 | 151 | void us_ticker_disable_interrupt(void) |
sahilmgandhi | 18:6a4db94011d3 | 152 | { |
sahilmgandhi | 18:6a4db94011d3 | 153 | /* Disable the callback */ |
sahilmgandhi | 18:6a4db94011d3 | 154 | tc_disable_callback(&us_ticker_module, TC_CALLBACK_CC_CHANNEL0); |
sahilmgandhi | 18:6a4db94011d3 | 155 | NVIC_DisableIRQ(TICKER_COUNTER_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 156 | } |
sahilmgandhi | 18:6a4db94011d3 | 157 | |
sahilmgandhi | 18:6a4db94011d3 | 158 | void us_ticker_clear_interrupt(void) |
sahilmgandhi | 18:6a4db94011d3 | 159 | { |
sahilmgandhi | 18:6a4db94011d3 | 160 | uint32_t status_flags; |
sahilmgandhi | 18:6a4db94011d3 | 161 | |
sahilmgandhi | 18:6a4db94011d3 | 162 | /* Clear TC channel 0 match */ |
sahilmgandhi | 18:6a4db94011d3 | 163 | status_flags = TC_STATUS_CHANNEL_0_MATCH; |
sahilmgandhi | 18:6a4db94011d3 | 164 | tc_clear_status(&us_ticker_module, status_flags); |
sahilmgandhi | 18:6a4db94011d3 | 165 | |
sahilmgandhi | 18:6a4db94011d3 | 166 | /* Clear the interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 167 | tc_clear_interrupt(&us_ticker_module, TC_CALLBACK_CC_CHANNEL0); |
sahilmgandhi | 18:6a4db94011d3 | 168 | NVIC_ClearPendingIRQ(TICKER_COUNTER_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 169 | } |