MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/rtc/TARGET_SAML21/rtc_count.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 * \file
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * \brief SAM RTC Driver (Count Mode)
sahilmgandhi 18:6a4db94011d3 5 *
sahilmgandhi 18:6a4db94011d3 6 * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * \asf_license_start
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * \page License
sahilmgandhi 18:6a4db94011d3 11 *
sahilmgandhi 18:6a4db94011d3 12 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 13 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 14 *
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 19 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 20 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 * 3. The name of Atmel may not be used to endorse or promote products derived
sahilmgandhi 18:6a4db94011d3 23 * from this software without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 24 *
sahilmgandhi 18:6a4db94011d3 25 * 4. This software may only be redistributed and used in connection with an
sahilmgandhi 18:6a4db94011d3 26 * Atmel microcontroller product.
sahilmgandhi 18:6a4db94011d3 27 *
sahilmgandhi 18:6a4db94011d3 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
sahilmgandhi 18:6a4db94011d3 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
sahilmgandhi 18:6a4db94011d3 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
sahilmgandhi 18:6a4db94011d3 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
sahilmgandhi 18:6a4db94011d3 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
sahilmgandhi 18:6a4db94011d3 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
sahilmgandhi 18:6a4db94011d3 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
sahilmgandhi 18:6a4db94011d3 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
sahilmgandhi 18:6a4db94011d3 38 * POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 39 *
sahilmgandhi 18:6a4db94011d3 40 * \asf_license_stop
sahilmgandhi 18:6a4db94011d3 41 *
sahilmgandhi 18:6a4db94011d3 42 */
sahilmgandhi 18:6a4db94011d3 43 /*
sahilmgandhi 18:6a4db94011d3 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
sahilmgandhi 18:6a4db94011d3 45 */
sahilmgandhi 18:6a4db94011d3 46 #include "rtc_count.h"
sahilmgandhi 18:6a4db94011d3 47 #include <clock.h>
sahilmgandhi 18:6a4db94011d3 48 #include <gclk.h>
sahilmgandhi 18:6a4db94011d3 49 #include "conf_rtc.h"
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 #if !defined(__DOXYGEN__)
sahilmgandhi 18:6a4db94011d3 52 struct rtc_module *_rtc_instance[RTC_INST_NUM];
sahilmgandhi 18:6a4db94011d3 53 #endif
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 #if !defined(RTC_CLOCK_SOURCE)
sahilmgandhi 18:6a4db94011d3 56 # warning RTC_CLOCK_SOURCE is not defined, assuming RTC_CLOCK_SELECTION_ULP1K.
sahilmgandhi 18:6a4db94011d3 57 # define RTC_CLOCK_SOURCE RTC_CLOCK_SELECTION_ULP1K
sahilmgandhi 18:6a4db94011d3 58 #endif
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 /**
sahilmgandhi 18:6a4db94011d3 61 * \brief Determines if the hardware module(s) are currently synchronizing to the bus.
sahilmgandhi 18:6a4db94011d3 62 *
sahilmgandhi 18:6a4db94011d3 63 * Checks to see if the underlying hardware peripheral module(s) are currently
sahilmgandhi 18:6a4db94011d3 64 * synchronizing across multiple clock domains to the hardware bus, This
sahilmgandhi 18:6a4db94011d3 65 * function can be used to delay further operations on a module until such time
sahilmgandhi 18:6a4db94011d3 66 * that it is ready, to prevent blocking delays for synchronization in the
sahilmgandhi 18:6a4db94011d3 67 * user application.
sahilmgandhi 18:6a4db94011d3 68 *
sahilmgandhi 18:6a4db94011d3 69 * \param[in] module RTC hardware module
sahilmgandhi 18:6a4db94011d3 70 *
sahilmgandhi 18:6a4db94011d3 71 * \return Synchronization status of the underlying hardware module(s).
sahilmgandhi 18:6a4db94011d3 72 *
sahilmgandhi 18:6a4db94011d3 73 * \retval true if the module synchronization is ongoing
sahilmgandhi 18:6a4db94011d3 74 * \retval false if the module has completed synchronization
sahilmgandhi 18:6a4db94011d3 75 */
sahilmgandhi 18:6a4db94011d3 76 static bool rtc_count_is_syncing(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 77 {
sahilmgandhi 18:6a4db94011d3 78 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 79 Assert(module);
sahilmgandhi 18:6a4db94011d3 80 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 if (rtc_module->MODE0.SYNCBUSY.reg) {
sahilmgandhi 18:6a4db94011d3 85 return true;
sahilmgandhi 18:6a4db94011d3 86 }
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 return false;
sahilmgandhi 18:6a4db94011d3 89 }
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 /**
sahilmgandhi 18:6a4db94011d3 92 * \brief Enables the RTC module.
sahilmgandhi 18:6a4db94011d3 93 *
sahilmgandhi 18:6a4db94011d3 94 * Enables the RTC module once it has been configured, ready for use. Most
sahilmgandhi 18:6a4db94011d3 95 * module configuration parameters cannot be altered while the module is enabled.
sahilmgandhi 18:6a4db94011d3 96 *
sahilmgandhi 18:6a4db94011d3 97 * \param[in,out] module RTC hardware module
sahilmgandhi 18:6a4db94011d3 98 */
sahilmgandhi 18:6a4db94011d3 99 void rtc_count_enable(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 100 {
sahilmgandhi 18:6a4db94011d3 101 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 102 Assert(module);
sahilmgandhi 18:6a4db94011d3 103 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 #if RTC_COUNT_ASYNC == true
sahilmgandhi 18:6a4db94011d3 108 system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_RTC);
sahilmgandhi 18:6a4db94011d3 109 #endif
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 112 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 113 }
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 /* Enable RTC module. */
sahilmgandhi 18:6a4db94011d3 116 rtc_module->MODE0.CTRLA.reg |= RTC_MODE0_CTRLA_ENABLE;
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 119 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 120 }
sahilmgandhi 18:6a4db94011d3 121 }
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 /**
sahilmgandhi 18:6a4db94011d3 124 * \brief Disables the RTC module.
sahilmgandhi 18:6a4db94011d3 125 *
sahilmgandhi 18:6a4db94011d3 126 * Disables the RTC module.
sahilmgandhi 18:6a4db94011d3 127 *
sahilmgandhi 18:6a4db94011d3 128 * \param[in,out] module RTC hardware module
sahilmgandhi 18:6a4db94011d3 129 */
sahilmgandhi 18:6a4db94011d3 130 void rtc_count_disable(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 131 {
sahilmgandhi 18:6a4db94011d3 132 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 133 Assert(module);
sahilmgandhi 18:6a4db94011d3 134 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 135
sahilmgandhi 18:6a4db94011d3 136 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 #if RTC_COUNT_ASYNC == true
sahilmgandhi 18:6a4db94011d3 139 system_interrupt_disable(SYSTEM_INTERRUPT_MODULE_RTC);
sahilmgandhi 18:6a4db94011d3 140 #endif
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 143 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 144 }
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 /* Disable RTC module. */
sahilmgandhi 18:6a4db94011d3 147 rtc_module->MODE0.CTRLA.reg &= ~RTC_MODE0_CTRLA_ENABLE;
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 150 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 151 }
sahilmgandhi 18:6a4db94011d3 152 }
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 /**
sahilmgandhi 18:6a4db94011d3 155 * \brief Resets the RTC module.
sahilmgandhi 18:6a4db94011d3 156 * Resets the RTC to hardware defaults.
sahilmgandhi 18:6a4db94011d3 157 *
sahilmgandhi 18:6a4db94011d3 158 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 159 */
sahilmgandhi 18:6a4db94011d3 160 void rtc_count_reset(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 161 {
sahilmgandhi 18:6a4db94011d3 162 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 163 Assert(module);
sahilmgandhi 18:6a4db94011d3 164 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 /* Disable module before reset. */
sahilmgandhi 18:6a4db94011d3 169 rtc_count_disable(module);
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 #if RTC_COUNT_ASYNC == true
sahilmgandhi 18:6a4db94011d3 172 module->registered_callback = 0;
sahilmgandhi 18:6a4db94011d3 173 module->enabled_callback = 0;
sahilmgandhi 18:6a4db94011d3 174 #endif
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 177 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 178 }
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 /* Initiate software reset. */
sahilmgandhi 18:6a4db94011d3 181 rtc_module->MODE0.CTRLA.reg |= RTC_MODE0_CTRLA_SWRST;
sahilmgandhi 18:6a4db94011d3 182
sahilmgandhi 18:6a4db94011d3 183 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 184 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 185 }
sahilmgandhi 18:6a4db94011d3 186 }
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 /**
sahilmgandhi 18:6a4db94011d3 189 * \internal Applies the given configuration.
sahilmgandhi 18:6a4db94011d3 190 *
sahilmgandhi 18:6a4db94011d3 191 * Sets the configurations given from the configuration structure to the
sahilmgandhi 18:6a4db94011d3 192 * hardware module
sahilmgandhi 18:6a4db94011d3 193 *
sahilmgandhi 18:6a4db94011d3 194 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 195 * \param[in] config Pointer to the configuration structure
sahilmgandhi 18:6a4db94011d3 196 *
sahilmgandhi 18:6a4db94011d3 197 * \return Status of the configuration procedure.
sahilmgandhi 18:6a4db94011d3 198 * \retval STATUS_OK RTC configurations was set successfully
sahilmgandhi 18:6a4db94011d3 199 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were given
sahilmgandhi 18:6a4db94011d3 200 */
sahilmgandhi 18:6a4db94011d3 201 static enum status_code _rtc_count_set_config(
sahilmgandhi 18:6a4db94011d3 202 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 203 const struct rtc_count_config *const config)
sahilmgandhi 18:6a4db94011d3 204 {
sahilmgandhi 18:6a4db94011d3 205 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 206 Assert(module);
sahilmgandhi 18:6a4db94011d3 207 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 #if SAML21
sahilmgandhi 18:6a4db94011d3 212 rtc_module->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0) | config->prescaler
sahilmgandhi 18:6a4db94011d3 213 | (config->enable_read_sync << RTC_MODE0_CTRLA_SYNCDIS_Pos);
sahilmgandhi 18:6a4db94011d3 214 #endif
sahilmgandhi 18:6a4db94011d3 215 #if (SAMC20) || (SAMC21)
sahilmgandhi 18:6a4db94011d3 216 rtc_module->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0) | config->prescaler
sahilmgandhi 18:6a4db94011d3 217 | (config->enable_read_sync << RTC_MODE0_CTRLA_COUNTSYNC_Pos);
sahilmgandhi 18:6a4db94011d3 218 #endif
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 /* Set mode and clear on match if applicable. */
sahilmgandhi 18:6a4db94011d3 221 switch (config->mode) {
sahilmgandhi 18:6a4db94011d3 222 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 223 /* Set 32-bit mode and clear on match if applicable. */
sahilmgandhi 18:6a4db94011d3 224 rtc_module->MODE0.CTRLA.reg |= RTC_MODE0_CTRLA_MODE(0);
sahilmgandhi 18:6a4db94011d3 225
sahilmgandhi 18:6a4db94011d3 226 /* Check if clear on compare match should be set. */
sahilmgandhi 18:6a4db94011d3 227 if (config->clear_on_match) {
sahilmgandhi 18:6a4db94011d3 228 /* Set clear on match. */
sahilmgandhi 18:6a4db94011d3 229 rtc_module->MODE0.CTRLA.reg |= RTC_MODE0_CTRLA_MATCHCLR;
sahilmgandhi 18:6a4db94011d3 230 }
sahilmgandhi 18:6a4db94011d3 231 /* Set compare values. */
sahilmgandhi 18:6a4db94011d3 232 for (uint8_t i = 0; i < RTC_COMP32_NUM; i++) {
sahilmgandhi 18:6a4db94011d3 233 rtc_count_set_compare(module, config->compare_values[i],
sahilmgandhi 18:6a4db94011d3 234 (enum rtc_count_compare)i);
sahilmgandhi 18:6a4db94011d3 235 }
sahilmgandhi 18:6a4db94011d3 236 break;
sahilmgandhi 18:6a4db94011d3 237
sahilmgandhi 18:6a4db94011d3 238 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 239 /* Set 16bit mode. */
sahilmgandhi 18:6a4db94011d3 240 rtc_module->MODE1.CTRLA.reg |= RTC_MODE1_CTRLA_MODE(1);
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 /* Check if match on clear is set, and return invalid
sahilmgandhi 18:6a4db94011d3 243 * argument if set. */
sahilmgandhi 18:6a4db94011d3 244 if (config->clear_on_match) {
sahilmgandhi 18:6a4db94011d3 245 Assert(false);
sahilmgandhi 18:6a4db94011d3 246 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 247 }
sahilmgandhi 18:6a4db94011d3 248 /* Set compare values. */
sahilmgandhi 18:6a4db94011d3 249 for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
sahilmgandhi 18:6a4db94011d3 250 rtc_count_set_compare(module, config->compare_values[i],
sahilmgandhi 18:6a4db94011d3 251 (enum rtc_count_compare)i);
sahilmgandhi 18:6a4db94011d3 252 }
sahilmgandhi 18:6a4db94011d3 253 break;
sahilmgandhi 18:6a4db94011d3 254 default:
sahilmgandhi 18:6a4db94011d3 255 Assert(false);
sahilmgandhi 18:6a4db94011d3 256 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 257 }
sahilmgandhi 18:6a4db94011d3 258
sahilmgandhi 18:6a4db94011d3 259 /* Return status OK if everything was configured. */
sahilmgandhi 18:6a4db94011d3 260 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 261 }
sahilmgandhi 18:6a4db94011d3 262
sahilmgandhi 18:6a4db94011d3 263 /**
sahilmgandhi 18:6a4db94011d3 264 * \brief Initializes the RTC module with given configurations.
sahilmgandhi 18:6a4db94011d3 265 *
sahilmgandhi 18:6a4db94011d3 266 * Initializes the module, setting up all given configurations to provide
sahilmgandhi 18:6a4db94011d3 267 * the desired functionality of the RTC.
sahilmgandhi 18:6a4db94011d3 268 *
sahilmgandhi 18:6a4db94011d3 269 * \param[out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 270 * \param[in] hw Pointer to hardware instance
sahilmgandhi 18:6a4db94011d3 271 * \param[in] config Pointer to the configuration structure
sahilmgandhi 18:6a4db94011d3 272 *
sahilmgandhi 18:6a4db94011d3 273 * \return Status of the initialization procedure.
sahilmgandhi 18:6a4db94011d3 274 * \retval STATUS_OK If the initialization was run stressfully
sahilmgandhi 18:6a4db94011d3 275 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were given
sahilmgandhi 18:6a4db94011d3 276 */
sahilmgandhi 18:6a4db94011d3 277 enum status_code rtc_count_init(
sahilmgandhi 18:6a4db94011d3 278 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 279 Rtc *const hw,
sahilmgandhi 18:6a4db94011d3 280 const struct rtc_count_config *const config)
sahilmgandhi 18:6a4db94011d3 281 {
sahilmgandhi 18:6a4db94011d3 282 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 283 Assert(module);
sahilmgandhi 18:6a4db94011d3 284 Assert(hw);
sahilmgandhi 18:6a4db94011d3 285 Assert(config);
sahilmgandhi 18:6a4db94011d3 286
sahilmgandhi 18:6a4db94011d3 287 /* Initialize device instance */
sahilmgandhi 18:6a4db94011d3 288 module->hw = hw;
sahilmgandhi 18:6a4db94011d3 289
sahilmgandhi 18:6a4db94011d3 290 /* Turn on the digital interface clock */
sahilmgandhi 18:6a4db94011d3 291 system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, MCLK_APBAMASK_RTC);
sahilmgandhi 18:6a4db94011d3 292
sahilmgandhi 18:6a4db94011d3 293 /* Select RTC clock */
sahilmgandhi 18:6a4db94011d3 294 OSC32KCTRL->RTCCTRL.reg = RTC_CLOCK_SOURCE;
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 /* Reset module to hardware defaults. */
sahilmgandhi 18:6a4db94011d3 297 rtc_count_reset(module);
sahilmgandhi 18:6a4db94011d3 298
sahilmgandhi 18:6a4db94011d3 299 /* Save conf_struct internally for continued use. */
sahilmgandhi 18:6a4db94011d3 300 module->mode = config->mode;
sahilmgandhi 18:6a4db94011d3 301
sahilmgandhi 18:6a4db94011d3 302 # if (RTC_INST_NUM == 1)
sahilmgandhi 18:6a4db94011d3 303 _rtc_instance[0] = module;
sahilmgandhi 18:6a4db94011d3 304 # else
sahilmgandhi 18:6a4db94011d3 305 /* Register this instance for callbacks*/
sahilmgandhi 18:6a4db94011d3 306 _rtc_instance[_rtc_get_inst_index(hw)] = module;
sahilmgandhi 18:6a4db94011d3 307 # endif
sahilmgandhi 18:6a4db94011d3 308
sahilmgandhi 18:6a4db94011d3 309 /* Set config and return status. */
sahilmgandhi 18:6a4db94011d3 310 return _rtc_count_set_config(module, config);
sahilmgandhi 18:6a4db94011d3 311 }
sahilmgandhi 18:6a4db94011d3 312
sahilmgandhi 18:6a4db94011d3 313 /**
sahilmgandhi 18:6a4db94011d3 314 * \brief Set the current count value to desired value.
sahilmgandhi 18:6a4db94011d3 315 *
sahilmgandhi 18:6a4db94011d3 316 * Sets the value of the counter to the specified value.
sahilmgandhi 18:6a4db94011d3 317 *
sahilmgandhi 18:6a4db94011d3 318 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 319 * \param[in] count_value The value to be set in count register
sahilmgandhi 18:6a4db94011d3 320 *
sahilmgandhi 18:6a4db94011d3 321 * \return Status of setting the register.
sahilmgandhi 18:6a4db94011d3 322 * \retval STATUS_OK If everything was executed correctly
sahilmgandhi 18:6a4db94011d3 323 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 324 */
sahilmgandhi 18:6a4db94011d3 325 enum status_code rtc_count_set_count(
sahilmgandhi 18:6a4db94011d3 326 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 327 const uint32_t count_value)
sahilmgandhi 18:6a4db94011d3 328 {
sahilmgandhi 18:6a4db94011d3 329 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 330 Assert(module);
sahilmgandhi 18:6a4db94011d3 331 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 332
sahilmgandhi 18:6a4db94011d3 333 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 334
sahilmgandhi 18:6a4db94011d3 335 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 336 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 337 }
sahilmgandhi 18:6a4db94011d3 338
sahilmgandhi 18:6a4db94011d3 339 /* Set count according to mode */
sahilmgandhi 18:6a4db94011d3 340 switch(module->mode) {
sahilmgandhi 18:6a4db94011d3 341 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 342 /* Write value to register. */
sahilmgandhi 18:6a4db94011d3 343 rtc_module->MODE0.COUNT.reg = count_value;
sahilmgandhi 18:6a4db94011d3 344 break;
sahilmgandhi 18:6a4db94011d3 345 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 346 /* Check if 16-bit value is provided. */
sahilmgandhi 18:6a4db94011d3 347 if(count_value > 0xffff) {
sahilmgandhi 18:6a4db94011d3 348 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 349 }
sahilmgandhi 18:6a4db94011d3 350
sahilmgandhi 18:6a4db94011d3 351 /* Write value to register. */
sahilmgandhi 18:6a4db94011d3 352 rtc_module->MODE1.COUNT.reg = (uint32_t)count_value;
sahilmgandhi 18:6a4db94011d3 353
sahilmgandhi 18:6a4db94011d3 354 break;
sahilmgandhi 18:6a4db94011d3 355
sahilmgandhi 18:6a4db94011d3 356 default:
sahilmgandhi 18:6a4db94011d3 357 Assert(false);
sahilmgandhi 18:6a4db94011d3 358 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 359 }
sahilmgandhi 18:6a4db94011d3 360
sahilmgandhi 18:6a4db94011d3 361 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 362 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 363 }
sahilmgandhi 18:6a4db94011d3 364 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 365 }
sahilmgandhi 18:6a4db94011d3 366
sahilmgandhi 18:6a4db94011d3 367 /**
sahilmgandhi 18:6a4db94011d3 368 * \brief Get the current count value.
sahilmgandhi 18:6a4db94011d3 369 *
sahilmgandhi 18:6a4db94011d3 370 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 371 *
sahilmgandhi 18:6a4db94011d3 372 * Returns the current count value.
sahilmgandhi 18:6a4db94011d3 373 *
sahilmgandhi 18:6a4db94011d3 374 * \return The current counter value as a 32-bit unsigned integer.
sahilmgandhi 18:6a4db94011d3 375 */
sahilmgandhi 18:6a4db94011d3 376 uint32_t rtc_count_get_count(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 377 {
sahilmgandhi 18:6a4db94011d3 378 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 379 Assert(module);
sahilmgandhi 18:6a4db94011d3 380 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 381
sahilmgandhi 18:6a4db94011d3 382 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 383
sahilmgandhi 18:6a4db94011d3 384 /* Initialize return value. */
sahilmgandhi 18:6a4db94011d3 385 uint32_t ret_val;
sahilmgandhi 18:6a4db94011d3 386
sahilmgandhi 18:6a4db94011d3 387 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 388 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 389 }
sahilmgandhi 18:6a4db94011d3 390
sahilmgandhi 18:6a4db94011d3 391 /* Read value based on mode. */
sahilmgandhi 18:6a4db94011d3 392 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 393 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 394 /* Return count value in 32-bit mode. */
sahilmgandhi 18:6a4db94011d3 395 ret_val = rtc_module->MODE0.COUNT.reg;
sahilmgandhi 18:6a4db94011d3 396
sahilmgandhi 18:6a4db94011d3 397 break;
sahilmgandhi 18:6a4db94011d3 398
sahilmgandhi 18:6a4db94011d3 399 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 400 /* Return count value in 16-bit mode. */
sahilmgandhi 18:6a4db94011d3 401 ret_val = (uint32_t)rtc_module->MODE1.COUNT.reg;
sahilmgandhi 18:6a4db94011d3 402
sahilmgandhi 18:6a4db94011d3 403 break;
sahilmgandhi 18:6a4db94011d3 404
sahilmgandhi 18:6a4db94011d3 405 default:
sahilmgandhi 18:6a4db94011d3 406 Assert(false);
sahilmgandhi 18:6a4db94011d3 407 /* Counter not initialized. Assume counter value 0.*/
sahilmgandhi 18:6a4db94011d3 408 ret_val = 0;
sahilmgandhi 18:6a4db94011d3 409 break;
sahilmgandhi 18:6a4db94011d3 410 }
sahilmgandhi 18:6a4db94011d3 411
sahilmgandhi 18:6a4db94011d3 412 return ret_val;
sahilmgandhi 18:6a4db94011d3 413 }
sahilmgandhi 18:6a4db94011d3 414
sahilmgandhi 18:6a4db94011d3 415 /**
sahilmgandhi 18:6a4db94011d3 416 * \brief Set the compare value for the specified compare.
sahilmgandhi 18:6a4db94011d3 417 *
sahilmgandhi 18:6a4db94011d3 418 * Sets the value specified by the implementer to the requested compare.
sahilmgandhi 18:6a4db94011d3 419 *
sahilmgandhi 18:6a4db94011d3 420 * \note Compare 4 and 5 are only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 421 *
sahilmgandhi 18:6a4db94011d3 422 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 423 * \param[in] comp_value The value to be written to the compare
sahilmgandhi 18:6a4db94011d3 424 * \param[in] comp_index Index of the compare to set
sahilmgandhi 18:6a4db94011d3 425 *
sahilmgandhi 18:6a4db94011d3 426 * \return Status indicating if compare was successfully set.
sahilmgandhi 18:6a4db94011d3 427 * \retval STATUS_OK If compare was successfully set
sahilmgandhi 18:6a4db94011d3 428 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 429 * \retval STATUS_ERR_BAD_FORMAT If the module was not initialized in a mode
sahilmgandhi 18:6a4db94011d3 430 */
sahilmgandhi 18:6a4db94011d3 431 enum status_code rtc_count_set_compare(
sahilmgandhi 18:6a4db94011d3 432 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 433 const uint32_t comp_value,
sahilmgandhi 18:6a4db94011d3 434 const enum rtc_count_compare comp_index)
sahilmgandhi 18:6a4db94011d3 435 {
sahilmgandhi 18:6a4db94011d3 436 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 437 Assert(module);
sahilmgandhi 18:6a4db94011d3 438 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 439
sahilmgandhi 18:6a4db94011d3 440 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 441
sahilmgandhi 18:6a4db94011d3 442 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 443 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 444 }
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446 /* Set compare values based on operation mode. */
sahilmgandhi 18:6a4db94011d3 447 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 448 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 449 /* Check sanity of comp_index. */
sahilmgandhi 18:6a4db94011d3 450 if ((uint32_t)comp_index > RTC_COMP32_NUM) {
sahilmgandhi 18:6a4db94011d3 451 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 452 }
sahilmgandhi 18:6a4db94011d3 453
sahilmgandhi 18:6a4db94011d3 454 /* Set compare value for COMP. */
sahilmgandhi 18:6a4db94011d3 455 rtc_module->MODE0.COMP[comp_index].reg = comp_value;
sahilmgandhi 18:6a4db94011d3 456
sahilmgandhi 18:6a4db94011d3 457 break;
sahilmgandhi 18:6a4db94011d3 458
sahilmgandhi 18:6a4db94011d3 459 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 460 /* Check sanity of comp_index. */
sahilmgandhi 18:6a4db94011d3 461 if ((uint32_t)comp_index > RTC_NUM_OF_COMP16) {
sahilmgandhi 18:6a4db94011d3 462 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 463 }
sahilmgandhi 18:6a4db94011d3 464
sahilmgandhi 18:6a4db94011d3 465 /* Check that 16-bit value is provided. */
sahilmgandhi 18:6a4db94011d3 466 if (comp_value > 0xffff) {
sahilmgandhi 18:6a4db94011d3 467 Assert(false);
sahilmgandhi 18:6a4db94011d3 468 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 469 }
sahilmgandhi 18:6a4db94011d3 470
sahilmgandhi 18:6a4db94011d3 471 /* Set compare value for COMP. */
sahilmgandhi 18:6a4db94011d3 472 rtc_module->MODE1.COMP[comp_index].reg = comp_value & 0xffff;
sahilmgandhi 18:6a4db94011d3 473
sahilmgandhi 18:6a4db94011d3 474 break;
sahilmgandhi 18:6a4db94011d3 475
sahilmgandhi 18:6a4db94011d3 476 default:
sahilmgandhi 18:6a4db94011d3 477 Assert(false);
sahilmgandhi 18:6a4db94011d3 478 return STATUS_ERR_BAD_FORMAT;
sahilmgandhi 18:6a4db94011d3 479 }
sahilmgandhi 18:6a4db94011d3 480
sahilmgandhi 18:6a4db94011d3 481 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 482 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 483 }
sahilmgandhi 18:6a4db94011d3 484
sahilmgandhi 18:6a4db94011d3 485 /* Return status if everything is OK. */
sahilmgandhi 18:6a4db94011d3 486 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 487 }
sahilmgandhi 18:6a4db94011d3 488
sahilmgandhi 18:6a4db94011d3 489 /**
sahilmgandhi 18:6a4db94011d3 490 * \brief Get the current compare value of specified compare.
sahilmgandhi 18:6a4db94011d3 491 *
sahilmgandhi 18:6a4db94011d3 492 * Retrieves the current value of the specified compare.
sahilmgandhi 18:6a4db94011d3 493 *
sahilmgandhi 18:6a4db94011d3 494 * \note Compare 4 and 5 are only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 495 *
sahilmgandhi 18:6a4db94011d3 496 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 497 * \param[out] comp_value Pointer to 32-bit integer that will be populated with
sahilmgandhi 18:6a4db94011d3 498 * the current compare value
sahilmgandhi 18:6a4db94011d3 499 * \param[in] comp_index Index of compare to check
sahilmgandhi 18:6a4db94011d3 500 *
sahilmgandhi 18:6a4db94011d3 501 * \return Status of the reading procedure.
sahilmgandhi 18:6a4db94011d3 502 * \retval STATUS_OK If the value was read correctly
sahilmgandhi 18:6a4db94011d3 503 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 504 * \retval STATUS_ERR_BAD_FORMAT If the module was not initialized in a mode
sahilmgandhi 18:6a4db94011d3 505 */
sahilmgandhi 18:6a4db94011d3 506 enum status_code rtc_count_get_compare(
sahilmgandhi 18:6a4db94011d3 507 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 508 uint32_t *const comp_value,
sahilmgandhi 18:6a4db94011d3 509 const enum rtc_count_compare comp_index)
sahilmgandhi 18:6a4db94011d3 510 {
sahilmgandhi 18:6a4db94011d3 511 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 512 Assert(module);
sahilmgandhi 18:6a4db94011d3 513 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 514
sahilmgandhi 18:6a4db94011d3 515 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 516
sahilmgandhi 18:6a4db94011d3 517 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 518 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 519 }
sahilmgandhi 18:6a4db94011d3 520
sahilmgandhi 18:6a4db94011d3 521 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 522 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 523 /* Check sanity of comp_index. */
sahilmgandhi 18:6a4db94011d3 524 if ((uint32_t)comp_index > RTC_COMP32_NUM) {
sahilmgandhi 18:6a4db94011d3 525 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 526 }
sahilmgandhi 18:6a4db94011d3 527
sahilmgandhi 18:6a4db94011d3 528 /* Get compare value for COMP. */
sahilmgandhi 18:6a4db94011d3 529 *comp_value = rtc_module->MODE0.COMP[comp_index].reg;
sahilmgandhi 18:6a4db94011d3 530
sahilmgandhi 18:6a4db94011d3 531 break;
sahilmgandhi 18:6a4db94011d3 532
sahilmgandhi 18:6a4db94011d3 533 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 534 /* Check sanity of comp_index. */
sahilmgandhi 18:6a4db94011d3 535 if ((uint32_t)comp_index > RTC_NUM_OF_COMP16) {
sahilmgandhi 18:6a4db94011d3 536 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 537 }
sahilmgandhi 18:6a4db94011d3 538
sahilmgandhi 18:6a4db94011d3 539 /* Get compare value for COMP. */
sahilmgandhi 18:6a4db94011d3 540 *comp_value = (uint32_t)rtc_module->MODE1.COMP[comp_index].reg;
sahilmgandhi 18:6a4db94011d3 541
sahilmgandhi 18:6a4db94011d3 542 break;
sahilmgandhi 18:6a4db94011d3 543
sahilmgandhi 18:6a4db94011d3 544 default:
sahilmgandhi 18:6a4db94011d3 545 Assert(false);
sahilmgandhi 18:6a4db94011d3 546 return STATUS_ERR_BAD_FORMAT;
sahilmgandhi 18:6a4db94011d3 547 }
sahilmgandhi 18:6a4db94011d3 548 /* Return status showing everything is OK. */
sahilmgandhi 18:6a4db94011d3 549 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 550 }
sahilmgandhi 18:6a4db94011d3 551
sahilmgandhi 18:6a4db94011d3 552 /**
sahilmgandhi 18:6a4db94011d3 553 * \brief Retrieves the value of period.
sahilmgandhi 18:6a4db94011d3 554 *
sahilmgandhi 18:6a4db94011d3 555 * Retrieves the value of the period for the 16-bit mode counter.
sahilmgandhi 18:6a4db94011d3 556 *
sahilmgandhi 18:6a4db94011d3 557 * \note Only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 558 *
sahilmgandhi 18:6a4db94011d3 559 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 560 * \param[out] period_value Pointer to value for return argument
sahilmgandhi 18:6a4db94011d3 561 *
sahilmgandhi 18:6a4db94011d3 562 * \return Status of getting the period value.
sahilmgandhi 18:6a4db94011d3 563 * \retval STATUS_OK If the period value was read correctly
sahilmgandhi 18:6a4db94011d3 564 * \retval STATUS_ERR_UNSUPPORTED_DEV If incorrect mode was set
sahilmgandhi 18:6a4db94011d3 565 */
sahilmgandhi 18:6a4db94011d3 566 enum status_code rtc_count_get_period(
sahilmgandhi 18:6a4db94011d3 567 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 568 uint16_t *const period_value)
sahilmgandhi 18:6a4db94011d3 569 {
sahilmgandhi 18:6a4db94011d3 570 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 571 Assert(module);
sahilmgandhi 18:6a4db94011d3 572 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 573
sahilmgandhi 18:6a4db94011d3 574 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 575
sahilmgandhi 18:6a4db94011d3 576 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 577 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 578 }
sahilmgandhi 18:6a4db94011d3 579
sahilmgandhi 18:6a4db94011d3 580 /* Check that correct mode is set. */
sahilmgandhi 18:6a4db94011d3 581 if (module->mode != RTC_COUNT_MODE_16BIT) {
sahilmgandhi 18:6a4db94011d3 582 return STATUS_ERR_UNSUPPORTED_DEV;
sahilmgandhi 18:6a4db94011d3 583 }
sahilmgandhi 18:6a4db94011d3 584
sahilmgandhi 18:6a4db94011d3 585 /* Returns the value. */
sahilmgandhi 18:6a4db94011d3 586 *period_value = rtc_module->MODE1.PER.reg;
sahilmgandhi 18:6a4db94011d3 587
sahilmgandhi 18:6a4db94011d3 588 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 589 }
sahilmgandhi 18:6a4db94011d3 590
sahilmgandhi 18:6a4db94011d3 591 /**
sahilmgandhi 18:6a4db94011d3 592 * \brief Set the given value to the period.
sahilmgandhi 18:6a4db94011d3 593 *
sahilmgandhi 18:6a4db94011d3 594 * Sets the given value to the period.
sahilmgandhi 18:6a4db94011d3 595 *
sahilmgandhi 18:6a4db94011d3 596 * \note Only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 597 *
sahilmgandhi 18:6a4db94011d3 598 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 599 * \param[in] period_value The value to set to the period
sahilmgandhi 18:6a4db94011d3 600 *
sahilmgandhi 18:6a4db94011d3 601 * \return Status of setting the period value.
sahilmgandhi 18:6a4db94011d3 602 * \retval STATUS_OK If the period was set correctly
sahilmgandhi 18:6a4db94011d3 603 * \retval STATUS_ERR_UNSUPPORTED_DEV If module is not operated in 16-bit mode
sahilmgandhi 18:6a4db94011d3 604 */
sahilmgandhi 18:6a4db94011d3 605 enum status_code rtc_count_set_period(
sahilmgandhi 18:6a4db94011d3 606 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 607 const uint16_t period_value)
sahilmgandhi 18:6a4db94011d3 608 {
sahilmgandhi 18:6a4db94011d3 609 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 610 Assert(module);
sahilmgandhi 18:6a4db94011d3 611 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 612
sahilmgandhi 18:6a4db94011d3 613 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 614
sahilmgandhi 18:6a4db94011d3 615 /* Check that correct mode is set. */
sahilmgandhi 18:6a4db94011d3 616 if (module->mode != RTC_COUNT_MODE_16BIT) {
sahilmgandhi 18:6a4db94011d3 617 return STATUS_ERR_UNSUPPORTED_DEV;
sahilmgandhi 18:6a4db94011d3 618 }
sahilmgandhi 18:6a4db94011d3 619
sahilmgandhi 18:6a4db94011d3 620 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 621 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 622 }
sahilmgandhi 18:6a4db94011d3 623
sahilmgandhi 18:6a4db94011d3 624 /* Write value to register. */
sahilmgandhi 18:6a4db94011d3 625 rtc_module->MODE1.PER.reg = period_value;
sahilmgandhi 18:6a4db94011d3 626
sahilmgandhi 18:6a4db94011d3 627 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 628 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 629 }
sahilmgandhi 18:6a4db94011d3 630
sahilmgandhi 18:6a4db94011d3 631 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 632 }
sahilmgandhi 18:6a4db94011d3 633
sahilmgandhi 18:6a4db94011d3 634 /**
sahilmgandhi 18:6a4db94011d3 635 * \brief Check if RTC compare match has occurred.
sahilmgandhi 18:6a4db94011d3 636 *
sahilmgandhi 18:6a4db94011d3 637 * Checks the compare flag to see if a match has occurred. The compare flag is
sahilmgandhi 18:6a4db94011d3 638 * set when there is a compare match between counter and the compare.
sahilmgandhi 18:6a4db94011d3 639 *
sahilmgandhi 18:6a4db94011d3 640 * \note Compare 4 and 5 are only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 641 *
sahilmgandhi 18:6a4db94011d3 642 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 643 * \param[in] comp_index Index of compare to check current flag
sahilmgandhi 18:6a4db94011d3 644 */
sahilmgandhi 18:6a4db94011d3 645 bool rtc_count_is_compare_match(
sahilmgandhi 18:6a4db94011d3 646 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 647 const enum rtc_count_compare comp_index)
sahilmgandhi 18:6a4db94011d3 648 {
sahilmgandhi 18:6a4db94011d3 649 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 650 Assert(module);
sahilmgandhi 18:6a4db94011d3 651 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 652
sahilmgandhi 18:6a4db94011d3 653 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 654
sahilmgandhi 18:6a4db94011d3 655 /* Check sanity. */
sahilmgandhi 18:6a4db94011d3 656 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 657 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 658 /* Check sanity for 32-bit mode. */
sahilmgandhi 18:6a4db94011d3 659 if (comp_index > RTC_COMP32_NUM) {
sahilmgandhi 18:6a4db94011d3 660 return false;
sahilmgandhi 18:6a4db94011d3 661 }
sahilmgandhi 18:6a4db94011d3 662
sahilmgandhi 18:6a4db94011d3 663 break;
sahilmgandhi 18:6a4db94011d3 664
sahilmgandhi 18:6a4db94011d3 665 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 666 /* Check sanity for 16-bit mode. */
sahilmgandhi 18:6a4db94011d3 667 if (comp_index > RTC_NUM_OF_COMP16) {
sahilmgandhi 18:6a4db94011d3 668 return false;
sahilmgandhi 18:6a4db94011d3 669 }
sahilmgandhi 18:6a4db94011d3 670
sahilmgandhi 18:6a4db94011d3 671 break;
sahilmgandhi 18:6a4db94011d3 672
sahilmgandhi 18:6a4db94011d3 673 default:
sahilmgandhi 18:6a4db94011d3 674 Assert(false);
sahilmgandhi 18:6a4db94011d3 675 return false;
sahilmgandhi 18:6a4db94011d3 676 }
sahilmgandhi 18:6a4db94011d3 677
sahilmgandhi 18:6a4db94011d3 678 /* Set status of INTFLAG as return argument. */
sahilmgandhi 18:6a4db94011d3 679 return (rtc_module->MODE0.INTFLAG.reg & RTC_MODE1_INTFLAG_CMP(1 << comp_index)) ? true : false;
sahilmgandhi 18:6a4db94011d3 680 }
sahilmgandhi 18:6a4db94011d3 681
sahilmgandhi 18:6a4db94011d3 682 /**
sahilmgandhi 18:6a4db94011d3 683 * \brief Clears RTC compare match flag.
sahilmgandhi 18:6a4db94011d3 684 *
sahilmgandhi 18:6a4db94011d3 685 * Clears the compare flag. The compare flag is set when there is a compare
sahilmgandhi 18:6a4db94011d3 686 * match between the counter and the compare.
sahilmgandhi 18:6a4db94011d3 687 *
sahilmgandhi 18:6a4db94011d3 688 * \note Compare 4 and 5 are only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 689 *
sahilmgandhi 18:6a4db94011d3 690 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 691 * \param[in] comp_index Index of compare to check current flag
sahilmgandhi 18:6a4db94011d3 692 *
sahilmgandhi 18:6a4db94011d3 693 * \return Status indicating if flag was successfully cleared.
sahilmgandhi 18:6a4db94011d3 694 * \retval STATUS_OK If flag was successfully cleared
sahilmgandhi 18:6a4db94011d3 695 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 696 * \retval STATUS_ERR_BAD_FORMAT If the module was not initialized in a mode
sahilmgandhi 18:6a4db94011d3 697 */
sahilmgandhi 18:6a4db94011d3 698 enum status_code rtc_count_clear_compare_match(
sahilmgandhi 18:6a4db94011d3 699 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 700 const enum rtc_count_compare comp_index)
sahilmgandhi 18:6a4db94011d3 701 {
sahilmgandhi 18:6a4db94011d3 702 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 703 Assert(module);
sahilmgandhi 18:6a4db94011d3 704 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 705
sahilmgandhi 18:6a4db94011d3 706 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 707
sahilmgandhi 18:6a4db94011d3 708 /* Check sanity. */
sahilmgandhi 18:6a4db94011d3 709 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 710 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 711 /* Check sanity for 32-bit mode. */
sahilmgandhi 18:6a4db94011d3 712 if (comp_index > RTC_COMP32_NUM) {
sahilmgandhi 18:6a4db94011d3 713 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 714 }
sahilmgandhi 18:6a4db94011d3 715
sahilmgandhi 18:6a4db94011d3 716 break;
sahilmgandhi 18:6a4db94011d3 717
sahilmgandhi 18:6a4db94011d3 718 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 719 /* Check sanity for 16-bit mode. */
sahilmgandhi 18:6a4db94011d3 720 if (comp_index > RTC_NUM_OF_COMP16) {
sahilmgandhi 18:6a4db94011d3 721 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 722 }
sahilmgandhi 18:6a4db94011d3 723
sahilmgandhi 18:6a4db94011d3 724 break;
sahilmgandhi 18:6a4db94011d3 725
sahilmgandhi 18:6a4db94011d3 726 default:
sahilmgandhi 18:6a4db94011d3 727 Assert(false);
sahilmgandhi 18:6a4db94011d3 728 return STATUS_ERR_BAD_FORMAT;
sahilmgandhi 18:6a4db94011d3 729 }
sahilmgandhi 18:6a4db94011d3 730
sahilmgandhi 18:6a4db94011d3 731 /* Clear INTFLAG. */
sahilmgandhi 18:6a4db94011d3 732 rtc_module->MODE0.INTFLAG.reg = RTC_MODE1_INTFLAG_CMP(1 << comp_index);
sahilmgandhi 18:6a4db94011d3 733
sahilmgandhi 18:6a4db94011d3 734 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 735 }
sahilmgandhi 18:6a4db94011d3 736
sahilmgandhi 18:6a4db94011d3 737 /**
sahilmgandhi 18:6a4db94011d3 738 * \brief Calibrate for too-slow or too-fast oscillator.
sahilmgandhi 18:6a4db94011d3 739 *
sahilmgandhi 18:6a4db94011d3 740 * When used, the RTC will compensate for an inaccurate oscillator. The
sahilmgandhi 18:6a4db94011d3 741 * RTC module will add or subtract cycles from the RTC prescaler to adjust the
sahilmgandhi 18:6a4db94011d3 742 * frequency in approximately 1 PPM steps. The provided correction value should
sahilmgandhi 18:6a4db94011d3 743 * be between 0 and 127, allowing for a maximum 127 PPM correction.
sahilmgandhi 18:6a4db94011d3 744 *
sahilmgandhi 18:6a4db94011d3 745 * If no correction is needed, set value to zero.
sahilmgandhi 18:6a4db94011d3 746 *
sahilmgandhi 18:6a4db94011d3 747 * \note Can only be used when the RTC is operated in 1Hz.
sahilmgandhi 18:6a4db94011d3 748 *
sahilmgandhi 18:6a4db94011d3 749 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 750 * \param[in] value Ranging from -127 to 127 used for the correction
sahilmgandhi 18:6a4db94011d3 751 *
sahilmgandhi 18:6a4db94011d3 752 * \return Status of the calibration procedure.
sahilmgandhi 18:6a4db94011d3 753 * \retval STATUS_OK If calibration was executed correctly
sahilmgandhi 18:6a4db94011d3 754 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 755 */
sahilmgandhi 18:6a4db94011d3 756 enum status_code rtc_count_frequency_correction(
sahilmgandhi 18:6a4db94011d3 757 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 758 const int8_t value)
sahilmgandhi 18:6a4db94011d3 759 {
sahilmgandhi 18:6a4db94011d3 760 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 761 Assert(module);
sahilmgandhi 18:6a4db94011d3 762 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 763
sahilmgandhi 18:6a4db94011d3 764 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 765
sahilmgandhi 18:6a4db94011d3 766 /* Check if valid argument. */
sahilmgandhi 18:6a4db94011d3 767 if (abs(value) > 0x7F) {
sahilmgandhi 18:6a4db94011d3 768 /* Value bigger than allowed, return invalid argument. */
sahilmgandhi 18:6a4db94011d3 769 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 770 }
sahilmgandhi 18:6a4db94011d3 771
sahilmgandhi 18:6a4db94011d3 772 uint32_t new_correction_value;
sahilmgandhi 18:6a4db94011d3 773
sahilmgandhi 18:6a4db94011d3 774 /* Load the new correction value as a positive value, sign added later */
sahilmgandhi 18:6a4db94011d3 775 new_correction_value = abs(value);
sahilmgandhi 18:6a4db94011d3 776
sahilmgandhi 18:6a4db94011d3 777 /* Convert to positive value and adjust register sign bit. */
sahilmgandhi 18:6a4db94011d3 778 if (value < 0) {
sahilmgandhi 18:6a4db94011d3 779 new_correction_value |= RTC_FREQCORR_SIGN;
sahilmgandhi 18:6a4db94011d3 780 }
sahilmgandhi 18:6a4db94011d3 781
sahilmgandhi 18:6a4db94011d3 782 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 783 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 784 }
sahilmgandhi 18:6a4db94011d3 785
sahilmgandhi 18:6a4db94011d3 786 /* Set value. */
sahilmgandhi 18:6a4db94011d3 787 rtc_module->MODE0.FREQCORR.reg = new_correction_value;
sahilmgandhi 18:6a4db94011d3 788
sahilmgandhi 18:6a4db94011d3 789 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 790 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 791 }
sahilmgandhi 18:6a4db94011d3 792
sahilmgandhi 18:6a4db94011d3 793 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 794 }
sahilmgandhi 18:6a4db94011d3 795