Mouse code for the MacroRat
mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/dma_api_HAL.h@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2006-2015 ARM Limited |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | |
sahilmgandhi | 18:6a4db94011d3 | 17 | #ifndef _DMA_API_HAL_H |
sahilmgandhi | 18:6a4db94011d3 | 18 | #define _DMA_API_HAL_H |
sahilmgandhi | 18:6a4db94011d3 | 19 | |
sahilmgandhi | 18:6a4db94011d3 | 20 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 21 | extern "C" { |
sahilmgandhi | 18:6a4db94011d3 | 22 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 23 | |
sahilmgandhi | 18:6a4db94011d3 | 24 | #include <compiler.h> |
sahilmgandhi | 18:6a4db94011d3 | 25 | #include "dma.h" |
sahilmgandhi | 18:6a4db94011d3 | 26 | |
sahilmgandhi | 18:6a4db94011d3 | 27 | enum dma_status_flags { |
sahilmgandhi | 18:6a4db94011d3 | 28 | DMA_NOT_USED = (uint32_t)1, |
sahilmgandhi | 18:6a4db94011d3 | 29 | DMA_ALLOCATED = (DMA_NOT_USED << 1), |
sahilmgandhi | 18:6a4db94011d3 | 30 | DMA_TEMPORARY = (DMA_NOT_USED << 2), |
sahilmgandhi | 18:6a4db94011d3 | 31 | DMA_ERROR = (DMA_NOT_USED << 3), |
sahilmgandhi | 18:6a4db94011d3 | 32 | }; |
sahilmgandhi | 18:6a4db94011d3 | 33 | |
sahilmgandhi | 18:6a4db94011d3 | 34 | /* No other capabilities supported now */ |
sahilmgandhi | 18:6a4db94011d3 | 35 | #define DMA_CAP_NONE 0 |
sahilmgandhi | 18:6a4db94011d3 | 36 | |
sahilmgandhi | 18:6a4db94011d3 | 37 | #define DMA_ADDRESS_INC_DISABLE 0 |
sahilmgandhi | 18:6a4db94011d3 | 38 | #define DMA_ADDRESS_INC_ENABLE 1 |
sahilmgandhi | 18:6a4db94011d3 | 39 | |
sahilmgandhi | 18:6a4db94011d3 | 40 | #define DMA_TRANSFER_ERROR ((uint32_t)1 << 1) |
sahilmgandhi | 18:6a4db94011d3 | 41 | #define DMA_TRANSFER_COMPLETE ((uint32_t)1 << 2) |
sahilmgandhi | 18:6a4db94011d3 | 42 | |
sahilmgandhi | 18:6a4db94011d3 | 43 | #define DMA_EVENT_ALL (DMA_TRANSFER_ERROR | DMA_TRANSFER_COMPLETE) |
sahilmgandhi | 18:6a4db94011d3 | 44 | |
sahilmgandhi | 18:6a4db94011d3 | 45 | |
sahilmgandhi | 18:6a4db94011d3 | 46 | COMPILER_ALIGNED(16) |
sahilmgandhi | 18:6a4db94011d3 | 47 | struct dma_instance_s { |
sahilmgandhi | 18:6a4db94011d3 | 48 | struct dma_resource resource; |
sahilmgandhi | 18:6a4db94011d3 | 49 | DmacDescriptor descriptor; |
sahilmgandhi | 18:6a4db94011d3 | 50 | uint8_t status; |
sahilmgandhi | 18:6a4db94011d3 | 51 | uint32_t events; |
sahilmgandhi | 18:6a4db94011d3 | 52 | uint32_t handler; |
sahilmgandhi | 18:6a4db94011d3 | 53 | }; |
sahilmgandhi | 18:6a4db94011d3 | 54 | |
sahilmgandhi | 18:6a4db94011d3 | 55 | /** Setup a DMA descriptor for specified resource |
sahilmgandhi | 18:6a4db94011d3 | 56 | * |
sahilmgandhi | 18:6a4db94011d3 | 57 | * @param[in] channel_index DMA channel id |
sahilmgandhi | 18:6a4db94011d3 | 58 | * @param[in] src source address |
sahilmgandhi | 18:6a4db94011d3 | 59 | * @param[in] src_inc_enable source address auto increment enable flag |
sahilmgandhi | 18:6a4db94011d3 | 60 | * @param[in] desc destination address |
sahilmgandhi | 18:6a4db94011d3 | 61 | * @param[in] desc_inc_enable destination address auto increment enable flag |
sahilmgandhi | 18:6a4db94011d3 | 62 | * @param[in] length length of data to be transferred |
sahilmgandhi | 18:6a4db94011d3 | 63 | * @param[in] beat_size beat size to be set |
sahilmgandhi | 18:6a4db94011d3 | 64 | * @return void |
sahilmgandhi | 18:6a4db94011d3 | 65 | */ |
sahilmgandhi | 18:6a4db94011d3 | 66 | void dma_setup_transfer(uint8_t channelid, uint32_t src, bool src_inc_enable, uint32_t desc, bool desc_inc_enable, uint32_t length, uint8_t beat_size); |
sahilmgandhi | 18:6a4db94011d3 | 67 | |
sahilmgandhi | 18:6a4db94011d3 | 68 | /** Start DMA transfer |
sahilmgandhi | 18:6a4db94011d3 | 69 | * |
sahilmgandhi | 18:6a4db94011d3 | 70 | * Kick starts transfer in DMA channel with specified channel id |
sahilmgandhi | 18:6a4db94011d3 | 71 | * @param[in] channelid Channel id of DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 72 | * @return non zero if success otherwise zero |
sahilmgandhi | 18:6a4db94011d3 | 73 | */ |
sahilmgandhi | 18:6a4db94011d3 | 74 | bool dma_start_transfer(int channelid); |
sahilmgandhi | 18:6a4db94011d3 | 75 | |
sahilmgandhi | 18:6a4db94011d3 | 76 | /** DMA channel busy check |
sahilmgandhi | 18:6a4db94011d3 | 77 | * |
sahilmgandhi | 18:6a4db94011d3 | 78 | * To check whether DMA channel is busy with a job or not |
sahilmgandhi | 18:6a4db94011d3 | 79 | * @param[in] channelid Channel id of DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 80 | * @return non zero if busy otherwise zero |
sahilmgandhi | 18:6a4db94011d3 | 81 | */ |
sahilmgandhi | 18:6a4db94011d3 | 82 | bool dma_busy(int channelid); |
sahilmgandhi | 18:6a4db94011d3 | 83 | |
sahilmgandhi | 18:6a4db94011d3 | 84 | /** DMA channel transfer completion check |
sahilmgandhi | 18:6a4db94011d3 | 85 | * |
sahilmgandhi | 18:6a4db94011d3 | 86 | * To check whether DMA channel job is completed or not |
sahilmgandhi | 18:6a4db94011d3 | 87 | * @param[in] channelid Channel id of DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 88 | * @return non zero if busy otherwise zero |
sahilmgandhi | 18:6a4db94011d3 | 89 | */ |
sahilmgandhi | 18:6a4db94011d3 | 90 | bool dma_is_transfer_complete(int channelid); |
sahilmgandhi | 18:6a4db94011d3 | 91 | |
sahilmgandhi | 18:6a4db94011d3 | 92 | /** Registers callback function for DMA |
sahilmgandhi | 18:6a4db94011d3 | 93 | * |
sahilmgandhi | 18:6a4db94011d3 | 94 | * Registers callback function for DMA for specified events |
sahilmgandhi | 18:6a4db94011d3 | 95 | * @param[in] channelid Channel id of DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 96 | * @param[in] handler Callback function pointer |
sahilmgandhi | 18:6a4db94011d3 | 97 | * @param[in] event Events mask |
sahilmgandhi | 18:6a4db94011d3 | 98 | * @return void |
sahilmgandhi | 18:6a4db94011d3 | 99 | */ |
sahilmgandhi | 18:6a4db94011d3 | 100 | void dma_set_handler(int channelid, uint32_t handler, uint32_t event); |
sahilmgandhi | 18:6a4db94011d3 | 101 | |
sahilmgandhi | 18:6a4db94011d3 | 102 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 103 | } |
sahilmgandhi | 18:6a4db94011d3 | 104 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 105 | |
sahilmgandhi | 18:6a4db94011d3 | 106 | #endif /* _DMA_API_HAL_H */ |