MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/platform/mbed_application.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2017-2017 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16
sahilmgandhi 18:6a4db94011d3 17 #include <stdlib.h>
sahilmgandhi 18:6a4db94011d3 18 #include <stdarg.h>
sahilmgandhi 18:6a4db94011d3 19 #include "device.h"
sahilmgandhi 18:6a4db94011d3 20 #include "platform/mbed_application.h"
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22 #if MBED_APPLICATION_SUPPORT
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 static void powerdown_nvic(void);
sahilmgandhi 18:6a4db94011d3 25 static void powerdown_scb(uint32_t vtor);
sahilmgandhi 18:6a4db94011d3 26 static void start_new_application(void *sp, void *pc);
sahilmgandhi 18:6a4db94011d3 27
sahilmgandhi 18:6a4db94011d3 28 void mbed_start_application(uintptr_t address)
sahilmgandhi 18:6a4db94011d3 29 {
sahilmgandhi 18:6a4db94011d3 30 void *sp;
sahilmgandhi 18:6a4db94011d3 31 void *pc;
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 // Interrupts are re-enabled in start_new_application
sahilmgandhi 18:6a4db94011d3 34 __disable_irq();
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 SysTick->CTRL = 0x00000000;
sahilmgandhi 18:6a4db94011d3 37 powerdown_nvic();
sahilmgandhi 18:6a4db94011d3 38 powerdown_scb(address);
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 sp = *((void**)address + 0);
sahilmgandhi 18:6a4db94011d3 41 pc = *((void**)address + 1);
sahilmgandhi 18:6a4db94011d3 42 start_new_application(sp, pc);
sahilmgandhi 18:6a4db94011d3 43 }
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 static void powerdown_nvic()
sahilmgandhi 18:6a4db94011d3 46 {
sahilmgandhi 18:6a4db94011d3 47 int isr_count;
sahilmgandhi 18:6a4db94011d3 48 int i;
sahilmgandhi 18:6a4db94011d3 49 int j;
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 isr_count = (SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos;
sahilmgandhi 18:6a4db94011d3 52 for (i = 0; i < isr_count; i++) {
sahilmgandhi 18:6a4db94011d3 53 NVIC->ICER[i] = 0xFFFFFFFF;
sahilmgandhi 18:6a4db94011d3 54 NVIC->ICPR[i] = 0xFFFFFFFF;
sahilmgandhi 18:6a4db94011d3 55 for (j = 0; j < 8; j++) {
sahilmgandhi 18:6a4db94011d3 56 NVIC->IP[i * 8 + j] = 0x00000000;
sahilmgandhi 18:6a4db94011d3 57 }
sahilmgandhi 18:6a4db94011d3 58 }
sahilmgandhi 18:6a4db94011d3 59 }
sahilmgandhi 18:6a4db94011d3 60
sahilmgandhi 18:6a4db94011d3 61 static void powerdown_scb(uint32_t vtor)
sahilmgandhi 18:6a4db94011d3 62 {
sahilmgandhi 18:6a4db94011d3 63 int i;
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 // SCB->CPUID - Read only CPU ID register
sahilmgandhi 18:6a4db94011d3 66 SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk;
sahilmgandhi 18:6a4db94011d3 67 SCB->VTOR = vtor;
sahilmgandhi 18:6a4db94011d3 68 SCB->AIRCR = 0x05FA | 0x0000;
sahilmgandhi 18:6a4db94011d3 69 SCB->SCR = 0x00000000;
sahilmgandhi 18:6a4db94011d3 70 // SCB->CCR - Implementation defined value
sahilmgandhi 18:6a4db94011d3 71 for (i = 0; i < 12; i++) {
sahilmgandhi 18:6a4db94011d3 72 #if defined(__CORTEX_M7)
sahilmgandhi 18:6a4db94011d3 73 SCB->SHPR[i] = 0x00;
sahilmgandhi 18:6a4db94011d3 74 #else
sahilmgandhi 18:6a4db94011d3 75 SCB->SHP[i] = 0x00;
sahilmgandhi 18:6a4db94011d3 76 #endif
sahilmgandhi 18:6a4db94011d3 77 }
sahilmgandhi 18:6a4db94011d3 78 SCB->SHCSR = 0x00000000;
sahilmgandhi 18:6a4db94011d3 79 SCB->CFSR = 0xFFFFFFFF;
sahilmgandhi 18:6a4db94011d3 80 SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk;
sahilmgandhi 18:6a4db94011d3 81 SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk |
sahilmgandhi 18:6a4db94011d3 82 SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk;
sahilmgandhi 18:6a4db94011d3 83 // SCB->MMFAR - Implementation defined value
sahilmgandhi 18:6a4db94011d3 84 // SCB->BFAR - Implementation defined value
sahilmgandhi 18:6a4db94011d3 85 // SCB->AFSR - Implementation defined value
sahilmgandhi 18:6a4db94011d3 86 // SCB->PFR - Read only processor feature register
sahilmgandhi 18:6a4db94011d3 87 // SCB->DFR - Read only debug feature registers
sahilmgandhi 18:6a4db94011d3 88 // SCB->ADR - Read only auxiliary feature registers
sahilmgandhi 18:6a4db94011d3 89 // SCB->MMFR - Read only memory model feature registers
sahilmgandhi 18:6a4db94011d3 90 // SCB->ISAR - Read only instruction set attribute registers
sahilmgandhi 18:6a4db94011d3 91 // SCB->CPACR - Implementation defined value
sahilmgandhi 18:6a4db94011d3 92 }
sahilmgandhi 18:6a4db94011d3 93
sahilmgandhi 18:6a4db94011d3 94 #if defined (__CC_ARM)
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 __asm static void start_new_application(void *sp, void *pc)
sahilmgandhi 18:6a4db94011d3 97 {
sahilmgandhi 18:6a4db94011d3 98 MOV R2, #0
sahilmgandhi 18:6a4db94011d3 99 MSR CONTROL, R2 // Switch to main stack
sahilmgandhi 18:6a4db94011d3 100 MOV SP, R0
sahilmgandhi 18:6a4db94011d3 101 MSR PRIMASK, R2 // Enable interrupts
sahilmgandhi 18:6a4db94011d3 102 BX R1
sahilmgandhi 18:6a4db94011d3 103 }
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105 #elif defined (__GNUC__) || defined (__ICCARM__)
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 void start_new_application(void *sp, void *pc)
sahilmgandhi 18:6a4db94011d3 108 {
sahilmgandhi 18:6a4db94011d3 109 __asm volatile (
sahilmgandhi 18:6a4db94011d3 110 "mov r2, #0 \n"
sahilmgandhi 18:6a4db94011d3 111 "msr control, r2 \n" // Switch to main stack
sahilmgandhi 18:6a4db94011d3 112 "mov sp, %0 \n"
sahilmgandhi 18:6a4db94011d3 113 "msr primask, r2 \n" // Enable interrupts
sahilmgandhi 18:6a4db94011d3 114 "bx %1 \n"
sahilmgandhi 18:6a4db94011d3 115 :
sahilmgandhi 18:6a4db94011d3 116 : "l" (sp), "l" (pc)
sahilmgandhi 18:6a4db94011d3 117 : "r2", "cc", "memory"
sahilmgandhi 18:6a4db94011d3 118 );
sahilmgandhi 18:6a4db94011d3 119 }
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 #else
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 #error "Unsupported toolchain"
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 #endif
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 #endif /* MBED_APPLICATION_SUPPORT */