MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/cmsis/arm_common_tables.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* ----------------------------------------------------------------------
sahilmgandhi 18:6a4db94011d3 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * $Date: 19. March 2015
sahilmgandhi 18:6a4db94011d3 5 * $Revision: V.1.4.5
sahilmgandhi 18:6a4db94011d3 6 *
sahilmgandhi 18:6a4db94011d3 7 * Project: CMSIS DSP Library
sahilmgandhi 18:6a4db94011d3 8 * Title: arm_common_tables.h
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
sahilmgandhi 18:6a4db94011d3 11 *
sahilmgandhi 18:6a4db94011d3 12 * Target Processor: Cortex-M4/Cortex-M3
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 15 * modification, are permitted provided that the following conditions
sahilmgandhi 18:6a4db94011d3 16 * are met:
sahilmgandhi 18:6a4db94011d3 17 * - Redistributions of source code must retain the above copyright
sahilmgandhi 18:6a4db94011d3 18 * notice, this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 19 * - Redistributions in binary form must reproduce the above copyright
sahilmgandhi 18:6a4db94011d3 20 * notice, this list of conditions and the following disclaimer in
sahilmgandhi 18:6a4db94011d3 21 * the documentation and/or other materials provided with the
sahilmgandhi 18:6a4db94011d3 22 * distribution.
sahilmgandhi 18:6a4db94011d3 23 * - Neither the name of ARM LIMITED nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 24 * may be used to endorse or promote products derived from this
sahilmgandhi 18:6a4db94011d3 25 * software without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
sahilmgandhi 18:6a4db94011d3 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
sahilmgandhi 18:6a4db94011d3 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
sahilmgandhi 18:6a4db94011d3 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
sahilmgandhi 18:6a4db94011d3 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
sahilmgandhi 18:6a4db94011d3 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
sahilmgandhi 18:6a4db94011d3 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
sahilmgandhi 18:6a4db94011d3 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
sahilmgandhi 18:6a4db94011d3 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
sahilmgandhi 18:6a4db94011d3 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
sahilmgandhi 18:6a4db94011d3 38 * POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 39 * -------------------------------------------------------------------- */
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 #ifndef _ARM_COMMON_TABLES_H
sahilmgandhi 18:6a4db94011d3 42 #define _ARM_COMMON_TABLES_H
sahilmgandhi 18:6a4db94011d3 43
sahilmgandhi 18:6a4db94011d3 44 #include "arm_math.h"
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 extern const uint16_t armBitRevTable[1024];
sahilmgandhi 18:6a4db94011d3 47 extern const q15_t armRecipTableQ15[64];
sahilmgandhi 18:6a4db94011d3 48 extern const q31_t armRecipTableQ31[64];
sahilmgandhi 18:6a4db94011d3 49 //extern const q31_t realCoefAQ31[1024];
sahilmgandhi 18:6a4db94011d3 50 //extern const q31_t realCoefBQ31[1024];
sahilmgandhi 18:6a4db94011d3 51 extern const float32_t twiddleCoef_16[32];
sahilmgandhi 18:6a4db94011d3 52 extern const float32_t twiddleCoef_32[64];
sahilmgandhi 18:6a4db94011d3 53 extern const float32_t twiddleCoef_64[128];
sahilmgandhi 18:6a4db94011d3 54 extern const float32_t twiddleCoef_128[256];
sahilmgandhi 18:6a4db94011d3 55 extern const float32_t twiddleCoef_256[512];
sahilmgandhi 18:6a4db94011d3 56 extern const float32_t twiddleCoef_512[1024];
sahilmgandhi 18:6a4db94011d3 57 extern const float32_t twiddleCoef_1024[2048];
sahilmgandhi 18:6a4db94011d3 58 extern const float32_t twiddleCoef_2048[4096];
sahilmgandhi 18:6a4db94011d3 59 extern const float32_t twiddleCoef_4096[8192];
sahilmgandhi 18:6a4db94011d3 60 #define twiddleCoef twiddleCoef_4096
sahilmgandhi 18:6a4db94011d3 61 extern const q31_t twiddleCoef_16_q31[24];
sahilmgandhi 18:6a4db94011d3 62 extern const q31_t twiddleCoef_32_q31[48];
sahilmgandhi 18:6a4db94011d3 63 extern const q31_t twiddleCoef_64_q31[96];
sahilmgandhi 18:6a4db94011d3 64 extern const q31_t twiddleCoef_128_q31[192];
sahilmgandhi 18:6a4db94011d3 65 extern const q31_t twiddleCoef_256_q31[384];
sahilmgandhi 18:6a4db94011d3 66 extern const q31_t twiddleCoef_512_q31[768];
sahilmgandhi 18:6a4db94011d3 67 extern const q31_t twiddleCoef_1024_q31[1536];
sahilmgandhi 18:6a4db94011d3 68 extern const q31_t twiddleCoef_2048_q31[3072];
sahilmgandhi 18:6a4db94011d3 69 extern const q31_t twiddleCoef_4096_q31[6144];
sahilmgandhi 18:6a4db94011d3 70 extern const q15_t twiddleCoef_16_q15[24];
sahilmgandhi 18:6a4db94011d3 71 extern const q15_t twiddleCoef_32_q15[48];
sahilmgandhi 18:6a4db94011d3 72 extern const q15_t twiddleCoef_64_q15[96];
sahilmgandhi 18:6a4db94011d3 73 extern const q15_t twiddleCoef_128_q15[192];
sahilmgandhi 18:6a4db94011d3 74 extern const q15_t twiddleCoef_256_q15[384];
sahilmgandhi 18:6a4db94011d3 75 extern const q15_t twiddleCoef_512_q15[768];
sahilmgandhi 18:6a4db94011d3 76 extern const q15_t twiddleCoef_1024_q15[1536];
sahilmgandhi 18:6a4db94011d3 77 extern const q15_t twiddleCoef_2048_q15[3072];
sahilmgandhi 18:6a4db94011d3 78 extern const q15_t twiddleCoef_4096_q15[6144];
sahilmgandhi 18:6a4db94011d3 79 extern const float32_t twiddleCoef_rfft_32[32];
sahilmgandhi 18:6a4db94011d3 80 extern const float32_t twiddleCoef_rfft_64[64];
sahilmgandhi 18:6a4db94011d3 81 extern const float32_t twiddleCoef_rfft_128[128];
sahilmgandhi 18:6a4db94011d3 82 extern const float32_t twiddleCoef_rfft_256[256];
sahilmgandhi 18:6a4db94011d3 83 extern const float32_t twiddleCoef_rfft_512[512];
sahilmgandhi 18:6a4db94011d3 84 extern const float32_t twiddleCoef_rfft_1024[1024];
sahilmgandhi 18:6a4db94011d3 85 extern const float32_t twiddleCoef_rfft_2048[2048];
sahilmgandhi 18:6a4db94011d3 86 extern const float32_t twiddleCoef_rfft_4096[4096];
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 /* floating-point bit reversal tables */
sahilmgandhi 18:6a4db94011d3 90 #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
sahilmgandhi 18:6a4db94011d3 91 #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
sahilmgandhi 18:6a4db94011d3 92 #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
sahilmgandhi 18:6a4db94011d3 93 #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
sahilmgandhi 18:6a4db94011d3 94 #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
sahilmgandhi 18:6a4db94011d3 95 #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
sahilmgandhi 18:6a4db94011d3 96 #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
sahilmgandhi 18:6a4db94011d3 97 #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
sahilmgandhi 18:6a4db94011d3 98 #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 101 extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 102 extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 103 extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 104 extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 105 extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 106 extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 107 extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 108 extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 /* fixed-point bit reversal tables */
sahilmgandhi 18:6a4db94011d3 111 #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 )
sahilmgandhi 18:6a4db94011d3 112 #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 )
sahilmgandhi 18:6a4db94011d3 113 #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 )
sahilmgandhi 18:6a4db94011d3 114 #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
sahilmgandhi 18:6a4db94011d3 115 #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
sahilmgandhi 18:6a4db94011d3 116 #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
sahilmgandhi 18:6a4db94011d3 117 #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
sahilmgandhi 18:6a4db94011d3 118 #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
sahilmgandhi 18:6a4db94011d3 119 #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 122 extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 123 extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 124 extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 125 extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 126 extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 127 extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 128 extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 129 extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 /* Tables for Fast Math Sine and Cosine */
sahilmgandhi 18:6a4db94011d3 132 extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
sahilmgandhi 18:6a4db94011d3 133 extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
sahilmgandhi 18:6a4db94011d3 134 extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
sahilmgandhi 18:6a4db94011d3 135
sahilmgandhi 18:6a4db94011d3 136 #endif /* ARM_COMMON_TABLES_H */