MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Silicon_Labs/TARGET_EFM32/TESTS/spi/basic-spi/main.cpp@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

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sahilmgandhi 18:6a4db94011d3 1 /***************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file main.cpp
sahilmgandhi 18:6a4db94011d3 3 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 4 * @section License
sahilmgandhi 18:6a4db94011d3 5 * <b>(C) Copyright 2016 Silicon Labs, http://www.silabs.com</b>
sahilmgandhi 18:6a4db94011d3 6 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * SPDX-License-Identifier: Apache-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Licensed under the Apache License, Version 2.0 (the "License"); you may
sahilmgandhi 18:6a4db94011d3 11 * not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 12 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 17 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
sahilmgandhi 18:6a4db94011d3 18 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 19 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 20 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 #include "mbed.h"
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 #include "greentea-client/test_env.h"
sahilmgandhi 18:6a4db94011d3 27 #include "unity/unity.h"
sahilmgandhi 18:6a4db94011d3 28 #include "utest/utest.h"
sahilmgandhi 18:6a4db94011d3 29
sahilmgandhi 18:6a4db94011d3 30 #include "em_cmu.h"
sahilmgandhi 18:6a4db94011d3 31 #include "em_gpio.h"
sahilmgandhi 18:6a4db94011d3 32 #include "em_prs.h"
sahilmgandhi 18:6a4db94011d3 33 #include "em_timer.h"
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 #define SHORT_TRANSFER_FRAMES 16
sahilmgandhi 18:6a4db94011d3 36 #define LONG_TRANSFER_FRAMES 1842
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 #if defined(TARGET_EFM32GG_STK3700) || defined(TARGET_EFM32LG_STK3600) || defined(TARGET_EFM32WG_STK3800)
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 #define TEST 1
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #define TEST_UART USART1
sahilmgandhi 18:6a4db94011d3 43 #define MOSI_PIN PD0
sahilmgandhi 18:6a4db94011d3 44 #define MISO_PIN PD1
sahilmgandhi 18:6a4db94011d3 45 #define CLK_PIN PD2
sahilmgandhi 18:6a4db94011d3 46 #define CS_PIN PD3
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 #define GPIO_PORT gpioPortD
sahilmgandhi 18:6a4db94011d3 49 #define GPIO_PIN_TX 0
sahilmgandhi 18:6a4db94011d3 50 #define GPIO_PIN_CLK 2
sahilmgandhi 18:6a4db94011d3 51 #define GPIO_PRS_SRC_TX PRS_CH_CTRL_SOURCESEL_GPIOL
sahilmgandhi 18:6a4db94011d3 52 #define GPIO_PRS_SIG_TX PRS_CH_CTRL_SIGSEL_GPIOPIN0
sahilmgandhi 18:6a4db94011d3 53 #define GPIO_PRS_SRC_CLK PRS_CH_CTRL_SOURCESEL_GPIOL
sahilmgandhi 18:6a4db94011d3 54 #define GPIO_PRS_SIG_CLK PRS_CH_CTRL_SIGSEL_GPIOPIN2
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 #define TEST_TIMER TIMER1
sahilmgandhi 18:6a4db94011d3 57 #define TEST_TIMER_CLOCK cmuClock_TIMER1
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 #elif defined(TARGET_EFM32PG_STK3401)
sahilmgandhi 18:6a4db94011d3 60
sahilmgandhi 18:6a4db94011d3 61 #define TEST 1
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 #define TEST_UART USART1
sahilmgandhi 18:6a4db94011d3 64 #define MOSI_PIN PC6
sahilmgandhi 18:6a4db94011d3 65 #define MISO_PIN PC7
sahilmgandhi 18:6a4db94011d3 66 #define CLK_PIN PC8
sahilmgandhi 18:6a4db94011d3 67 #define CS_PIN PC9
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 #define GPIO_PORT gpioPortC
sahilmgandhi 18:6a4db94011d3 70 #define GPIO_PIN_TX 6
sahilmgandhi 18:6a4db94011d3 71 #define GPIO_PIN_CLK 8
sahilmgandhi 18:6a4db94011d3 72 #define GPIO_PRS_SRC_TX PRS_CH_CTRL_SOURCESEL_GPIOL
sahilmgandhi 18:6a4db94011d3 73 #define GPIO_PRS_SIG_TX PRS_CH_CTRL_SIGSEL_GPIOPIN6
sahilmgandhi 18:6a4db94011d3 74 #define GPIO_PRS_SRC_CLK PRS_CH_CTRL_SOURCESEL_GPIOH
sahilmgandhi 18:6a4db94011d3 75 #define GPIO_PRS_SIG_CLK PRS_CH_CTRL_SIGSEL_GPIOPIN8
sahilmgandhi 18:6a4db94011d3 76
sahilmgandhi 18:6a4db94011d3 77 #define TEST_TIMER TIMER1
sahilmgandhi 18:6a4db94011d3 78 #define TEST_TIMER_CLOCK cmuClock_TIMER1
sahilmgandhi 18:6a4db94011d3 79
sahilmgandhi 18:6a4db94011d3 80 #else
sahilmgandhi 18:6a4db94011d3 81 #define TEST 0
sahilmgandhi 18:6a4db94011d3 82 #warning "Test config not defined; skipping test"
sahilmgandhi 18:6a4db94011d3 83 #endif
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 using namespace utest::v1;
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 #if TEST
sahilmgandhi 18:6a4db94011d3 88 DigitalOut cs(CS_PIN);
sahilmgandhi 18:6a4db94011d3 89 static volatile bool complete;
sahilmgandhi 18:6a4db94011d3 90 event_callback_t cb;
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 static uint8_t short_data_8[SHORT_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 93 static uint16_t short_data_16[SHORT_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 94 static uint32_t short_data_32[SHORT_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 static uint8_t short_data_8_rx[SHORT_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 97 static uint16_t short_data_16_rx[SHORT_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 98 static uint32_t short_data_32_rx[SHORT_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 static uint8_t long_data_8[LONG_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 101 static uint16_t long_data_16[LONG_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 102
sahilmgandhi 18:6a4db94011d3 103 static uint8_t long_data_8_rx[LONG_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 104 static uint16_t long_data_16_rx[LONG_TRANSFER_FRAMES];
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 void callbackFunction(int flags) {
sahilmgandhi 18:6a4db94011d3 107 complete = true;
sahilmgandhi 18:6a4db94011d3 108 }
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 void init_timer() {
sahilmgandhi 18:6a4db94011d3 111 CMU_ClockEnable(cmuClock_PRS, true);
sahilmgandhi 18:6a4db94011d3 112 CMU_ClockEnable(cmuClock_GPIO, true);
sahilmgandhi 18:6a4db94011d3 113 CMU_ClockEnable(TEST_TIMER_CLOCK, true);
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 // Setup USART TX pin as PRS producer
sahilmgandhi 18:6a4db94011d3 116 GPIO_IntConfig(GPIO_PORT, GPIO_PIN_TX, false, false, false);
sahilmgandhi 18:6a4db94011d3 117 PRS_SourceSignalSet(0,
sahilmgandhi 18:6a4db94011d3 118 GPIO_PRS_SRC_TX,
sahilmgandhi 18:6a4db94011d3 119 GPIO_PRS_SIG_TX,
sahilmgandhi 18:6a4db94011d3 120 prsEdgeOff);
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 // Setup USART CLK pin as PRS producer
sahilmgandhi 18:6a4db94011d3 123 GPIO_IntConfig(GPIO_PORT, GPIO_PIN_CLK, false, false, false);
sahilmgandhi 18:6a4db94011d3 124 PRS_SourceSignalSet(1,
sahilmgandhi 18:6a4db94011d3 125 GPIO_PRS_SRC_CLK,
sahilmgandhi 18:6a4db94011d3 126 GPIO_PRS_SIG_CLK,
sahilmgandhi 18:6a4db94011d3 127 prsEdgeOff);
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 // Setup timer to count on PRS pulses
sahilmgandhi 18:6a4db94011d3 130 TIMER_Init_TypeDef timInit = TIMER_INIT_DEFAULT;
sahilmgandhi 18:6a4db94011d3 131 timInit.enable = false;
sahilmgandhi 18:6a4db94011d3 132 timInit.clkSel = timerClkSelCC1;
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 TIMER_InitCC_TypeDef timInitCC = TIMER_INITCC_DEFAULT;
sahilmgandhi 18:6a4db94011d3 135 timInitCC.prsInput = true;
sahilmgandhi 18:6a4db94011d3 136 timInitCC.prsSel = timerPRSSELCh1;
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 TIMER_Init(TEST_TIMER, &timInit);
sahilmgandhi 18:6a4db94011d3 139 TIMER_InitCC(TEST_TIMER, 1, &timInitCC);
sahilmgandhi 18:6a4db94011d3 140
sahilmgandhi 18:6a4db94011d3 141 TIMER_Enable(TEST_TIMER, true);
sahilmgandhi 18:6a4db94011d3 142 }
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 template<typename T>
sahilmgandhi 18:6a4db94011d3 145 void init_arrays(T * tx, T * rx, int len, uint32_t mask) {
sahilmgandhi 18:6a4db94011d3 146 for (uint32_t i = 0; i < len; i++) {
sahilmgandhi 18:6a4db94011d3 147 if (tx) {
sahilmgandhi 18:6a4db94011d3 148 tx[i] = i & mask;
sahilmgandhi 18:6a4db94011d3 149 }
sahilmgandhi 18:6a4db94011d3 150 if (rx) {
sahilmgandhi 18:6a4db94011d3 151 rx[i] = 0;
sahilmgandhi 18:6a4db94011d3 152 }
sahilmgandhi 18:6a4db94011d3 153 }
sahilmgandhi 18:6a4db94011d3 154 }
sahilmgandhi 18:6a4db94011d3 155
sahilmgandhi 18:6a4db94011d3 156 template<typename T>
sahilmgandhi 18:6a4db94011d3 157 void test_transfer(int bits, int polarity, int freq, DMAUsage dma, T * data_tx, T * data_rx, int len) {
sahilmgandhi 18:6a4db94011d3 158 SPI spi(MOSI_PIN, MISO_PIN, CLK_PIN);
sahilmgandhi 18:6a4db94011d3 159
sahilmgandhi 18:6a4db94011d3 160 spi.format(bits, polarity);
sahilmgandhi 18:6a4db94011d3 161 spi.frequency(freq);
sahilmgandhi 18:6a4db94011d3 162
sahilmgandhi 18:6a4db94011d3 163 spi.set_dma_usage(dma);
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 // Clear RX buffer, setup tx pattern
sahilmgandhi 18:6a4db94011d3 166 init_arrays(data_tx, data_rx, len, (1 << bits) - 1);
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 // Set up PRS loopback of TX data to RX
sahilmgandhi 18:6a4db94011d3 169 TEST_UART->INPUT = USART_INPUT_RXPRS | USART_INPUT_RXPRSSEL_PRSCH0;
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 complete = false;
sahilmgandhi 18:6a4db94011d3 172 TIMER1->CNT = 0;
sahilmgandhi 18:6a4db94011d3 173 cs = 0;
sahilmgandhi 18:6a4db94011d3 174 spi.transfer(data_tx, len, data_rx, data_rx ? len : 0, cb);
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 while (!complete);
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 uint32_t xferred = TIMER1->CNT;
sahilmgandhi 18:6a4db94011d3 179 cs = 1;
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181 // Check that all bits were sent
sahilmgandhi 18:6a4db94011d3 182 TEST_ASSERT_EQUAL(bits*len, xferred);
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 // Check that all data was received correctly
sahilmgandhi 18:6a4db94011d3 185 if (data_rx) {
sahilmgandhi 18:6a4db94011d3 186 for (int i = 0; i < len; i++) {
sahilmgandhi 18:6a4db94011d3 187 TEST_ASSERT_EQUAL(data_tx[i], data_rx[i]);
sahilmgandhi 18:6a4db94011d3 188 }
sahilmgandhi 18:6a4db94011d3 189 }
sahilmgandhi 18:6a4db94011d3 190 }
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 ////////////////////////////////
sahilmgandhi 18:6a4db94011d3 193 // Short single transfers
sahilmgandhi 18:6a4db94011d3 194
sahilmgandhi 18:6a4db94011d3 195 void test_5bit_8bit_0_1mhz_short_transfer() {
sahilmgandhi 18:6a4db94011d3 196 test_transfer(5, 0, 1000000, DMA_USAGE_NEVER, short_data_8, short_data_8_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 197 }
sahilmgandhi 18:6a4db94011d3 198
sahilmgandhi 18:6a4db94011d3 199 void test_5bit_8bit_0_1mhz_short_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 200 test_transfer(5, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_8, short_data_8_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 201 }
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 void test_5bit_16bit_0_1mhz_short_transfer() {
sahilmgandhi 18:6a4db94011d3 204 test_transfer(5, 0, 1000000, DMA_USAGE_NEVER, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 205 }
sahilmgandhi 18:6a4db94011d3 206
sahilmgandhi 18:6a4db94011d3 207 void test_5bit_16bit_0_1mhz_short_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 208 test_transfer(5, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 209 }
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 void test_8bit_8bit_0_1mhz_short_transfer() {
sahilmgandhi 18:6a4db94011d3 212 test_transfer(8, 0, 1000000, DMA_USAGE_NEVER, short_data_8, short_data_8_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 213 }
sahilmgandhi 18:6a4db94011d3 214
sahilmgandhi 18:6a4db94011d3 215 void test_8bit_8bit_0_1mhz_short_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 216 test_transfer(8, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_8, short_data_8_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 217 }
sahilmgandhi 18:6a4db94011d3 218
sahilmgandhi 18:6a4db94011d3 219 void test_8bit_16bit_0_1mhz_short_transfer() {
sahilmgandhi 18:6a4db94011d3 220 test_transfer(8, 0, 1000000, DMA_USAGE_NEVER, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 221 }
sahilmgandhi 18:6a4db94011d3 222
sahilmgandhi 18:6a4db94011d3 223 void test_8bit_16bit_0_1mhz_short_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 224 test_transfer(8, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 225 }
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 ////////////////////////////////
sahilmgandhi 18:6a4db94011d3 228 // Short extended/double transfers
sahilmgandhi 18:6a4db94011d3 229
sahilmgandhi 18:6a4db94011d3 230 void test_9bit_16bit_0_1mhz_short_transfer() {
sahilmgandhi 18:6a4db94011d3 231 test_transfer(9, 0, 1000000, DMA_USAGE_NEVER, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 232 }
sahilmgandhi 18:6a4db94011d3 233
sahilmgandhi 18:6a4db94011d3 234 void test_9bit_16bit_0_1mhz_short_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 235 test_transfer(9, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 236 }
sahilmgandhi 18:6a4db94011d3 237
sahilmgandhi 18:6a4db94011d3 238 void test_9bit_32bit_0_1mhz_short_transfer() {
sahilmgandhi 18:6a4db94011d3 239 test_transfer(9, 0, 1000000, DMA_USAGE_NEVER, short_data_32, short_data_32_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 240 }
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 void test_9bit_32bit_0_1mhz_short_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 243 test_transfer(9, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_32, short_data_32_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 244 }
sahilmgandhi 18:6a4db94011d3 245
sahilmgandhi 18:6a4db94011d3 246 void test_16bit_16bit_0_1mhz_short_transfer() {
sahilmgandhi 18:6a4db94011d3 247 test_transfer(16, 0, 1000000, DMA_USAGE_NEVER, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 248 }
sahilmgandhi 18:6a4db94011d3 249
sahilmgandhi 18:6a4db94011d3 250 void test_16bit_16bit_0_1mhz_short_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 251 test_transfer(16, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 252 }
sahilmgandhi 18:6a4db94011d3 253
sahilmgandhi 18:6a4db94011d3 254 void test_16bit_32bit_0_1mhz_short_transfer() {
sahilmgandhi 18:6a4db94011d3 255 test_transfer(16, 0, 1000000, DMA_USAGE_NEVER, short_data_32, short_data_32_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 256 }
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258 void test_16bit_32bit_0_1mhz_short_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 259 test_transfer(16, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_32, short_data_32_rx, SHORT_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 260 }
sahilmgandhi 18:6a4db94011d3 261
sahilmgandhi 18:6a4db94011d3 262 ////////////////////////////////
sahilmgandhi 18:6a4db94011d3 263 // Long single transfers
sahilmgandhi 18:6a4db94011d3 264
sahilmgandhi 18:6a4db94011d3 265 void test_5bit_8bit_0_1mhz_long_transfer() {
sahilmgandhi 18:6a4db94011d3 266 test_transfer(5, 0, 1000000, DMA_USAGE_NEVER, long_data_8, long_data_8_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 267 }
sahilmgandhi 18:6a4db94011d3 268
sahilmgandhi 18:6a4db94011d3 269 void test_5bit_8bit_0_1mhz_long_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 270 test_transfer(5, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_8, long_data_8_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 271 }
sahilmgandhi 18:6a4db94011d3 272
sahilmgandhi 18:6a4db94011d3 273 void test_5bit_16bit_0_1mhz_long_transfer() {
sahilmgandhi 18:6a4db94011d3 274 test_transfer(5, 0, 1000000, DMA_USAGE_NEVER, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 275 }
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 void test_5bit_16bit_0_1mhz_long_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 278 test_transfer(5, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 279 }
sahilmgandhi 18:6a4db94011d3 280
sahilmgandhi 18:6a4db94011d3 281 void test_8bit_8bit_0_1mhz_long_transfer() {
sahilmgandhi 18:6a4db94011d3 282 test_transfer(8, 0, 1000000, DMA_USAGE_NEVER, long_data_8, long_data_8_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 283 }
sahilmgandhi 18:6a4db94011d3 284
sahilmgandhi 18:6a4db94011d3 285 void test_8bit_8bit_0_1mhz_long_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 286 test_transfer(8, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_8, long_data_8_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 287 }
sahilmgandhi 18:6a4db94011d3 288
sahilmgandhi 18:6a4db94011d3 289 void test_8bit_16bit_0_1mhz_long_transfer() {
sahilmgandhi 18:6a4db94011d3 290 test_transfer(8, 0, 1000000, DMA_USAGE_NEVER, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 291 }
sahilmgandhi 18:6a4db94011d3 292
sahilmgandhi 18:6a4db94011d3 293 void test_8bit_16bit_0_1mhz_long_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 294 test_transfer(8, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 295 }
sahilmgandhi 18:6a4db94011d3 296
sahilmgandhi 18:6a4db94011d3 297 ////////////////////////////////
sahilmgandhi 18:6a4db94011d3 298 // Long extended/double transfers
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 void test_9bit_16bit_0_1mhz_long_transfer() {
sahilmgandhi 18:6a4db94011d3 301 test_transfer(9, 0, 1000000, DMA_USAGE_NEVER, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 302 }
sahilmgandhi 18:6a4db94011d3 303
sahilmgandhi 18:6a4db94011d3 304 void test_9bit_16bit_0_1mhz_long_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 305 test_transfer(9, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 306 }
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 void test_16bit_16bit_0_1mhz_long_transfer() {
sahilmgandhi 18:6a4db94011d3 309 test_transfer(16, 0, 1000000, DMA_USAGE_NEVER, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 310 }
sahilmgandhi 18:6a4db94011d3 311
sahilmgandhi 18:6a4db94011d3 312 void test_16bit_16bit_0_1mhz_long_dma_transfer() {
sahilmgandhi 18:6a4db94011d3 313 test_transfer(16, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
sahilmgandhi 18:6a4db94011d3 314 }
sahilmgandhi 18:6a4db94011d3 315
sahilmgandhi 18:6a4db94011d3 316 ////////////////////////////////
sahilmgandhi 18:6a4db94011d3 317 #else
sahilmgandhi 18:6a4db94011d3 318 void test_dummy() {
sahilmgandhi 18:6a4db94011d3 319 TEST_IGNORE_MESSAGE("This test is not compatible with this target.");
sahilmgandhi 18:6a4db94011d3 320 }
sahilmgandhi 18:6a4db94011d3 321 #endif
sahilmgandhi 18:6a4db94011d3 322
sahilmgandhi 18:6a4db94011d3 323 utest::v1::status_t greentea_failure_handler(const Case *const source, const failure_t reason) {
sahilmgandhi 18:6a4db94011d3 324 greentea_case_failure_abort_handler(source, reason);
sahilmgandhi 18:6a4db94011d3 325 return STATUS_CONTINUE;
sahilmgandhi 18:6a4db94011d3 326 }
sahilmgandhi 18:6a4db94011d3 327
sahilmgandhi 18:6a4db94011d3 328 Case cases[] = {
sahilmgandhi 18:6a4db94011d3 329 #if TEST
sahilmgandhi 18:6a4db94011d3 330 Case("5-bit frames with 8-bit data, 1 MHz (short)", test_5bit_8bit_0_1mhz_short_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 331 Case("5-bit frames with 8-bit data, 1 MHz, DMA (short)", test_5bit_8bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 332 Case("5-bit frames with 16-bit data, 1 MHz (short)", test_5bit_16bit_0_1mhz_short_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 333 Case("5-bit frames with 16-bit data, 1 MHz, DMA (short)", test_5bit_16bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 334 Case("8-bit frames with 8-bit data, 1 MHz (short)", test_8bit_8bit_0_1mhz_short_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 335 Case("8-bit frames with 8-bit data, 1 MHz, DMA (short)", test_8bit_8bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 336 Case("8-bit frames with 16-bit data, 1 MHz (short)", test_8bit_16bit_0_1mhz_short_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 337 Case("8-bit frames with 16-bit data, 1 MHz, DMA (short)", test_8bit_16bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 338 Case("9-bit frames with 16-bit data, 1 MHz (short)", test_9bit_16bit_0_1mhz_short_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 339 Case("9-bit frames with 16-bit data, 1 MHz, DMA (short)", test_9bit_16bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 340 Case("9-bit frames with 32-bit data, 1 MHz (short)", test_9bit_32bit_0_1mhz_short_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 341 Case("9-bit frames with 32-bit data, 1 MHz, DMA (short)", test_9bit_32bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 342 Case("16-bit frames with 16-bit data, 1 MHz (short)", test_16bit_16bit_0_1mhz_short_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 343 Case("16-bit frames with 16-bit data, 1 MHz, DMA (short)", test_16bit_16bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 344 Case("16-bit frames with 32-bit data, 1 MHz (short)", test_16bit_32bit_0_1mhz_short_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 345 Case("16-bit frames with 32-bit data, 1 MHz, DMA (short)", test_16bit_32bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 346
sahilmgandhi 18:6a4db94011d3 347 Case("5-bit frames with 8-bit data, 1 MHz (long)", test_5bit_8bit_0_1mhz_long_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 348 Case("5-bit frames with 8-bit data, 1 MHz, DMA (long)", test_5bit_8bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 349 Case("5-bit frames with 16-bit data, 1 MHz (long)", test_5bit_16bit_0_1mhz_long_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 350 Case("5-bit frames with 16-bit data, 1 MHz, DMA (long)", test_5bit_16bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 351 Case("8-bit frames with 8-bit data, 1 MHz (long)", test_8bit_8bit_0_1mhz_long_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 352 Case("8-bit frames with 8-bit data, 1 MHz, DMA (long)", test_8bit_8bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 353 Case("8-bit frames with 16-bit data, 1 MHz (long)", test_8bit_16bit_0_1mhz_long_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 354 Case("8-bit frames with 16-bit data, 1 MHz, DMA (long)", test_8bit_16bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 355 Case("9-bit frames with 16-bit data, 1 MHz (long)", test_9bit_16bit_0_1mhz_long_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 356 Case("9-bit frames with 16-bit data, 1 MHz, DMA (long)", test_9bit_16bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 357 Case("16-bit frames with 16-bit data, 1 MHz (long)", test_16bit_16bit_0_1mhz_long_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 358 Case("16-bit frames with 16-bit data, 1 MHz, DMA (long)", test_16bit_16bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
sahilmgandhi 18:6a4db94011d3 359 #else
sahilmgandhi 18:6a4db94011d3 360 Case("Dummy case", test_dummy, greentea_failure_handler)
sahilmgandhi 18:6a4db94011d3 361 #endif
sahilmgandhi 18:6a4db94011d3 362 };
sahilmgandhi 18:6a4db94011d3 363
sahilmgandhi 18:6a4db94011d3 364 utest::v1::status_t greentea_test_setup(const size_t number_of_cases) {
sahilmgandhi 18:6a4db94011d3 365 GREENTEA_SETUP(25, "default_auto");
sahilmgandhi 18:6a4db94011d3 366 return greentea_test_setup_handler(number_of_cases);
sahilmgandhi 18:6a4db94011d3 367 }
sahilmgandhi 18:6a4db94011d3 368
sahilmgandhi 18:6a4db94011d3 369 Specification specification(greentea_test_setup, cases, greentea_test_teardown_handler);
sahilmgandhi 18:6a4db94011d3 370
sahilmgandhi 18:6a4db94011d3 371 int main() {
sahilmgandhi 18:6a4db94011d3 372 #if TEST
sahilmgandhi 18:6a4db94011d3 373 cs = 1;
sahilmgandhi 18:6a4db94011d3 374 cb.attach(callbackFunction);
sahilmgandhi 18:6a4db94011d3 375 init_timer();
sahilmgandhi 18:6a4db94011d3 376 #endif
sahilmgandhi 18:6a4db94011d3 377 Harness::run(specification);
sahilmgandhi 18:6a4db94011d3 378 }