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mbed-dev/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_lptim.h@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
| sahilmgandhi | 18:6a4db94011d3 | 3 | * @file stm32l0xx_hal_lptim.h |
| sahilmgandhi | 18:6a4db94011d3 | 4 | * @author MCD Application Team |
| sahilmgandhi | 18:6a4db94011d3 | 5 | * @version V1.7.0 |
| sahilmgandhi | 18:6a4db94011d3 | 6 | * @date 31-May-2016 |
| sahilmgandhi | 18:6a4db94011d3 | 7 | * @brief Header file of LPTIM HAL module. |
| sahilmgandhi | 18:6a4db94011d3 | 8 | ****************************************************************************** |
| sahilmgandhi | 18:6a4db94011d3 | 9 | * @attention |
| sahilmgandhi | 18:6a4db94011d3 | 10 | * |
| sahilmgandhi | 18:6a4db94011d3 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| sahilmgandhi | 18:6a4db94011d3 | 12 | * |
| sahilmgandhi | 18:6a4db94011d3 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| sahilmgandhi | 18:6a4db94011d3 | 14 | * are permitted provided that the following conditions are met: |
| sahilmgandhi | 18:6a4db94011d3 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| sahilmgandhi | 18:6a4db94011d3 | 16 | * this list of conditions and the following disclaimer. |
| sahilmgandhi | 18:6a4db94011d3 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| sahilmgandhi | 18:6a4db94011d3 | 18 | * this list of conditions and the following disclaimer in the documentation |
| sahilmgandhi | 18:6a4db94011d3 | 19 | * and/or other materials provided with the distribution. |
| sahilmgandhi | 18:6a4db94011d3 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| sahilmgandhi | 18:6a4db94011d3 | 21 | * may be used to endorse or promote products derived from this software |
| sahilmgandhi | 18:6a4db94011d3 | 22 | * without specific prior written permission. |
| sahilmgandhi | 18:6a4db94011d3 | 23 | * |
| sahilmgandhi | 18:6a4db94011d3 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| sahilmgandhi | 18:6a4db94011d3 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| sahilmgandhi | 18:6a4db94011d3 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| sahilmgandhi | 18:6a4db94011d3 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| sahilmgandhi | 18:6a4db94011d3 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| sahilmgandhi | 18:6a4db94011d3 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| sahilmgandhi | 18:6a4db94011d3 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| sahilmgandhi | 18:6a4db94011d3 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| sahilmgandhi | 18:6a4db94011d3 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| sahilmgandhi | 18:6a4db94011d3 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| sahilmgandhi | 18:6a4db94011d3 | 34 | * |
| sahilmgandhi | 18:6a4db94011d3 | 35 | ****************************************************************************** |
| sahilmgandhi | 18:6a4db94011d3 | 36 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 37 | |
| sahilmgandhi | 18:6a4db94011d3 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 39 | #ifndef __STM32L0xx_HAL_LPTIM_H |
| sahilmgandhi | 18:6a4db94011d3 | 40 | #define __STM32L0xx_HAL_LPTIM_H |
| sahilmgandhi | 18:6a4db94011d3 | 41 | |
| sahilmgandhi | 18:6a4db94011d3 | 42 | #ifdef __cplusplus |
| sahilmgandhi | 18:6a4db94011d3 | 43 | extern "C" { |
| sahilmgandhi | 18:6a4db94011d3 | 44 | #endif |
| sahilmgandhi | 18:6a4db94011d3 | 45 | |
| sahilmgandhi | 18:6a4db94011d3 | 46 | /* Includes ------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 47 | #include "stm32l0xx_hal_def.h" |
| sahilmgandhi | 18:6a4db94011d3 | 48 | |
| sahilmgandhi | 18:6a4db94011d3 | 49 | /** @addtogroup STM32L0xx_HAL_Driver |
| sahilmgandhi | 18:6a4db94011d3 | 50 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 51 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 52 | |
| sahilmgandhi | 18:6a4db94011d3 | 53 | /** @defgroup LPTIM LPTIM (Low power timer) |
| sahilmgandhi | 18:6a4db94011d3 | 54 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 55 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 56 | |
| sahilmgandhi | 18:6a4db94011d3 | 57 | /* Exported types ------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 58 | /** @defgroup LPTIM_Exported_Types LPTIM Exported Types |
| sahilmgandhi | 18:6a4db94011d3 | 59 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 60 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 61 | |
| sahilmgandhi | 18:6a4db94011d3 | 62 | /** @defgroup LPTIM_Clock_Configuration LPTIM Clock configuration structure |
| sahilmgandhi | 18:6a4db94011d3 | 63 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 64 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 65 | #define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)EXTI_IMR_IM29) /*!< External interrupt line 29 Connected to the LPTIM EXTI Line */ |
| sahilmgandhi | 18:6a4db94011d3 | 66 | |
| sahilmgandhi | 18:6a4db94011d3 | 67 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 68 | * @brief LPTIM Clock configuration definition |
| sahilmgandhi | 18:6a4db94011d3 | 69 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 70 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 71 | { |
| sahilmgandhi | 18:6a4db94011d3 | 72 | uint32_t Source; /*!< Selects the clock source. |
| sahilmgandhi | 18:6a4db94011d3 | 73 | This parameter can be a value of @ref LPTIM_Clock_Source */ |
| sahilmgandhi | 18:6a4db94011d3 | 74 | |
| sahilmgandhi | 18:6a4db94011d3 | 75 | uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. |
| sahilmgandhi | 18:6a4db94011d3 | 76 | This parameter can be a value of @ref LPTIM_Clock_Prescaler */ |
| sahilmgandhi | 18:6a4db94011d3 | 77 | |
| sahilmgandhi | 18:6a4db94011d3 | 78 | }LPTIM_ClockConfigTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 79 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 80 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 81 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 82 | |
| sahilmgandhi | 18:6a4db94011d3 | 83 | /** @defgroup LPTIM_ULPClock_Configuration LPTIM ULP Clock configuration structure |
| sahilmgandhi | 18:6a4db94011d3 | 84 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 85 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 86 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 87 | * @brief LPTIM ULP Clock configuration definition |
| sahilmgandhi | 18:6a4db94011d3 | 88 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 89 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 90 | { |
| sahilmgandhi | 18:6a4db94011d3 | 91 | uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit |
| sahilmgandhi | 18:6a4db94011d3 | 92 | if the ULPTIM input is selected. |
| sahilmgandhi | 18:6a4db94011d3 | 93 | Note: This parameter is used only when Ultra low power clock source is used. |
| sahilmgandhi | 18:6a4db94011d3 | 94 | Note: If the polarity is configured on 'both edges', an auxiliary clock |
| sahilmgandhi | 18:6a4db94011d3 | 95 | (one of the Low power oscillator) must be active. |
| sahilmgandhi | 18:6a4db94011d3 | 96 | This parameter can be a value of @ref LPTIM_Clock_Polarity */ |
| sahilmgandhi | 18:6a4db94011d3 | 97 | |
| sahilmgandhi | 18:6a4db94011d3 | 98 | uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. |
| sahilmgandhi | 18:6a4db94011d3 | 99 | Note: This parameter is used only when Ultra low power clock source is used. |
| sahilmgandhi | 18:6a4db94011d3 | 100 | This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ |
| sahilmgandhi | 18:6a4db94011d3 | 101 | |
| sahilmgandhi | 18:6a4db94011d3 | 102 | }LPTIM_ULPClockConfigTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 103 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 104 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 105 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 106 | |
| sahilmgandhi | 18:6a4db94011d3 | 107 | /** @defgroup LPTIM_Trigger_Configuration LPTIM Trigger configuration structure |
| sahilmgandhi | 18:6a4db94011d3 | 108 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 109 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 110 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 111 | * @brief LPTIM Trigger configuration structure |
| sahilmgandhi | 18:6a4db94011d3 | 112 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 113 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 114 | { |
| sahilmgandhi | 18:6a4db94011d3 | 115 | uint32_t Source; /*!< Selects the Trigger source. |
| sahilmgandhi | 18:6a4db94011d3 | 116 | This parameter can be a value of @ref LPTIMEx_Trigger_Source */ |
| sahilmgandhi | 18:6a4db94011d3 | 117 | |
| sahilmgandhi | 18:6a4db94011d3 | 118 | uint32_t ActiveEdge; /*!< Selects the Trigger active edge. |
| sahilmgandhi | 18:6a4db94011d3 | 119 | Note: This parameter is used only when an external trigger is used. |
| sahilmgandhi | 18:6a4db94011d3 | 120 | This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ |
| sahilmgandhi | 18:6a4db94011d3 | 121 | |
| sahilmgandhi | 18:6a4db94011d3 | 122 | uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. |
| sahilmgandhi | 18:6a4db94011d3 | 123 | Note: This parameter is used only when an external trigger is used. |
| sahilmgandhi | 18:6a4db94011d3 | 124 | This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ |
| sahilmgandhi | 18:6a4db94011d3 | 125 | }LPTIM_TriggerConfigTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 126 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 127 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 128 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 129 | |
| sahilmgandhi | 18:6a4db94011d3 | 130 | /** @defgroup LPTIM_Init_Configuration LPTIM Initialization configuration structure |
| sahilmgandhi | 18:6a4db94011d3 | 131 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 132 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 133 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 134 | * @brief LPTIM Initialization Structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 135 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 136 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 137 | { |
| sahilmgandhi | 18:6a4db94011d3 | 138 | LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 139 | |
| sahilmgandhi | 18:6a4db94011d3 | 140 | LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 141 | |
| sahilmgandhi | 18:6a4db94011d3 | 142 | LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 143 | |
| sahilmgandhi | 18:6a4db94011d3 | 144 | uint32_t OutputPolarity; /*!< Specifies the Output polarity. |
| sahilmgandhi | 18:6a4db94011d3 | 145 | This parameter can be a value of @ref LPTIM_Output_Polarity */ |
| sahilmgandhi | 18:6a4db94011d3 | 146 | |
| sahilmgandhi | 18:6a4db94011d3 | 147 | uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare |
| sahilmgandhi | 18:6a4db94011d3 | 148 | values is done immediately or after the end of current period. |
| sahilmgandhi | 18:6a4db94011d3 | 149 | This parameter can be a value of @ref LPTIM_Updating_Mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 150 | |
| sahilmgandhi | 18:6a4db94011d3 | 151 | uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event |
| sahilmgandhi | 18:6a4db94011d3 | 152 | or each external event. |
| sahilmgandhi | 18:6a4db94011d3 | 153 | This parameter can be a value of @ref LPTIM_Counter_Source */ |
| sahilmgandhi | 18:6a4db94011d3 | 154 | |
| sahilmgandhi | 18:6a4db94011d3 | 155 | }LPTIM_InitTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 156 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 157 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 158 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 159 | /** @defgroup LPTIM_State_structure LPTIM state definition |
| sahilmgandhi | 18:6a4db94011d3 | 160 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 161 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 162 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 163 | * @brief HAL LPTIM State structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 164 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 165 | typedef enum __HAL_LPTIM_StateTypeDef |
| sahilmgandhi | 18:6a4db94011d3 | 166 | { |
| sahilmgandhi | 18:6a4db94011d3 | 167 | HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ |
| sahilmgandhi | 18:6a4db94011d3 | 168 | HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
| sahilmgandhi | 18:6a4db94011d3 | 169 | HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ |
| sahilmgandhi | 18:6a4db94011d3 | 170 | HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ |
| sahilmgandhi | 18:6a4db94011d3 | 171 | HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ |
| sahilmgandhi | 18:6a4db94011d3 | 172 | }HAL_LPTIM_StateTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 173 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 174 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 175 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 176 | |
| sahilmgandhi | 18:6a4db94011d3 | 177 | /** @defgroup LPTIM_Handle LPTIM handler |
| sahilmgandhi | 18:6a4db94011d3 | 178 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 179 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 180 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 181 | * @brief LPTIM handle Structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 182 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 183 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 184 | { |
| sahilmgandhi | 18:6a4db94011d3 | 185 | LPTIM_TypeDef *Instance; /*!< Register base address */ |
| sahilmgandhi | 18:6a4db94011d3 | 186 | |
| sahilmgandhi | 18:6a4db94011d3 | 187 | LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 188 | |
| sahilmgandhi | 18:6a4db94011d3 | 189 | HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ |
| sahilmgandhi | 18:6a4db94011d3 | 190 | |
| sahilmgandhi | 18:6a4db94011d3 | 191 | HAL_LockTypeDef Lock; /*!< LPTIM locking object */ |
| sahilmgandhi | 18:6a4db94011d3 | 192 | |
| sahilmgandhi | 18:6a4db94011d3 | 193 | __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ |
| sahilmgandhi | 18:6a4db94011d3 | 194 | |
| sahilmgandhi | 18:6a4db94011d3 | 195 | }LPTIM_HandleTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 196 | |
| sahilmgandhi | 18:6a4db94011d3 | 197 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 198 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 199 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 200 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 201 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 202 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 203 | |
| sahilmgandhi | 18:6a4db94011d3 | 204 | /* Exported constants --------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 205 | |
| sahilmgandhi | 18:6a4db94011d3 | 206 | /** @defgroup LPTIM_Exported_Constants LPTIM Exported constants |
| sahilmgandhi | 18:6a4db94011d3 | 207 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 208 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 209 | |
| sahilmgandhi | 18:6a4db94011d3 | 210 | /* Check autoreload value */ |
| sahilmgandhi | 18:6a4db94011d3 | 211 | #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFU) |
| sahilmgandhi | 18:6a4db94011d3 | 212 | |
| sahilmgandhi | 18:6a4db94011d3 | 213 | /* Check compare value */ |
| sahilmgandhi | 18:6a4db94011d3 | 214 | #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFU) |
| sahilmgandhi | 18:6a4db94011d3 | 215 | |
| sahilmgandhi | 18:6a4db94011d3 | 216 | /** @defgroup LPTIM_Clock_Source Clock source |
| sahilmgandhi | 18:6a4db94011d3 | 217 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 218 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 219 | #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC ((uint32_t)0x00U) |
| sahilmgandhi | 18:6a4db94011d3 | 220 | #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL |
| sahilmgandhi | 18:6a4db94011d3 | 221 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 222 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 223 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 224 | #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 225 | ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) |
| sahilmgandhi | 18:6a4db94011d3 | 226 | |
| sahilmgandhi | 18:6a4db94011d3 | 227 | |
| sahilmgandhi | 18:6a4db94011d3 | 228 | /** @defgroup LPTIM_Clock_Prescaler Prescaler |
| sahilmgandhi | 18:6a4db94011d3 | 229 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 230 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 231 | #define LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000U) |
| sahilmgandhi | 18:6a4db94011d3 | 232 | #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 |
| sahilmgandhi | 18:6a4db94011d3 | 233 | #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 |
| sahilmgandhi | 18:6a4db94011d3 | 234 | #define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)) |
| sahilmgandhi | 18:6a4db94011d3 | 235 | #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 |
| sahilmgandhi | 18:6a4db94011d3 | 236 | #define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)) |
| sahilmgandhi | 18:6a4db94011d3 | 237 | #define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)) |
| sahilmgandhi | 18:6a4db94011d3 | 238 | #define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC) |
| sahilmgandhi | 18:6a4db94011d3 | 239 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 240 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 241 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 242 | |
| sahilmgandhi | 18:6a4db94011d3 | 243 | #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 244 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 245 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 246 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 247 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 248 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 249 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 250 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) |
| sahilmgandhi | 18:6a4db94011d3 | 251 | |
| sahilmgandhi | 18:6a4db94011d3 | 252 | #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) |
| sahilmgandhi | 18:6a4db94011d3 | 253 | |
| sahilmgandhi | 18:6a4db94011d3 | 254 | |
| sahilmgandhi | 18:6a4db94011d3 | 255 | /** @defgroup LPTIM_Output_Polarity Output polarity |
| sahilmgandhi | 18:6a4db94011d3 | 256 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 257 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 258 | #define LPTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000U) |
| sahilmgandhi | 18:6a4db94011d3 | 259 | #define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL) |
| sahilmgandhi | 18:6a4db94011d3 | 260 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 261 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 262 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 263 | #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 264 | ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH)) |
| sahilmgandhi | 18:6a4db94011d3 | 265 | |
| sahilmgandhi | 18:6a4db94011d3 | 266 | /** @defgroup LPTIM_Clock_Sample_Time Clock sample time |
| sahilmgandhi | 18:6a4db94011d3 | 267 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 268 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 269 | #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U) |
| sahilmgandhi | 18:6a4db94011d3 | 270 | #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 |
| sahilmgandhi | 18:6a4db94011d3 | 271 | #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 |
| sahilmgandhi | 18:6a4db94011d3 | 272 | #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT |
| sahilmgandhi | 18:6a4db94011d3 | 273 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 274 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 275 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 276 | #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 277 | ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 278 | ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 279 | ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) |
| sahilmgandhi | 18:6a4db94011d3 | 280 | |
| sahilmgandhi | 18:6a4db94011d3 | 281 | /** @defgroup LPTIM_Clock_Polarity Clock polarity |
| sahilmgandhi | 18:6a4db94011d3 | 282 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 283 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 284 | #define LPTIM_CLOCKPOLARITY_RISING ((uint32_t)0x00000000U) |
| sahilmgandhi | 18:6a4db94011d3 | 285 | #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 |
| sahilmgandhi | 18:6a4db94011d3 | 286 | #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 |
| sahilmgandhi | 18:6a4db94011d3 | 287 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 288 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 289 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 290 | |
| sahilmgandhi | 18:6a4db94011d3 | 291 | #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 292 | ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 293 | ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) |
| sahilmgandhi | 18:6a4db94011d3 | 294 | |
| sahilmgandhi | 18:6a4db94011d3 | 295 | /** @defgroup LPTIM_External_Trigger_Polarity Trigger polarity |
| sahilmgandhi | 18:6a4db94011d3 | 296 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 297 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 298 | #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 |
| sahilmgandhi | 18:6a4db94011d3 | 299 | #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 |
| sahilmgandhi | 18:6a4db94011d3 | 300 | #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN |
| sahilmgandhi | 18:6a4db94011d3 | 301 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 302 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 303 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 304 | #define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__) (((__POLAR__) == LPTIM_ACTIVEEDGE_RISING ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 305 | ((__POLAR__) == LPTIM_ACTIVEEDGE_FALLING ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 306 | ((__POLAR__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) |
| sahilmgandhi | 18:6a4db94011d3 | 307 | |
| sahilmgandhi | 18:6a4db94011d3 | 308 | /** @defgroup LPTIM_Trigger_Sample_Time Trigger sample time |
| sahilmgandhi | 18:6a4db94011d3 | 309 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 310 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 311 | #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U) |
| sahilmgandhi | 18:6a4db94011d3 | 312 | #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 |
| sahilmgandhi | 18:6a4db94011d3 | 313 | #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 |
| sahilmgandhi | 18:6a4db94011d3 | 314 | #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT |
| sahilmgandhi | 18:6a4db94011d3 | 315 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 316 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 317 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 318 | #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 319 | ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 320 | ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 321 | ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) |
| sahilmgandhi | 18:6a4db94011d3 | 322 | |
| sahilmgandhi | 18:6a4db94011d3 | 323 | |
| sahilmgandhi | 18:6a4db94011d3 | 324 | /** @defgroup LPTIM_Updating_Mode Updating mode |
| sahilmgandhi | 18:6a4db94011d3 | 325 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 326 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 327 | |
| sahilmgandhi | 18:6a4db94011d3 | 328 | #define LPTIM_UPDATE_IMMEDIATE ((uint32_t)0x00000000U) |
| sahilmgandhi | 18:6a4db94011d3 | 329 | #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD |
| sahilmgandhi | 18:6a4db94011d3 | 330 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 331 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 332 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 333 | #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 334 | ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) |
| sahilmgandhi | 18:6a4db94011d3 | 335 | |
| sahilmgandhi | 18:6a4db94011d3 | 336 | |
| sahilmgandhi | 18:6a4db94011d3 | 337 | |
| sahilmgandhi | 18:6a4db94011d3 | 338 | /** @defgroup LPTIM_Counter_Source Counter source |
| sahilmgandhi | 18:6a4db94011d3 | 339 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 340 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 341 | #define LPTIM_COUNTERSOURCE_INTERNAL ((uint32_t)0x00000000U) |
| sahilmgandhi | 18:6a4db94011d3 | 342 | #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE |
| sahilmgandhi | 18:6a4db94011d3 | 343 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 344 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 345 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 346 | #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 347 | ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) |
| sahilmgandhi | 18:6a4db94011d3 | 348 | |
| sahilmgandhi | 18:6a4db94011d3 | 349 | |
| sahilmgandhi | 18:6a4db94011d3 | 350 | |
| sahilmgandhi | 18:6a4db94011d3 | 351 | /* Check for period value */ |
| sahilmgandhi | 18:6a4db94011d3 | 352 | #define IS_LPTIM_PERIOD(__PERIOD__) ((__PERIOD__) <= 0x0000FFFFU) |
| sahilmgandhi | 18:6a4db94011d3 | 353 | |
| sahilmgandhi | 18:6a4db94011d3 | 354 | /* Check for pulse value */ |
| sahilmgandhi | 18:6a4db94011d3 | 355 | #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFU) |
| sahilmgandhi | 18:6a4db94011d3 | 356 | |
| sahilmgandhi | 18:6a4db94011d3 | 357 | /** @defgroup LPTIM_Flag_Definition Flag definition |
| sahilmgandhi | 18:6a4db94011d3 | 358 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 359 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 360 | #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN |
| sahilmgandhi | 18:6a4db94011d3 | 361 | #define LPTIM_FLAG_UP LPTIM_ISR_UP |
| sahilmgandhi | 18:6a4db94011d3 | 362 | #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK |
| sahilmgandhi | 18:6a4db94011d3 | 363 | #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK |
| sahilmgandhi | 18:6a4db94011d3 | 364 | #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG |
| sahilmgandhi | 18:6a4db94011d3 | 365 | #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM |
| sahilmgandhi | 18:6a4db94011d3 | 366 | #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM |
| sahilmgandhi | 18:6a4db94011d3 | 367 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 368 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 369 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 370 | |
| sahilmgandhi | 18:6a4db94011d3 | 371 | /** @defgroup LPTIM_Interrupts_Definition Interrupts definition |
| sahilmgandhi | 18:6a4db94011d3 | 372 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 373 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 374 | #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE |
| sahilmgandhi | 18:6a4db94011d3 | 375 | #define LPTIM_IT_UP LPTIM_IER_UPIE |
| sahilmgandhi | 18:6a4db94011d3 | 376 | #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE |
| sahilmgandhi | 18:6a4db94011d3 | 377 | #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE |
| sahilmgandhi | 18:6a4db94011d3 | 378 | #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE |
| sahilmgandhi | 18:6a4db94011d3 | 379 | #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE |
| sahilmgandhi | 18:6a4db94011d3 | 380 | #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE |
| sahilmgandhi | 18:6a4db94011d3 | 381 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 382 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 383 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 384 | |
| sahilmgandhi | 18:6a4db94011d3 | 385 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 386 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 387 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 388 | |
| sahilmgandhi | 18:6a4db94011d3 | 389 | /* Exported macro ------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 390 | |
| sahilmgandhi | 18:6a4db94011d3 | 391 | /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros |
| sahilmgandhi | 18:6a4db94011d3 | 392 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 393 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 394 | |
| sahilmgandhi | 18:6a4db94011d3 | 395 | /** @brief Reset LPTIM handle state |
| sahilmgandhi | 18:6a4db94011d3 | 396 | * @param __HANDLE__: LPTIM handle |
| sahilmgandhi | 18:6a4db94011d3 | 397 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 398 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 399 | #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET) |
| sahilmgandhi | 18:6a4db94011d3 | 400 | |
| sahilmgandhi | 18:6a4db94011d3 | 401 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 402 | * @brief Enable/Disable the LPTIM peripheral. |
| sahilmgandhi | 18:6a4db94011d3 | 403 | * @param __HANDLE__: LPTIM handle |
| sahilmgandhi | 18:6a4db94011d3 | 404 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 405 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 406 | #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) |
| sahilmgandhi | 18:6a4db94011d3 | 407 | #define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE)) |
| sahilmgandhi | 18:6a4db94011d3 | 408 | |
| sahilmgandhi | 18:6a4db94011d3 | 409 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 410 | * @brief Starts the LPTIM peripheral in Continuous or in single mode. |
| sahilmgandhi | 18:6a4db94011d3 | 411 | * @param __HANDLE__: DMA handle |
| sahilmgandhi | 18:6a4db94011d3 | 412 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 413 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 414 | #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) |
| sahilmgandhi | 18:6a4db94011d3 | 415 | #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) |
| sahilmgandhi | 18:6a4db94011d3 | 416 | |
| sahilmgandhi | 18:6a4db94011d3 | 417 | |
| sahilmgandhi | 18:6a4db94011d3 | 418 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 419 | * @brief Writes the passed parameter in the Autoreload register. |
| sahilmgandhi | 18:6a4db94011d3 | 420 | * @param __HANDLE__: LPTIM handle |
| sahilmgandhi | 18:6a4db94011d3 | 421 | * @param __VALUE__ : Autoreload value |
| sahilmgandhi | 18:6a4db94011d3 | 422 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 423 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 424 | #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) |
| sahilmgandhi | 18:6a4db94011d3 | 425 | |
| sahilmgandhi | 18:6a4db94011d3 | 426 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 427 | * @brief Writes the passed parameter in the Compare register. |
| sahilmgandhi | 18:6a4db94011d3 | 428 | * @param __HANDLE__: LPTIM handle |
| sahilmgandhi | 18:6a4db94011d3 | 429 | * @param __VALUE__ : Compare value |
| sahilmgandhi | 18:6a4db94011d3 | 430 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 431 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 432 | #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__)) |
| sahilmgandhi | 18:6a4db94011d3 | 433 | |
| sahilmgandhi | 18:6a4db94011d3 | 434 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 435 | * @brief Checks whether the specified LPTIM flag is set or not. |
| sahilmgandhi | 18:6a4db94011d3 | 436 | * @param __HANDLE__: LPTIM handle |
| sahilmgandhi | 18:6a4db94011d3 | 437 | * @param __FLAG__ : LPTIM flag to check |
| sahilmgandhi | 18:6a4db94011d3 | 438 | * This parameter can be a value of: |
| sahilmgandhi | 18:6a4db94011d3 | 439 | * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 440 | * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 441 | * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 442 | * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 443 | * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 444 | * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 445 | * @arg LPTIM_FLAG_CMPM : Compare match Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 446 | * @retval The state of the specified flag (SET or RESET). |
| sahilmgandhi | 18:6a4db94011d3 | 447 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 448 | #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) |
| sahilmgandhi | 18:6a4db94011d3 | 449 | |
| sahilmgandhi | 18:6a4db94011d3 | 450 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 451 | * @brief Clears the specified LPTIM flag. |
| sahilmgandhi | 18:6a4db94011d3 | 452 | * @param __HANDLE__: LPTIM handle. |
| sahilmgandhi | 18:6a4db94011d3 | 453 | * @param __FLAG__ : LPTIM flag to clear. |
| sahilmgandhi | 18:6a4db94011d3 | 454 | * This parameter can be a value of: |
| sahilmgandhi | 18:6a4db94011d3 | 455 | * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 456 | * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 457 | * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 458 | * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 459 | * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 460 | * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 461 | * @arg LPTIM_FLAG_CMPM : Compare match Flag. |
| sahilmgandhi | 18:6a4db94011d3 | 462 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 463 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 464 | #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| sahilmgandhi | 18:6a4db94011d3 | 465 | |
| sahilmgandhi | 18:6a4db94011d3 | 466 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 467 | * @brief Enable the specified LPTIM interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 468 | * @param __HANDLE__ : LPTIM handle. |
| sahilmgandhi | 18:6a4db94011d3 | 469 | * @param __INTERRUPT__ : LPTIM interrupt to set. |
| sahilmgandhi | 18:6a4db94011d3 | 470 | * This parameter can be a value of: |
| sahilmgandhi | 18:6a4db94011d3 | 471 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 472 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 473 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 474 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 475 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 476 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 477 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 478 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 479 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 480 | #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
| sahilmgandhi | 18:6a4db94011d3 | 481 | |
| sahilmgandhi | 18:6a4db94011d3 | 482 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 483 | * @brief Disable the specified LPTIM interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 484 | * @param __HANDLE__ : LPTIM handle. |
| sahilmgandhi | 18:6a4db94011d3 | 485 | * @param __INTERRUPT__ : LPTIM interrupt to set. |
| sahilmgandhi | 18:6a4db94011d3 | 486 | * This parameter can be a value of: |
| sahilmgandhi | 18:6a4db94011d3 | 487 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 488 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 489 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 490 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 491 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 492 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 493 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 494 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 495 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 496 | #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) |
| sahilmgandhi | 18:6a4db94011d3 | 497 | |
| sahilmgandhi | 18:6a4db94011d3 | 498 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 499 | * @brief Checks whether the specified LPTIM interrupt is set or not. |
| sahilmgandhi | 18:6a4db94011d3 | 500 | * @param __HANDLE__ : LPTIM handle. |
| sahilmgandhi | 18:6a4db94011d3 | 501 | * @param __INTERRUPT__ : LPTIM interrupt to check. |
| sahilmgandhi | 18:6a4db94011d3 | 502 | * This parameter can be a value of: |
| sahilmgandhi | 18:6a4db94011d3 | 503 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 504 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 505 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 506 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 507 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 508 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 509 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 510 | * @retval Interrupt status. |
| sahilmgandhi | 18:6a4db94011d3 | 511 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 512 | |
| sahilmgandhi | 18:6a4db94011d3 | 513 | #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| sahilmgandhi | 18:6a4db94011d3 | 514 | |
| sahilmgandhi | 18:6a4db94011d3 | 515 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 516 | * @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 517 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 518 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 519 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| sahilmgandhi | 18:6a4db94011d3 | 520 | |
| sahilmgandhi | 18:6a4db94011d3 | 521 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 522 | * @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 523 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 524 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 525 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
| sahilmgandhi | 18:6a4db94011d3 | 526 | |
| sahilmgandhi | 18:6a4db94011d3 | 527 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 528 | * @brief Enable event on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 529 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 530 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 531 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| sahilmgandhi | 18:6a4db94011d3 | 532 | |
| sahilmgandhi | 18:6a4db94011d3 | 533 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 534 | * @brief Disable event on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 535 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 536 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 537 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
| sahilmgandhi | 18:6a4db94011d3 | 538 | |
| sahilmgandhi | 18:6a4db94011d3 | 539 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 540 | * @brief Enable falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 541 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 542 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 543 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| sahilmgandhi | 18:6a4db94011d3 | 544 | |
| sahilmgandhi | 18:6a4db94011d3 | 545 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 546 | * @brief Disable falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 547 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 548 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 549 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
| sahilmgandhi | 18:6a4db94011d3 | 550 | |
| sahilmgandhi | 18:6a4db94011d3 | 551 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 552 | * @brief Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 553 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 554 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 555 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| sahilmgandhi | 18:6a4db94011d3 | 556 | |
| sahilmgandhi | 18:6a4db94011d3 | 557 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 558 | * @brief Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 559 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 560 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 561 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
| sahilmgandhi | 18:6a4db94011d3 | 562 | |
| sahilmgandhi | 18:6a4db94011d3 | 563 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 564 | * @brief Enable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 565 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 566 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 567 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\ |
| sahilmgandhi | 18:6a4db94011d3 | 568 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\ |
| sahilmgandhi | 18:6a4db94011d3 | 569 | }while(0) |
| sahilmgandhi | 18:6a4db94011d3 | 570 | |
| sahilmgandhi | 18:6a4db94011d3 | 571 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 572 | * @brief Disable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 573 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 574 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 575 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\ |
| sahilmgandhi | 18:6a4db94011d3 | 576 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\ |
| sahilmgandhi | 18:6a4db94011d3 | 577 | }while(0) |
| sahilmgandhi | 18:6a4db94011d3 | 578 | |
| sahilmgandhi | 18:6a4db94011d3 | 579 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 580 | * @brief Check whether the LPTIM Wake-up Timer associated Exti line interrupt flag is set or not. |
| sahilmgandhi | 18:6a4db94011d3 | 581 | * @retval Line Status. |
| sahilmgandhi | 18:6a4db94011d3 | 582 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 583 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| sahilmgandhi | 18:6a4db94011d3 | 584 | |
| sahilmgandhi | 18:6a4db94011d3 | 585 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 586 | * @brief Clear the LPTIM Wake-up Timer associated Exti line flag. |
| sahilmgandhi | 18:6a4db94011d3 | 587 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 588 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 589 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| sahilmgandhi | 18:6a4db94011d3 | 590 | |
| sahilmgandhi | 18:6a4db94011d3 | 591 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 592 | * @brief Generate a Software interrupt on the LPTIM Wake-up Timer associated Exti line. |
| sahilmgandhi | 18:6a4db94011d3 | 593 | * @retval None. |
| sahilmgandhi | 18:6a4db94011d3 | 594 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 595 | #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
| sahilmgandhi | 18:6a4db94011d3 | 596 | |
| sahilmgandhi | 18:6a4db94011d3 | 597 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 598 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 599 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 600 | |
| sahilmgandhi | 18:6a4db94011d3 | 601 | |
| sahilmgandhi | 18:6a4db94011d3 | 602 | /* Include LPTIM HAL Extension module */ |
| sahilmgandhi | 18:6a4db94011d3 | 603 | #include "stm32l0xx_hal_lptim_ex.h" |
| sahilmgandhi | 18:6a4db94011d3 | 604 | |
| sahilmgandhi | 18:6a4db94011d3 | 605 | /* Exported functions --------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 606 | |
| sahilmgandhi | 18:6a4db94011d3 | 607 | /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions |
| sahilmgandhi | 18:6a4db94011d3 | 608 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 609 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 610 | /* Initialization/de-initialization functions ********************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 611 | |
| sahilmgandhi | 18:6a4db94011d3 | 612 | /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions |
| sahilmgandhi | 18:6a4db94011d3 | 613 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 614 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 615 | HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 616 | HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 617 | |
| sahilmgandhi | 18:6a4db94011d3 | 618 | |
| sahilmgandhi | 18:6a4db94011d3 | 619 | /* MSP functions *************************************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 620 | |
| sahilmgandhi | 18:6a4db94011d3 | 621 | void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 622 | void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 623 | |
| sahilmgandhi | 18:6a4db94011d3 | 624 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 625 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 626 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 627 | |
| sahilmgandhi | 18:6a4db94011d3 | 628 | /* Start/Stop operation functions *********************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 629 | |
| sahilmgandhi | 18:6a4db94011d3 | 630 | /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions |
| sahilmgandhi | 18:6a4db94011d3 | 631 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 632 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 633 | |
| sahilmgandhi | 18:6a4db94011d3 | 634 | /* ################################# PWM Mode ################################*/ |
| sahilmgandhi | 18:6a4db94011d3 | 635 | /* Blocking mode: Polling */ |
| sahilmgandhi | 18:6a4db94011d3 | 636 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| sahilmgandhi | 18:6a4db94011d3 | 637 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 638 | /* Non-Blocking mode: Interrupt */ |
| sahilmgandhi | 18:6a4db94011d3 | 639 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| sahilmgandhi | 18:6a4db94011d3 | 640 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 641 | |
| sahilmgandhi | 18:6a4db94011d3 | 642 | /* ############################# One Pulse Mode ##############################*/ |
| sahilmgandhi | 18:6a4db94011d3 | 643 | /* Blocking mode: Polling */ |
| sahilmgandhi | 18:6a4db94011d3 | 644 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| sahilmgandhi | 18:6a4db94011d3 | 645 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 646 | /* Non-Blocking mode: Interrupt */ |
| sahilmgandhi | 18:6a4db94011d3 | 647 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| sahilmgandhi | 18:6a4db94011d3 | 648 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 649 | |
| sahilmgandhi | 18:6a4db94011d3 | 650 | /* ############################## Set once Mode ##############################*/ |
| sahilmgandhi | 18:6a4db94011d3 | 651 | /* Blocking mode: Polling */ |
| sahilmgandhi | 18:6a4db94011d3 | 652 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| sahilmgandhi | 18:6a4db94011d3 | 653 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 654 | /* Non-Blocking mode: Interrupt */ |
| sahilmgandhi | 18:6a4db94011d3 | 655 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| sahilmgandhi | 18:6a4db94011d3 | 656 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 657 | |
| sahilmgandhi | 18:6a4db94011d3 | 658 | /* ############################### Encoder Mode ##############################*/ |
| sahilmgandhi | 18:6a4db94011d3 | 659 | /* Blocking mode: Polling */ |
| sahilmgandhi | 18:6a4db94011d3 | 660 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| sahilmgandhi | 18:6a4db94011d3 | 661 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 662 | /* Non-Blocking mode: Interrupt */ |
| sahilmgandhi | 18:6a4db94011d3 | 663 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| sahilmgandhi | 18:6a4db94011d3 | 664 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 665 | |
| sahilmgandhi | 18:6a4db94011d3 | 666 | /* ############################# Time out Mode ##############################*/ |
| sahilmgandhi | 18:6a4db94011d3 | 667 | /* Blocking mode: Polling */ |
| sahilmgandhi | 18:6a4db94011d3 | 668 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
| sahilmgandhi | 18:6a4db94011d3 | 669 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 670 | /* Non-Blocking mode: Interrupt */ |
| sahilmgandhi | 18:6a4db94011d3 | 671 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
| sahilmgandhi | 18:6a4db94011d3 | 672 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 673 | |
| sahilmgandhi | 18:6a4db94011d3 | 674 | /* ############################## Counter Mode ###############################*/ |
| sahilmgandhi | 18:6a4db94011d3 | 675 | /* Blocking mode: Polling */ |
| sahilmgandhi | 18:6a4db94011d3 | 676 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| sahilmgandhi | 18:6a4db94011d3 | 677 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 678 | /* Non-Blocking mode: Interrupt */ |
| sahilmgandhi | 18:6a4db94011d3 | 679 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| sahilmgandhi | 18:6a4db94011d3 | 680 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 681 | |
| sahilmgandhi | 18:6a4db94011d3 | 682 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 683 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 684 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 685 | |
| sahilmgandhi | 18:6a4db94011d3 | 686 | /* Reading operation functions ************************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 687 | |
| sahilmgandhi | 18:6a4db94011d3 | 688 | /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions |
| sahilmgandhi | 18:6a4db94011d3 | 689 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 690 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 691 | uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 692 | uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 693 | uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 694 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 695 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 696 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 697 | |
| sahilmgandhi | 18:6a4db94011d3 | 698 | /* LPTIM IRQ functions *******************************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 699 | /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler |
| sahilmgandhi | 18:6a4db94011d3 | 700 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 701 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 702 | void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 703 | |
| sahilmgandhi | 18:6a4db94011d3 | 704 | /* CallBack functions ********************************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 705 | void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 706 | void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 707 | void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 708 | void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 709 | void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 710 | void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 711 | void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 712 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 713 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 714 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 715 | /* Peripheral State functions ************************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 716 | /** @defgroup LPTIM_Exported_Functions_Group5 Peripheral State functions |
| sahilmgandhi | 18:6a4db94011d3 | 717 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 718 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 719 | |
| sahilmgandhi | 18:6a4db94011d3 | 720 | HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim); |
| sahilmgandhi | 18:6a4db94011d3 | 721 | |
| sahilmgandhi | 18:6a4db94011d3 | 722 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 723 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 724 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 725 | |
| sahilmgandhi | 18:6a4db94011d3 | 726 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 727 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 728 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 729 | |
| sahilmgandhi | 18:6a4db94011d3 | 730 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 731 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 732 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 733 | |
| sahilmgandhi | 18:6a4db94011d3 | 734 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 735 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 736 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 737 | |
| sahilmgandhi | 18:6a4db94011d3 | 738 | #ifdef __cplusplus |
| sahilmgandhi | 18:6a4db94011d3 | 739 | } |
| sahilmgandhi | 18:6a4db94011d3 | 740 | #endif |
| sahilmgandhi | 18:6a4db94011d3 | 741 | |
| sahilmgandhi | 18:6a4db94011d3 | 742 | #endif /* __STM32L0xx_HAL_LPTIM_H */ |
| sahilmgandhi | 18:6a4db94011d3 | 743 | |
| sahilmgandhi | 18:6a4db94011d3 | 744 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| sahilmgandhi | 18:6a4db94011d3 | 745 |