Mouse code for the MacroRat
mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sdram.h@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @file stm32f4xx_hal_sdram.h |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @author MCD Application Team |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @version V1.5.0 |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @date 06-May-2016 |
sahilmgandhi | 18:6a4db94011d3 | 7 | * @brief Header file of SDRAM HAL module. |
sahilmgandhi | 18:6a4db94011d3 | 8 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 9 | * @attention |
sahilmgandhi | 18:6a4db94011d3 | 10 | * |
sahilmgandhi | 18:6a4db94011d3 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
sahilmgandhi | 18:6a4db94011d3 | 12 | * |
sahilmgandhi | 18:6a4db94011d3 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
sahilmgandhi | 18:6a4db94011d3 | 14 | * are permitted provided that the following conditions are met: |
sahilmgandhi | 18:6a4db94011d3 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 16 | * this list of conditions and the following disclaimer. |
sahilmgandhi | 18:6a4db94011d3 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 18 | * this list of conditions and the following disclaimer in the documentation |
sahilmgandhi | 18:6a4db94011d3 | 19 | * and/or other materials provided with the distribution. |
sahilmgandhi | 18:6a4db94011d3 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
sahilmgandhi | 18:6a4db94011d3 | 21 | * may be used to endorse or promote products derived from this software |
sahilmgandhi | 18:6a4db94011d3 | 22 | * without specific prior written permission. |
sahilmgandhi | 18:6a4db94011d3 | 23 | * |
sahilmgandhi | 18:6a4db94011d3 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
sahilmgandhi | 18:6a4db94011d3 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
sahilmgandhi | 18:6a4db94011d3 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
sahilmgandhi | 18:6a4db94011d3 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
sahilmgandhi | 18:6a4db94011d3 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
sahilmgandhi | 18:6a4db94011d3 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
sahilmgandhi | 18:6a4db94011d3 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
sahilmgandhi | 18:6a4db94011d3 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
sahilmgandhi | 18:6a4db94011d3 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
sahilmgandhi | 18:6a4db94011d3 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
sahilmgandhi | 18:6a4db94011d3 | 34 | * |
sahilmgandhi | 18:6a4db94011d3 | 35 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 36 | */ |
sahilmgandhi | 18:6a4db94011d3 | 37 | |
sahilmgandhi | 18:6a4db94011d3 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 39 | #ifndef __STM32F4xx_HAL_SDRAM_H |
sahilmgandhi | 18:6a4db94011d3 | 40 | #define __STM32F4xx_HAL_SDRAM_H |
sahilmgandhi | 18:6a4db94011d3 | 41 | |
sahilmgandhi | 18:6a4db94011d3 | 42 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 43 | extern "C" { |
sahilmgandhi | 18:6a4db94011d3 | 44 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 45 | |
sahilmgandhi | 18:6a4db94011d3 | 46 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 47 | defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) |
sahilmgandhi | 18:6a4db94011d3 | 48 | |
sahilmgandhi | 18:6a4db94011d3 | 49 | /* Includes ------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 50 | #include "stm32f4xx_ll_fmc.h" |
sahilmgandhi | 18:6a4db94011d3 | 51 | |
sahilmgandhi | 18:6a4db94011d3 | 52 | /** @addtogroup STM32F4xx_HAL_Driver |
sahilmgandhi | 18:6a4db94011d3 | 53 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 54 | */ |
sahilmgandhi | 18:6a4db94011d3 | 55 | |
sahilmgandhi | 18:6a4db94011d3 | 56 | /** @addtogroup SDRAM |
sahilmgandhi | 18:6a4db94011d3 | 57 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 58 | */ |
sahilmgandhi | 18:6a4db94011d3 | 59 | |
sahilmgandhi | 18:6a4db94011d3 | 60 | /* Exported typedef ----------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 61 | /** @defgroup SDRAM_Exported_Types SDRAM Exported Types |
sahilmgandhi | 18:6a4db94011d3 | 62 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 63 | */ |
sahilmgandhi | 18:6a4db94011d3 | 64 | |
sahilmgandhi | 18:6a4db94011d3 | 65 | /** |
sahilmgandhi | 18:6a4db94011d3 | 66 | * @brief HAL SDRAM State structure definition |
sahilmgandhi | 18:6a4db94011d3 | 67 | */ |
sahilmgandhi | 18:6a4db94011d3 | 68 | typedef enum |
sahilmgandhi | 18:6a4db94011d3 | 69 | { |
sahilmgandhi | 18:6a4db94011d3 | 70 | HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */ |
sahilmgandhi | 18:6a4db94011d3 | 71 | HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */ |
sahilmgandhi | 18:6a4db94011d3 | 72 | HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */ |
sahilmgandhi | 18:6a4db94011d3 | 73 | HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */ |
sahilmgandhi | 18:6a4db94011d3 | 74 | HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */ |
sahilmgandhi | 18:6a4db94011d3 | 75 | HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */ |
sahilmgandhi | 18:6a4db94011d3 | 76 | |
sahilmgandhi | 18:6a4db94011d3 | 77 | }HAL_SDRAM_StateTypeDef; |
sahilmgandhi | 18:6a4db94011d3 | 78 | |
sahilmgandhi | 18:6a4db94011d3 | 79 | /** |
sahilmgandhi | 18:6a4db94011d3 | 80 | * @brief SDRAM handle Structure definition |
sahilmgandhi | 18:6a4db94011d3 | 81 | */ |
sahilmgandhi | 18:6a4db94011d3 | 82 | typedef struct |
sahilmgandhi | 18:6a4db94011d3 | 83 | { |
sahilmgandhi | 18:6a4db94011d3 | 84 | FMC_SDRAM_TypeDef *Instance; /*!< Register base address */ |
sahilmgandhi | 18:6a4db94011d3 | 85 | |
sahilmgandhi | 18:6a4db94011d3 | 86 | FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 87 | |
sahilmgandhi | 18:6a4db94011d3 | 88 | __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */ |
sahilmgandhi | 18:6a4db94011d3 | 89 | |
sahilmgandhi | 18:6a4db94011d3 | 90 | HAL_LockTypeDef Lock; /*!< SDRAM locking object */ |
sahilmgandhi | 18:6a4db94011d3 | 91 | |
sahilmgandhi | 18:6a4db94011d3 | 92 | DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ |
sahilmgandhi | 18:6a4db94011d3 | 93 | |
sahilmgandhi | 18:6a4db94011d3 | 94 | }SDRAM_HandleTypeDef; |
sahilmgandhi | 18:6a4db94011d3 | 95 | /** |
sahilmgandhi | 18:6a4db94011d3 | 96 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 97 | */ |
sahilmgandhi | 18:6a4db94011d3 | 98 | |
sahilmgandhi | 18:6a4db94011d3 | 99 | /* Exported constants --------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 100 | /* Exported macro ------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 101 | /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros |
sahilmgandhi | 18:6a4db94011d3 | 102 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 103 | */ |
sahilmgandhi | 18:6a4db94011d3 | 104 | |
sahilmgandhi | 18:6a4db94011d3 | 105 | /** @brief Reset SDRAM handle state |
sahilmgandhi | 18:6a4db94011d3 | 106 | * @param __HANDLE__: specifies the SDRAM handle. |
sahilmgandhi | 18:6a4db94011d3 | 107 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 108 | */ |
sahilmgandhi | 18:6a4db94011d3 | 109 | #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET) |
sahilmgandhi | 18:6a4db94011d3 | 110 | /** |
sahilmgandhi | 18:6a4db94011d3 | 111 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 112 | */ |
sahilmgandhi | 18:6a4db94011d3 | 113 | |
sahilmgandhi | 18:6a4db94011d3 | 114 | /* Exported functions --------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 115 | /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions |
sahilmgandhi | 18:6a4db94011d3 | 116 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 117 | */ |
sahilmgandhi | 18:6a4db94011d3 | 118 | |
sahilmgandhi | 18:6a4db94011d3 | 119 | /** @addtogroup SDRAM_Exported_Functions_Group1 |
sahilmgandhi | 18:6a4db94011d3 | 120 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 121 | */ |
sahilmgandhi | 18:6a4db94011d3 | 122 | |
sahilmgandhi | 18:6a4db94011d3 | 123 | /* Initialization/de-initialization functions *********************************/ |
sahilmgandhi | 18:6a4db94011d3 | 124 | HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing); |
sahilmgandhi | 18:6a4db94011d3 | 125 | HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram); |
sahilmgandhi | 18:6a4db94011d3 | 126 | void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram); |
sahilmgandhi | 18:6a4db94011d3 | 127 | void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram); |
sahilmgandhi | 18:6a4db94011d3 | 128 | |
sahilmgandhi | 18:6a4db94011d3 | 129 | void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram); |
sahilmgandhi | 18:6a4db94011d3 | 130 | void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram); |
sahilmgandhi | 18:6a4db94011d3 | 131 | void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); |
sahilmgandhi | 18:6a4db94011d3 | 132 | void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); |
sahilmgandhi | 18:6a4db94011d3 | 133 | /** |
sahilmgandhi | 18:6a4db94011d3 | 134 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 135 | */ |
sahilmgandhi | 18:6a4db94011d3 | 136 | |
sahilmgandhi | 18:6a4db94011d3 | 137 | /** @addtogroup SDRAM_Exported_Functions_Group2 |
sahilmgandhi | 18:6a4db94011d3 | 138 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 139 | */ |
sahilmgandhi | 18:6a4db94011d3 | 140 | /* I/O operation functions ****************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 141 | HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); |
sahilmgandhi | 18:6a4db94011d3 | 142 | HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); |
sahilmgandhi | 18:6a4db94011d3 | 143 | HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); |
sahilmgandhi | 18:6a4db94011d3 | 144 | HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); |
sahilmgandhi | 18:6a4db94011d3 | 145 | HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
sahilmgandhi | 18:6a4db94011d3 | 146 | HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
sahilmgandhi | 18:6a4db94011d3 | 147 | |
sahilmgandhi | 18:6a4db94011d3 | 148 | HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
sahilmgandhi | 18:6a4db94011d3 | 149 | HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
sahilmgandhi | 18:6a4db94011d3 | 150 | /** |
sahilmgandhi | 18:6a4db94011d3 | 151 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 152 | */ |
sahilmgandhi | 18:6a4db94011d3 | 153 | |
sahilmgandhi | 18:6a4db94011d3 | 154 | /** @addtogroup SDRAM_Exported_Functions_Group3 |
sahilmgandhi | 18:6a4db94011d3 | 155 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 156 | */ |
sahilmgandhi | 18:6a4db94011d3 | 157 | /* SDRAM Control functions *****************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 158 | HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram); |
sahilmgandhi | 18:6a4db94011d3 | 159 | HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram); |
sahilmgandhi | 18:6a4db94011d3 | 160 | HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); |
sahilmgandhi | 18:6a4db94011d3 | 161 | HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate); |
sahilmgandhi | 18:6a4db94011d3 | 162 | HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber); |
sahilmgandhi | 18:6a4db94011d3 | 163 | uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); |
sahilmgandhi | 18:6a4db94011d3 | 164 | /** |
sahilmgandhi | 18:6a4db94011d3 | 165 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 166 | */ |
sahilmgandhi | 18:6a4db94011d3 | 167 | |
sahilmgandhi | 18:6a4db94011d3 | 168 | /** @addtogroup SDRAM_Exported_Functions_Group4 |
sahilmgandhi | 18:6a4db94011d3 | 169 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 170 | */ |
sahilmgandhi | 18:6a4db94011d3 | 171 | /* SDRAM State functions ********************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 172 | HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); |
sahilmgandhi | 18:6a4db94011d3 | 173 | /** |
sahilmgandhi | 18:6a4db94011d3 | 174 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 175 | */ |
sahilmgandhi | 18:6a4db94011d3 | 176 | |
sahilmgandhi | 18:6a4db94011d3 | 177 | /** |
sahilmgandhi | 18:6a4db94011d3 | 178 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 179 | */ |
sahilmgandhi | 18:6a4db94011d3 | 180 | |
sahilmgandhi | 18:6a4db94011d3 | 181 | /** |
sahilmgandhi | 18:6a4db94011d3 | 182 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 183 | */ |
sahilmgandhi | 18:6a4db94011d3 | 184 | |
sahilmgandhi | 18:6a4db94011d3 | 185 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ |
sahilmgandhi | 18:6a4db94011d3 | 186 | |
sahilmgandhi | 18:6a4db94011d3 | 187 | /** |
sahilmgandhi | 18:6a4db94011d3 | 188 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 189 | */ |
sahilmgandhi | 18:6a4db94011d3 | 190 | |
sahilmgandhi | 18:6a4db94011d3 | 191 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 192 | } |
sahilmgandhi | 18:6a4db94011d3 | 193 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 194 | |
sahilmgandhi | 18:6a4db94011d3 | 195 | #endif /* __STM32F4xx_HAL_SDRAM_H */ |
sahilmgandhi | 18:6a4db94011d3 | 196 | |
sahilmgandhi | 18:6a4db94011d3 | 197 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |