MouseCode - Mouse code for the MacroRat

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Mouse code for the MacroRat

Dependencies: ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:: sahilmgandhi
Date:: Sun May 14 23:18:57 2017 +0000
Revision:: 18:6a4db94011d3

Publishing again

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User	Revision	Line number	New contents of line
sahilmgandhi	18:6a4db94011d3	1	/**
sahilmgandhi	18:6a4db94011d3	2	******************************************************************************
sahilmgandhi	18:6a4db94011d3	3	* @file stm32f4xx_hal_i2c.c
sahilmgandhi	18:6a4db94011d3	4	* @author MCD Application Team
sahilmgandhi	18:6a4db94011d3	5	* @version V1.5.0
sahilmgandhi	18:6a4db94011d3	6	* @date 06-May-2016
sahilmgandhi	18:6a4db94011d3	7	* @brief I2C HAL module driver.
sahilmgandhi	18:6a4db94011d3	8	* This file provides firmware functions to manage the following
sahilmgandhi	18:6a4db94011d3	9	* functionalities of the Inter Integrated Circuit (I2C) peripheral:
sahilmgandhi	18:6a4db94011d3	10	* + Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	11	* + IO operation functions
sahilmgandhi	18:6a4db94011d3	12	* + Peripheral Control functions
sahilmgandhi	18:6a4db94011d3	13	* + Peripheral State functions
sahilmgandhi	18:6a4db94011d3	14	*
sahilmgandhi	18:6a4db94011d3	15	@verbatim
sahilmgandhi	18:6a4db94011d3	16	==============================================================================
sahilmgandhi	18:6a4db94011d3	17	##### How to use this driver #####
sahilmgandhi	18:6a4db94011d3	18	==============================================================================
sahilmgandhi	18:6a4db94011d3	19	[..]
sahilmgandhi	18:6a4db94011d3	20	The I2C HAL driver can be used as follows:
sahilmgandhi	18:6a4db94011d3	21
sahilmgandhi	18:6a4db94011d3	22	(#) Declare a I2C_HandleTypeDef handle structure, for example:
sahilmgandhi	18:6a4db94011d3	23	I2C_HandleTypeDef hi2c;
sahilmgandhi	18:6a4db94011d3	24
sahilmgandhi	18:6a4db94011d3	25	(#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
sahilmgandhi	18:6a4db94011d3	26	(##) Enable the I2Cx interface clock
sahilmgandhi	18:6a4db94011d3	27	(##) I2C pins configuration
sahilmgandhi	18:6a4db94011d3	28	(+++) Enable the clock for the I2C GPIOs
sahilmgandhi	18:6a4db94011d3	29	(+++) Configure I2C pins as alternate function open-drain
sahilmgandhi	18:6a4db94011d3	30	(##) NVIC configuration if you need to use interrupt process
sahilmgandhi	18:6a4db94011d3	31	(+++) Configure the I2Cx interrupt priority
sahilmgandhi	18:6a4db94011d3	32	(+++) Enable the NVIC I2C IRQ Channel
sahilmgandhi	18:6a4db94011d3	33	(##) DMA Configuration if you need to use DMA process
sahilmgandhi	18:6a4db94011d3	34	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
sahilmgandhi	18:6a4db94011d3	35	(+++) Enable the DMAx interface clock using
sahilmgandhi	18:6a4db94011d3	36	(+++) Configure the DMA handle parameters
sahilmgandhi	18:6a4db94011d3	37	(+++) Configure the DMA Tx or Rx Stream
sahilmgandhi	18:6a4db94011d3	38	(+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
sahilmgandhi	18:6a4db94011d3	39	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
sahilmgandhi	18:6a4db94011d3	40	the DMA Tx or Rx Stream
sahilmgandhi	18:6a4db94011d3	41
sahilmgandhi	18:6a4db94011d3	42	(#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
sahilmgandhi	18:6a4db94011d3	43	Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
sahilmgandhi	18:6a4db94011d3	44
sahilmgandhi	18:6a4db94011d3	45	(#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
sahilmgandhi	18:6a4db94011d3	46	(GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
sahilmgandhi	18:6a4db94011d3	47
sahilmgandhi	18:6a4db94011d3	48	(#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
sahilmgandhi	18:6a4db94011d3	49
sahilmgandhi	18:6a4db94011d3	50	(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
sahilmgandhi	18:6a4db94011d3	51
sahilmgandhi	18:6a4db94011d3	52	* Polling mode IO operation *
sahilmgandhi	18:6a4db94011d3	53	=================================
sahilmgandhi	18:6a4db94011d3	54	[..]
sahilmgandhi	18:6a4db94011d3	55	(+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
sahilmgandhi	18:6a4db94011d3	56	(+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
sahilmgandhi	18:6a4db94011d3	57	(+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
sahilmgandhi	18:6a4db94011d3	58	(+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
sahilmgandhi	18:6a4db94011d3	59
sahilmgandhi	18:6a4db94011d3	60	* Polling mode IO MEM operation *
sahilmgandhi	18:6a4db94011d3	61	=====================================
sahilmgandhi	18:6a4db94011d3	62	[..]
sahilmgandhi	18:6a4db94011d3	63	(+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
sahilmgandhi	18:6a4db94011d3	64	(+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
sahilmgandhi	18:6a4db94011d3	65
sahilmgandhi	18:6a4db94011d3	66
sahilmgandhi	18:6a4db94011d3	67	* Interrupt mode IO operation *
sahilmgandhi	18:6a4db94011d3	68	===================================
sahilmgandhi	18:6a4db94011d3	69	[..]
sahilmgandhi	18:6a4db94011d3	70	(+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	71	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	72	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
sahilmgandhi	18:6a4db94011d3	73	(+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
sahilmgandhi	18:6a4db94011d3	74	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	75	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
sahilmgandhi	18:6a4db94011d3	76	(+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	77	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	78	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
sahilmgandhi	18:6a4db94011d3	79	(+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
sahilmgandhi	18:6a4db94011d3	80	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	81	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
sahilmgandhi	18:6a4db94011d3	82	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	83	add his own code by customization of function pointer HAL_I2C_ErrorCallback
sahilmgandhi	18:6a4db94011d3	84
sahilmgandhi	18:6a4db94011d3	85	* Interrupt mode IO sequential operation *
sahilmgandhi	18:6a4db94011d3	86	==============================================
sahilmgandhi	18:6a4db94011d3	87	[..]
sahilmgandhi	18:6a4db94011d3	88	(+@) These interfaces allow to manage a sequential transfer with a repeated start condition
sahilmgandhi	18:6a4db94011d3	89	when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	90	(+) A specific option manage the different steps of a sequential transfer
sahilmgandhi	18:6a4db94011d3	91	(+) Differents steps option I2C_XferOptions_definition are listed below :
sahilmgandhi	18:6a4db94011d3	92	(++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
sahilmgandhi	18:6a4db94011d3	93	(++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a start condition with data to transfer without a final stop condition
sahilmgandhi	18:6a4db94011d3	94	(++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a restart condition with new data to transfer if the direction change or
sahilmgandhi	18:6a4db94011d3	95	manage only the new data to transfer if no direction change and without a final stop condition in both cases
sahilmgandhi	18:6a4db94011d3	96	(++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a restart condition with new data to transfer if the direction change or
sahilmgandhi	18:6a4db94011d3	97	manage only the new data to transfer if no direction change and with a final stop condition in both cases
sahilmgandhi	18:6a4db94011d3	98
sahilmgandhi	18:6a4db94011d3	99	(+) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	100	(++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	101	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	102	(+) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	103	(++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	104	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	105	(+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
sahilmgandhi	18:6a4db94011d3	106	(++) The associated previous transfer callback is called at the end of abort process
sahilmgandhi	18:6a4db94011d3	107	(++) mean HAL_I2C_MasterTxCpltCallback() in case of previous state was master transmit
sahilmgandhi	18:6a4db94011d3	108	(++) mean HAL_I2c_MasterRxCpltCallback() in case of previous state was master receive
sahilmgandhi	18:6a4db94011d3	109	(+) Enable/disable the Address listen mode in slave I2C mode
sahilmgandhi	18:6a4db94011d3	110	using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
sahilmgandhi	18:6a4db94011d3	111	(++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	112	add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
sahilmgandhi	18:6a4db94011d3	113	(++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	114	add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
sahilmgandhi	18:6a4db94011d3	115	(+) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	116	(++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	117	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	118	(+) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	119	(++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	120	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	121
sahilmgandhi	18:6a4db94011d3	122
sahilmgandhi	18:6a4db94011d3	123	* Interrupt mode IO MEM operation *
sahilmgandhi	18:6a4db94011d3	124	=======================================
sahilmgandhi	18:6a4db94011d3	125	[..]
sahilmgandhi	18:6a4db94011d3	126	(+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
sahilmgandhi	18:6a4db94011d3	127	HAL_I2C_Mem_Write_IT()
sahilmgandhi	18:6a4db94011d3	128	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	129	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
sahilmgandhi	18:6a4db94011d3	130	(+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
sahilmgandhi	18:6a4db94011d3	131	HAL_I2C_Mem_Read_IT()
sahilmgandhi	18:6a4db94011d3	132	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	133	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
sahilmgandhi	18:6a4db94011d3	134	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	135	add his own code by customization of function pointer HAL_I2C_ErrorCallback
sahilmgandhi	18:6a4db94011d3	136
sahilmgandhi	18:6a4db94011d3	137	* DMA mode IO operation *
sahilmgandhi	18:6a4db94011d3	138	==============================
sahilmgandhi	18:6a4db94011d3	139	[..]
sahilmgandhi	18:6a4db94011d3	140	(+) Transmit in master mode an amount of data in non blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	141	HAL_I2C_Master_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	142	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	143	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
sahilmgandhi	18:6a4db94011d3	144	(+) Receive in master mode an amount of data in non blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	145	HAL_I2C_Master_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	146	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	147	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
sahilmgandhi	18:6a4db94011d3	148	(+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	149	HAL_I2C_Slave_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	150	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	151	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
sahilmgandhi	18:6a4db94011d3	152	(+) Receive in slave mode an amount of data in non blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	153	HAL_I2C_Slave_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	154	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	155	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
sahilmgandhi	18:6a4db94011d3	156	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	157	add his own code by customization of function pointer HAL_I2C_ErrorCallback
sahilmgandhi	18:6a4db94011d3	158
sahilmgandhi	18:6a4db94011d3	159	* DMA mode IO MEM operation *
sahilmgandhi	18:6a4db94011d3	160	=================================
sahilmgandhi	18:6a4db94011d3	161	[..]
sahilmgandhi	18:6a4db94011d3	162	(+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
sahilmgandhi	18:6a4db94011d3	163	HAL_I2C_Mem_Write_DMA()
sahilmgandhi	18:6a4db94011d3	164	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	165	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
sahilmgandhi	18:6a4db94011d3	166	(+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
sahilmgandhi	18:6a4db94011d3	167	HAL_I2C_Mem_Read_DMA()
sahilmgandhi	18:6a4db94011d3	168	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	169	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
sahilmgandhi	18:6a4db94011d3	170	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	171	add his own code by customization of function pointer HAL_I2C_ErrorCallback
sahilmgandhi	18:6a4db94011d3	172
sahilmgandhi	18:6a4db94011d3	173
sahilmgandhi	18:6a4db94011d3	174	* I2C HAL driver macros list *
sahilmgandhi	18:6a4db94011d3	175	==================================
sahilmgandhi	18:6a4db94011d3	176	[..]
sahilmgandhi	18:6a4db94011d3	177	Below the list of most used macros in I2C HAL driver.
sahilmgandhi	18:6a4db94011d3	178
sahilmgandhi	18:6a4db94011d3	179	(+) __HAL_I2C_ENABLE: Enable the I2C peripheral
sahilmgandhi	18:6a4db94011d3	180	(+) __HAL_I2C_DISABLE: Disable the I2C peripheral
sahilmgandhi	18:6a4db94011d3	181	(+) __HAL_I2C_GET_FLAG: Checks whether the specified I2C flag is set or not
sahilmgandhi	18:6a4db94011d3	182	(+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
sahilmgandhi	18:6a4db94011d3	183	(+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
sahilmgandhi	18:6a4db94011d3	184	(+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
sahilmgandhi	18:6a4db94011d3	185
sahilmgandhi	18:6a4db94011d3	186	[..]
sahilmgandhi	18:6a4db94011d3	187	(@) You can refer to the I2C HAL driver header file for more useful macros
sahilmgandhi	18:6a4db94011d3	188
sahilmgandhi	18:6a4db94011d3	189
sahilmgandhi	18:6a4db94011d3	190	@endverbatim
sahilmgandhi	18:6a4db94011d3	191	******************************************************************************
sahilmgandhi	18:6a4db94011d3	192	* @attention
sahilmgandhi	18:6a4db94011d3	193	*
sahilmgandhi	18:6a4db94011d3	194	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi	18:6a4db94011d3	195	*
sahilmgandhi	18:6a4db94011d3	196	* Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi	18:6a4db94011d3	197	* are permitted provided that the following conditions are met:
sahilmgandhi	18:6a4db94011d3	198	* 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi	18:6a4db94011d3	199	* this list of conditions and the following disclaimer.
sahilmgandhi	18:6a4db94011d3	200	* 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi	18:6a4db94011d3	201	* this list of conditions and the following disclaimer in the documentation
sahilmgandhi	18:6a4db94011d3	202	* and/or other materials provided with the distribution.
sahilmgandhi	18:6a4db94011d3	203	* 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi	18:6a4db94011d3	204	* may be used to endorse or promote products derived from this software
sahilmgandhi	18:6a4db94011d3	205	* without specific prior written permission.
sahilmgandhi	18:6a4db94011d3	206	*
sahilmgandhi	18:6a4db94011d3	207	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi	18:6a4db94011d3	208	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi	18:6a4db94011d3	209	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi	18:6a4db94011d3	210	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi	18:6a4db94011d3	211	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi	18:6a4db94011d3	212	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi	18:6a4db94011d3	213	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi	18:6a4db94011d3	214	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi	18:6a4db94011d3	215	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi	18:6a4db94011d3	216	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi	18:6a4db94011d3	217	*
sahilmgandhi	18:6a4db94011d3	218	******************************************************************************
sahilmgandhi	18:6a4db94011d3	219	*/
sahilmgandhi	18:6a4db94011d3	220
sahilmgandhi	18:6a4db94011d3	221	/* Includes ------------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	222	#include "stm32f4xx_hal.h"
sahilmgandhi	18:6a4db94011d3	223
sahilmgandhi	18:6a4db94011d3	224	/** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi	18:6a4db94011d3	225	* @{
sahilmgandhi	18:6a4db94011d3	226	*/
sahilmgandhi	18:6a4db94011d3	227
sahilmgandhi	18:6a4db94011d3	228	/** @defgroup I2C I2C
sahilmgandhi	18:6a4db94011d3	229	* @brief I2C HAL module driver
sahilmgandhi	18:6a4db94011d3	230	* @{
sahilmgandhi	18:6a4db94011d3	231	*/
sahilmgandhi	18:6a4db94011d3	232
sahilmgandhi	18:6a4db94011d3	233	#ifdef HAL_I2C_MODULE_ENABLED
sahilmgandhi	18:6a4db94011d3	234
sahilmgandhi	18:6a4db94011d3	235	/* Private typedef -----------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	236	/* Private define ------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	237	/** @addtogroup I2C_Private_Constants
sahilmgandhi	18:6a4db94011d3	238	* @{
sahilmgandhi	18:6a4db94011d3	239	*/
sahilmgandhi	18:6a4db94011d3	240	#define I2C_TIMEOUT_FLAG ((uint32_t)35U) /!< Timeout 35 ms /
sahilmgandhi	18:6a4db94011d3	241	#define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000U) /!< Timeout 10 s /
sahilmgandhi	18:6a4db94011d3	242	#define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)25U) /!< Timeout 25 ms /
sahilmgandhi	18:6a4db94011d3	243	#define I2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U) /!< XferOptions default value /
sahilmgandhi	18:6a4db94011d3	244
sahilmgandhi	18:6a4db94011d3	245	/* Private define for @ref PreviousState usage */
sahilmgandhi	18:6a4db94011d3	246	#define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX \| HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /!< Mask State define, keep only RX and TX bits /
sahilmgandhi	18:6a4db94011d3	247	#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /!< Default Value /
sahilmgandhi	18:6a4db94011d3	248	#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy TX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	249	#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy RX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	250	#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy TX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	251	#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy RX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	252
sahilmgandhi	18:6a4db94011d3	253	/**
sahilmgandhi	18:6a4db94011d3	254	* @}
sahilmgandhi	18:6a4db94011d3	255	*/
sahilmgandhi	18:6a4db94011d3	256
sahilmgandhi	18:6a4db94011d3	257	/* Private macro -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	258	/* Private variables ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	259	/* Private function prototypes -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	260	/** @addtogroup I2C_Private_Functions
sahilmgandhi	18:6a4db94011d3	261	* @{
sahilmgandhi	18:6a4db94011d3	262	*/
sahilmgandhi	18:6a4db94011d3	263	/* Private functions to handle DMA transfer */
sahilmgandhi	18:6a4db94011d3	264	static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	265	static void I2C_DMAError(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	266	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	267
sahilmgandhi	18:6a4db94011d3	268	static void I2C_ITError(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	269
sahilmgandhi	18:6a4db94011d3	270	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	271	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	272	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	273	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	274	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	275	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	276	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	277	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	278	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	279	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	280	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	281
sahilmgandhi	18:6a4db94011d3	282	/* Private functions for I2C transfer IRQ handler */
sahilmgandhi	18:6a4db94011d3	283	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	284	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	285	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	286	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	287	static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	288	static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	289	static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	290
sahilmgandhi	18:6a4db94011d3	291	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	292	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	293	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	294	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	295	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	296	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	297	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	298	/**
sahilmgandhi	18:6a4db94011d3	299	* @}
sahilmgandhi	18:6a4db94011d3	300	*/
sahilmgandhi	18:6a4db94011d3	301
sahilmgandhi	18:6a4db94011d3	302	/* Exported functions --------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	303	/** @defgroup I2C_Exported_Functions I2C Exported Functions
sahilmgandhi	18:6a4db94011d3	304	* @{
sahilmgandhi	18:6a4db94011d3	305	*/
sahilmgandhi	18:6a4db94011d3	306
sahilmgandhi	18:6a4db94011d3	307	/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	308	* @brief Initialization and Configuration functions
sahilmgandhi	18:6a4db94011d3	309	*
sahilmgandhi	18:6a4db94011d3	310	@verbatim
sahilmgandhi	18:6a4db94011d3	311	===============================================================================
sahilmgandhi	18:6a4db94011d3	312	##### Initialization and de-initialization functions #####
sahilmgandhi	18:6a4db94011d3	313	===============================================================================
sahilmgandhi	18:6a4db94011d3	314	[..] This subsection provides a set of functions allowing to initialize and
sahilmgandhi	18:6a4db94011d3	315	de-initialize the I2Cx peripheral:
sahilmgandhi	18:6a4db94011d3	316
sahilmgandhi	18:6a4db94011d3	317	(+) User must Implement HAL_I2C_MspInit() function in which he configures
sahilmgandhi	18:6a4db94011d3	318	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
sahilmgandhi	18:6a4db94011d3	319
sahilmgandhi	18:6a4db94011d3	320	(+) Call the function HAL_I2C_Init() to configure the selected device with
sahilmgandhi	18:6a4db94011d3	321	the selected configuration:
sahilmgandhi	18:6a4db94011d3	322	(++) Communication Speed
sahilmgandhi	18:6a4db94011d3	323	(++) Duty cycle
sahilmgandhi	18:6a4db94011d3	324	(++) Addressing mode
sahilmgandhi	18:6a4db94011d3	325	(++) Own Address 1
sahilmgandhi	18:6a4db94011d3	326	(++) Dual Addressing mode
sahilmgandhi	18:6a4db94011d3	327	(++) Own Address 2
sahilmgandhi	18:6a4db94011d3	328	(++) General call mode
sahilmgandhi	18:6a4db94011d3	329	(++) Nostretch mode
sahilmgandhi	18:6a4db94011d3	330
sahilmgandhi	18:6a4db94011d3	331	(+) Call the function HAL_I2C_DeInit() to restore the default configuration
sahilmgandhi	18:6a4db94011d3	332	of the selected I2Cx peripheral.
sahilmgandhi	18:6a4db94011d3	333
sahilmgandhi	18:6a4db94011d3	334	@endverbatim
sahilmgandhi	18:6a4db94011d3	335	* @{
sahilmgandhi	18:6a4db94011d3	336	*/
sahilmgandhi	18:6a4db94011d3	337
sahilmgandhi	18:6a4db94011d3	338	/**
sahilmgandhi	18:6a4db94011d3	339	* @brief Initializes the I2C according to the specified parameters
sahilmgandhi	18:6a4db94011d3	340	* in the I2C_InitTypeDef and create the associated handle.
sahilmgandhi	18:6a4db94011d3	341	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	342	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	343	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	344	*/
sahilmgandhi	18:6a4db94011d3	345	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	346	{
sahilmgandhi	18:6a4db94011d3	347	uint32_t freqrange = 0U;
sahilmgandhi	18:6a4db94011d3	348	uint32_t pclk1 = 0U;
sahilmgandhi	18:6a4db94011d3	349
sahilmgandhi	18:6a4db94011d3	350	/* Check the I2C handle allocation */
sahilmgandhi	18:6a4db94011d3	351	if(hi2c == NULL)
sahilmgandhi	18:6a4db94011d3	352	{
sahilmgandhi	18:6a4db94011d3	353	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	354	}
sahilmgandhi	18:6a4db94011d3	355
sahilmgandhi	18:6a4db94011d3	356	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	357	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
sahilmgandhi	18:6a4db94011d3	358	assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
sahilmgandhi	18:6a4db94011d3	359	assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
sahilmgandhi	18:6a4db94011d3	360	assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
sahilmgandhi	18:6a4db94011d3	361	assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
sahilmgandhi	18:6a4db94011d3	362	assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
sahilmgandhi	18:6a4db94011d3	363	assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
sahilmgandhi	18:6a4db94011d3	364	assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
sahilmgandhi	18:6a4db94011d3	365	assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
sahilmgandhi	18:6a4db94011d3	366
sahilmgandhi	18:6a4db94011d3	367	if(hi2c->State == HAL_I2C_STATE_RESET)
sahilmgandhi	18:6a4db94011d3	368	{
sahilmgandhi	18:6a4db94011d3	369	/* Allocate lock resource and initialize it */
sahilmgandhi	18:6a4db94011d3	370	hi2c->Lock = HAL_UNLOCKED;
sahilmgandhi	18:6a4db94011d3	371	/* Init the low level hardware : GPIO, CLOCK, NVIC */
sahilmgandhi	18:6a4db94011d3	372	HAL_I2C_MspInit(hi2c);
sahilmgandhi	18:6a4db94011d3	373	}
sahilmgandhi	18:6a4db94011d3	374
sahilmgandhi	18:6a4db94011d3	375	hi2c->State = HAL_I2C_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	376
sahilmgandhi	18:6a4db94011d3	377	/* Disable the selected I2C peripheral */
sahilmgandhi	18:6a4db94011d3	378	__HAL_I2C_DISABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	379
sahilmgandhi	18:6a4db94011d3	380	/* Get PCLK1 frequency */
sahilmgandhi	18:6a4db94011d3	381	pclk1 = HAL_RCC_GetPCLK1Freq();
sahilmgandhi	18:6a4db94011d3	382
sahilmgandhi	18:6a4db94011d3	383	/* Calculate frequency range */
sahilmgandhi	18:6a4db94011d3	384	freqrange = I2C_FREQRANGE(pclk1);
sahilmgandhi	18:6a4db94011d3	385
sahilmgandhi	18:6a4db94011d3	386	/---------------------------- I2Cx CR2 Configuration ----------------------/
sahilmgandhi	18:6a4db94011d3	387	/* Configure I2Cx: Frequency range */
sahilmgandhi	18:6a4db94011d3	388	hi2c->Instance->CR2 = freqrange;
sahilmgandhi	18:6a4db94011d3	389
sahilmgandhi	18:6a4db94011d3	390	/---------------------------- I2Cx TRISE Configuration --------------------/
sahilmgandhi	18:6a4db94011d3	391	/* Configure I2Cx: Rise Time */
sahilmgandhi	18:6a4db94011d3	392	hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
sahilmgandhi	18:6a4db94011d3	393
sahilmgandhi	18:6a4db94011d3	394	/---------------------------- I2Cx CCR Configuration ----------------------/
sahilmgandhi	18:6a4db94011d3	395	/* Configure I2Cx: Speed */
sahilmgandhi	18:6a4db94011d3	396	hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
sahilmgandhi	18:6a4db94011d3	397
sahilmgandhi	18:6a4db94011d3	398	/---------------------------- I2Cx CR1 Configuration ----------------------/
sahilmgandhi	18:6a4db94011d3	399	/* Configure I2Cx: Generalcall and NoStretch mode */
sahilmgandhi	18:6a4db94011d3	400	hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode \| hi2c->Init.NoStretchMode);
sahilmgandhi	18:6a4db94011d3	401
sahilmgandhi	18:6a4db94011d3	402	/---------------------------- I2Cx OAR1 Configuration ---------------------/
sahilmgandhi	18:6a4db94011d3	403	/* Configure I2Cx: Own Address1 and addressing mode */
sahilmgandhi	18:6a4db94011d3	404	hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode \| hi2c->Init.OwnAddress1);
sahilmgandhi	18:6a4db94011d3	405
sahilmgandhi	18:6a4db94011d3	406	/---------------------------- I2Cx OAR2 Configuration ---------------------/
sahilmgandhi	18:6a4db94011d3	407	/* Configure I2Cx: Dual mode and Own Address2 */
sahilmgandhi	18:6a4db94011d3	408	hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode \| hi2c->Init.OwnAddress2);
sahilmgandhi	18:6a4db94011d3	409
sahilmgandhi	18:6a4db94011d3	410	/* Enable the selected I2C peripheral */
sahilmgandhi	18:6a4db94011d3	411	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	412
sahilmgandhi	18:6a4db94011d3	413	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	414	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	415	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	416	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	417
sahilmgandhi	18:6a4db94011d3	418	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	419	}
sahilmgandhi	18:6a4db94011d3	420
sahilmgandhi	18:6a4db94011d3	421	/**
sahilmgandhi	18:6a4db94011d3	422	* @brief DeInitializes the I2C peripheral.
sahilmgandhi	18:6a4db94011d3	423	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	424	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	425	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	426	*/
sahilmgandhi	18:6a4db94011d3	427	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	428	{
sahilmgandhi	18:6a4db94011d3	429	/* Check the I2C handle allocation */
sahilmgandhi	18:6a4db94011d3	430	if(hi2c == NULL)
sahilmgandhi	18:6a4db94011d3	431	{
sahilmgandhi	18:6a4db94011d3	432	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	433	}
sahilmgandhi	18:6a4db94011d3	434
sahilmgandhi	18:6a4db94011d3	435	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	436	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
sahilmgandhi	18:6a4db94011d3	437
sahilmgandhi	18:6a4db94011d3	438	hi2c->State = HAL_I2C_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	439
sahilmgandhi	18:6a4db94011d3	440	/* Disable the I2C Peripheral Clock */
sahilmgandhi	18:6a4db94011d3	441	__HAL_I2C_DISABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	442
sahilmgandhi	18:6a4db94011d3	443	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
sahilmgandhi	18:6a4db94011d3	444	HAL_I2C_MspDeInit(hi2c);
sahilmgandhi	18:6a4db94011d3	445
sahilmgandhi	18:6a4db94011d3	446	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	447	hi2c->State = HAL_I2C_STATE_RESET;
sahilmgandhi	18:6a4db94011d3	448	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	449	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	450
sahilmgandhi	18:6a4db94011d3	451	/* Release Lock */
sahilmgandhi	18:6a4db94011d3	452	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	453
sahilmgandhi	18:6a4db94011d3	454	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	455	}
sahilmgandhi	18:6a4db94011d3	456
sahilmgandhi	18:6a4db94011d3	457	/**
sahilmgandhi	18:6a4db94011d3	458	* @brief I2C MSP Init.
sahilmgandhi	18:6a4db94011d3	459	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	460	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	461	* @retval None
sahilmgandhi	18:6a4db94011d3	462	*/
sahilmgandhi	18:6a4db94011d3	463	__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	464	{
sahilmgandhi	18:6a4db94011d3	465	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	466	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	467	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	468	the HAL_I2C_MspInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	469	*/
sahilmgandhi	18:6a4db94011d3	470	}
sahilmgandhi	18:6a4db94011d3	471
sahilmgandhi	18:6a4db94011d3	472	/**
sahilmgandhi	18:6a4db94011d3	473	* @brief I2C MSP DeInit
sahilmgandhi	18:6a4db94011d3	474	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	475	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	476	* @retval None
sahilmgandhi	18:6a4db94011d3	477	*/
sahilmgandhi	18:6a4db94011d3	478	__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	479	{
sahilmgandhi	18:6a4db94011d3	480	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	481	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	482	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	483	the HAL_I2C_MspDeInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	484	*/
sahilmgandhi	18:6a4db94011d3	485	}
sahilmgandhi	18:6a4db94011d3	486
sahilmgandhi	18:6a4db94011d3	487	/**
sahilmgandhi	18:6a4db94011d3	488	* @}
sahilmgandhi	18:6a4db94011d3	489	*/
sahilmgandhi	18:6a4db94011d3	490
sahilmgandhi	18:6a4db94011d3	491	/** @defgroup I2C_Exported_Functions_Group2 IO operation functions
sahilmgandhi	18:6a4db94011d3	492	* @brief Data transfers functions
sahilmgandhi	18:6a4db94011d3	493	*
sahilmgandhi	18:6a4db94011d3	494	@verbatim
sahilmgandhi	18:6a4db94011d3	495	===============================================================================
sahilmgandhi	18:6a4db94011d3	496	##### IO operation functions #####
sahilmgandhi	18:6a4db94011d3	497	===============================================================================
sahilmgandhi	18:6a4db94011d3	498	[..]
sahilmgandhi	18:6a4db94011d3	499	This subsection provides a set of functions allowing to manage the I2C data
sahilmgandhi	18:6a4db94011d3	500	transfers.
sahilmgandhi	18:6a4db94011d3	501
sahilmgandhi	18:6a4db94011d3	502	(#) There are two modes of transfer:
sahilmgandhi	18:6a4db94011d3	503	(++) Blocking mode : The communication is performed in the polling mode.
sahilmgandhi	18:6a4db94011d3	504	The status of all data processing is returned by the same function
sahilmgandhi	18:6a4db94011d3	505	after finishing transfer.
sahilmgandhi	18:6a4db94011d3	506	(++) No-Blocking mode : The communication is performed using Interrupts
sahilmgandhi	18:6a4db94011d3	507	or DMA. These functions return the status of the transfer startup.
sahilmgandhi	18:6a4db94011d3	508	The end of the data processing will be indicated through the
sahilmgandhi	18:6a4db94011d3	509	dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
sahilmgandhi	18:6a4db94011d3	510	using DMA mode.
sahilmgandhi	18:6a4db94011d3	511
sahilmgandhi	18:6a4db94011d3	512	(#) Blocking mode functions are :
sahilmgandhi	18:6a4db94011d3	513	(++) HAL_I2C_Master_Transmit()
sahilmgandhi	18:6a4db94011d3	514	(++) HAL_I2C_Master_Receive()
sahilmgandhi	18:6a4db94011d3	515	(++) HAL_I2C_Slave_Transmit()
sahilmgandhi	18:6a4db94011d3	516	(++) HAL_I2C_Slave_Receive()
sahilmgandhi	18:6a4db94011d3	517	(++) HAL_I2C_Mem_Write()
sahilmgandhi	18:6a4db94011d3	518	(++) HAL_I2C_Mem_Read()
sahilmgandhi	18:6a4db94011d3	519	(++) HAL_I2C_IsDeviceReady()
sahilmgandhi	18:6a4db94011d3	520
sahilmgandhi	18:6a4db94011d3	521	(#) No-Blocking mode functions with Interrupt are :
sahilmgandhi	18:6a4db94011d3	522	(++) HAL_I2C_Master_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	523	(++) HAL_I2C_Master_Receive_IT()
sahilmgandhi	18:6a4db94011d3	524	(++) HAL_I2C_Slave_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	525	(++) HAL_I2C_Slave_Receive_IT()
sahilmgandhi	18:6a4db94011d3	526	(++) HAL_I2C_Master_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	527	(++) HAL_I2C_Master_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	528	(++) HAL_I2C_Slave_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	529	(++) HAL_I2C_Slave_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	530	(++) HAL_I2C_Mem_Write_IT()
sahilmgandhi	18:6a4db94011d3	531	(++) HAL_I2C_Mem_Read_IT()
sahilmgandhi	18:6a4db94011d3	532
sahilmgandhi	18:6a4db94011d3	533	(#) No-Blocking mode functions with DMA are :
sahilmgandhi	18:6a4db94011d3	534	(++) HAL_I2C_Master_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	535	(++) HAL_I2C_Master_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	536	(++) HAL_I2C_Slave_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	537	(++) HAL_I2C_Slave_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	538	(++) HAL_I2C_Mem_Write_DMA()
sahilmgandhi	18:6a4db94011d3	539	(++) HAL_I2C_Mem_Read_DMA()
sahilmgandhi	18:6a4db94011d3	540
sahilmgandhi	18:6a4db94011d3	541	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
sahilmgandhi	18:6a4db94011d3	542	(++) HAL_I2C_MemTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	543	(++) HAL_I2C_MemRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	544	(++) HAL_I2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	545	(++) HAL_I2C_MasterRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	546	(++) HAL_I2C_SlaveTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	547	(++) HAL_I2C_SlaveRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	548	(++) HAL_I2C_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	549	(++) HAL_I2C_AbortCpltCallback()
sahilmgandhi	18:6a4db94011d3	550
sahilmgandhi	18:6a4db94011d3	551	@endverbatim
sahilmgandhi	18:6a4db94011d3	552	* @{
sahilmgandhi	18:6a4db94011d3	553	*/
sahilmgandhi	18:6a4db94011d3	554
sahilmgandhi	18:6a4db94011d3	555	/**
sahilmgandhi	18:6a4db94011d3	556	* @brief Transmits in master mode an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	557	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	558	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	559	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	560	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	561	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	562	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	563	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	564	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	565	*/
sahilmgandhi	18:6a4db94011d3	566	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	567	{
sahilmgandhi	18:6a4db94011d3	568	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	569
sahilmgandhi	18:6a4db94011d3	570	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	571	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	572
sahilmgandhi	18:6a4db94011d3	573	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	574	{
sahilmgandhi	18:6a4db94011d3	575	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	576	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	577	{
sahilmgandhi	18:6a4db94011d3	578	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	579	}
sahilmgandhi	18:6a4db94011d3	580
sahilmgandhi	18:6a4db94011d3	581	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	582	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	583
sahilmgandhi	18:6a4db94011d3	584	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	585	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	586
sahilmgandhi	18:6a4db94011d3	587	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	588	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	589	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	590	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	591
sahilmgandhi	18:6a4db94011d3	592	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	593	if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	594	{
sahilmgandhi	18:6a4db94011d3	595	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	596	{
sahilmgandhi	18:6a4db94011d3	597	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	598	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	599	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	600	}
sahilmgandhi	18:6a4db94011d3	601	else
sahilmgandhi	18:6a4db94011d3	602	{
sahilmgandhi	18:6a4db94011d3	603	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	604	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	605	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	606	}
sahilmgandhi	18:6a4db94011d3	607	}
sahilmgandhi	18:6a4db94011d3	608
sahilmgandhi	18:6a4db94011d3	609	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	610	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	611
sahilmgandhi	18:6a4db94011d3	612	while(Size > 0U)
sahilmgandhi	18:6a4db94011d3	613	{
sahilmgandhi	18:6a4db94011d3	614	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	615	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	616	{
sahilmgandhi	18:6a4db94011d3	617	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	618	{
sahilmgandhi	18:6a4db94011d3	619	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	620	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	621	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	622	}
sahilmgandhi	18:6a4db94011d3	623	else
sahilmgandhi	18:6a4db94011d3	624	{
sahilmgandhi	18:6a4db94011d3	625	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	626	}
sahilmgandhi	18:6a4db94011d3	627	}
sahilmgandhi	18:6a4db94011d3	628
sahilmgandhi	18:6a4db94011d3	629	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	630	hi2c->Instance->DR = (*pData++);
sahilmgandhi	18:6a4db94011d3	631	Size--;
sahilmgandhi	18:6a4db94011d3	632
sahilmgandhi	18:6a4db94011d3	633	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
sahilmgandhi	18:6a4db94011d3	634	{
sahilmgandhi	18:6a4db94011d3	635	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	636	hi2c->Instance->DR = (*pData++);
sahilmgandhi	18:6a4db94011d3	637	Size--;
sahilmgandhi	18:6a4db94011d3	638	}
sahilmgandhi	18:6a4db94011d3	639
sahilmgandhi	18:6a4db94011d3	640	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	641	if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	642	{
sahilmgandhi	18:6a4db94011d3	643	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	644	{
sahilmgandhi	18:6a4db94011d3	645	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	646	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	647	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	648	}
sahilmgandhi	18:6a4db94011d3	649	else
sahilmgandhi	18:6a4db94011d3	650	{
sahilmgandhi	18:6a4db94011d3	651	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	652	}
sahilmgandhi	18:6a4db94011d3	653	}
sahilmgandhi	18:6a4db94011d3	654	}
sahilmgandhi	18:6a4db94011d3	655
sahilmgandhi	18:6a4db94011d3	656	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	657	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	658
sahilmgandhi	18:6a4db94011d3	659	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	660	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	661
sahilmgandhi	18:6a4db94011d3	662	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	663	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	664
sahilmgandhi	18:6a4db94011d3	665	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	666	}
sahilmgandhi	18:6a4db94011d3	667	else
sahilmgandhi	18:6a4db94011d3	668	{
sahilmgandhi	18:6a4db94011d3	669	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	670	}
sahilmgandhi	18:6a4db94011d3	671	}
sahilmgandhi	18:6a4db94011d3	672
sahilmgandhi	18:6a4db94011d3	673	/**
sahilmgandhi	18:6a4db94011d3	674	* @brief Receives in master mode an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	675	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	676	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	677	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	678	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	679	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	680	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	681	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	682	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	683	*/
sahilmgandhi	18:6a4db94011d3	684	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	685	{
sahilmgandhi	18:6a4db94011d3	686	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	687
sahilmgandhi	18:6a4db94011d3	688	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	689	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	690
sahilmgandhi	18:6a4db94011d3	691	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	692	{
sahilmgandhi	18:6a4db94011d3	693	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	694	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	695	{
sahilmgandhi	18:6a4db94011d3	696	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	697	}
sahilmgandhi	18:6a4db94011d3	698
sahilmgandhi	18:6a4db94011d3	699	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	700	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	701
sahilmgandhi	18:6a4db94011d3	702	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	703	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	704
sahilmgandhi	18:6a4db94011d3	705	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	706	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	707	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	708	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	709
sahilmgandhi	18:6a4db94011d3	710	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	711	if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	712	{
sahilmgandhi	18:6a4db94011d3	713	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	714	{
sahilmgandhi	18:6a4db94011d3	715	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	716	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	717	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	718	}
sahilmgandhi	18:6a4db94011d3	719	else
sahilmgandhi	18:6a4db94011d3	720	{
sahilmgandhi	18:6a4db94011d3	721	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	722	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	723	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	724	}
sahilmgandhi	18:6a4db94011d3	725	}
sahilmgandhi	18:6a4db94011d3	726
sahilmgandhi	18:6a4db94011d3	727	if(Size == 0U)
sahilmgandhi	18:6a4db94011d3	728	{
sahilmgandhi	18:6a4db94011d3	729	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	730	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	731
sahilmgandhi	18:6a4db94011d3	732	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	733	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	734	}
sahilmgandhi	18:6a4db94011d3	735	else if(Size == 1U)
sahilmgandhi	18:6a4db94011d3	736	{
sahilmgandhi	18:6a4db94011d3	737	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	738	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	739
sahilmgandhi	18:6a4db94011d3	740	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	741	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	742
sahilmgandhi	18:6a4db94011d3	743	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	744	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	745	}
sahilmgandhi	18:6a4db94011d3	746	else if(Size == 2U)
sahilmgandhi	18:6a4db94011d3	747	{
sahilmgandhi	18:6a4db94011d3	748	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	749	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	750
sahilmgandhi	18:6a4db94011d3	751	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	752	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	753
sahilmgandhi	18:6a4db94011d3	754	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	755	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	756	}
sahilmgandhi	18:6a4db94011d3	757	else
sahilmgandhi	18:6a4db94011d3	758	{
sahilmgandhi	18:6a4db94011d3	759	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	760	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	761
sahilmgandhi	18:6a4db94011d3	762	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	763	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	764	}
sahilmgandhi	18:6a4db94011d3	765
sahilmgandhi	18:6a4db94011d3	766	while(Size > 0U)
sahilmgandhi	18:6a4db94011d3	767	{
sahilmgandhi	18:6a4db94011d3	768	if(Size <= 3U)
sahilmgandhi	18:6a4db94011d3	769	{
sahilmgandhi	18:6a4db94011d3	770	/* One byte */
sahilmgandhi	18:6a4db94011d3	771	if(Size == 1U)
sahilmgandhi	18:6a4db94011d3	772	{
sahilmgandhi	18:6a4db94011d3	773	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	774	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	775	{
sahilmgandhi	18:6a4db94011d3	776	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	777	{
sahilmgandhi	18:6a4db94011d3	778	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	779	}
sahilmgandhi	18:6a4db94011d3	780	else
sahilmgandhi	18:6a4db94011d3	781	{
sahilmgandhi	18:6a4db94011d3	782	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	783	}
sahilmgandhi	18:6a4db94011d3	784	}
sahilmgandhi	18:6a4db94011d3	785
sahilmgandhi	18:6a4db94011d3	786	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	787	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	788	Size--;
sahilmgandhi	18:6a4db94011d3	789	}
sahilmgandhi	18:6a4db94011d3	790	/* Two bytes */
sahilmgandhi	18:6a4db94011d3	791	else if(Size == 2U)
sahilmgandhi	18:6a4db94011d3	792	{
sahilmgandhi	18:6a4db94011d3	793	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	794	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	795	{
sahilmgandhi	18:6a4db94011d3	796	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	797	}
sahilmgandhi	18:6a4db94011d3	798
sahilmgandhi	18:6a4db94011d3	799	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	800	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	801
sahilmgandhi	18:6a4db94011d3	802	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	803	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	804	Size--;
sahilmgandhi	18:6a4db94011d3	805
sahilmgandhi	18:6a4db94011d3	806	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	807	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	808	Size--;
sahilmgandhi	18:6a4db94011d3	809	}
sahilmgandhi	18:6a4db94011d3	810	/* 3 Last bytes */
sahilmgandhi	18:6a4db94011d3	811	else
sahilmgandhi	18:6a4db94011d3	812	{
sahilmgandhi	18:6a4db94011d3	813	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	814	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	815	{
sahilmgandhi	18:6a4db94011d3	816	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	817	}
sahilmgandhi	18:6a4db94011d3	818
sahilmgandhi	18:6a4db94011d3	819	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	820	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	821
sahilmgandhi	18:6a4db94011d3	822	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	823	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	824	Size--;
sahilmgandhi	18:6a4db94011d3	825
sahilmgandhi	18:6a4db94011d3	826	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	827	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	828	{
sahilmgandhi	18:6a4db94011d3	829	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	830	}
sahilmgandhi	18:6a4db94011d3	831
sahilmgandhi	18:6a4db94011d3	832	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	833	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	834
sahilmgandhi	18:6a4db94011d3	835	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	836	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	837	Size--;
sahilmgandhi	18:6a4db94011d3	838
sahilmgandhi	18:6a4db94011d3	839	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	840	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	841	Size--;
sahilmgandhi	18:6a4db94011d3	842	}
sahilmgandhi	18:6a4db94011d3	843	}
sahilmgandhi	18:6a4db94011d3	844	else
sahilmgandhi	18:6a4db94011d3	845	{
sahilmgandhi	18:6a4db94011d3	846	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	847	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	848	{
sahilmgandhi	18:6a4db94011d3	849	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	850	{
sahilmgandhi	18:6a4db94011d3	851	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	852	}
sahilmgandhi	18:6a4db94011d3	853	else
sahilmgandhi	18:6a4db94011d3	854	{
sahilmgandhi	18:6a4db94011d3	855	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	856	}
sahilmgandhi	18:6a4db94011d3	857	}
sahilmgandhi	18:6a4db94011d3	858
sahilmgandhi	18:6a4db94011d3	859	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	860	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	861	Size--;
sahilmgandhi	18:6a4db94011d3	862
sahilmgandhi	18:6a4db94011d3	863	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
sahilmgandhi	18:6a4db94011d3	864	{
sahilmgandhi	18:6a4db94011d3	865	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	866	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	867	Size--;
sahilmgandhi	18:6a4db94011d3	868	}
sahilmgandhi	18:6a4db94011d3	869	}
sahilmgandhi	18:6a4db94011d3	870	}
sahilmgandhi	18:6a4db94011d3	871
sahilmgandhi	18:6a4db94011d3	872	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	873	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	874
sahilmgandhi	18:6a4db94011d3	875	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	876	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	877
sahilmgandhi	18:6a4db94011d3	878	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	879	}
sahilmgandhi	18:6a4db94011d3	880	else
sahilmgandhi	18:6a4db94011d3	881	{
sahilmgandhi	18:6a4db94011d3	882	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	883	}
sahilmgandhi	18:6a4db94011d3	884	}
sahilmgandhi	18:6a4db94011d3	885
sahilmgandhi	18:6a4db94011d3	886	/**
sahilmgandhi	18:6a4db94011d3	887	* @brief Transmits in slave mode an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	888	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	889	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	890	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	891	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	892	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	893	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	894	*/
sahilmgandhi	18:6a4db94011d3	895	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	896	{
sahilmgandhi	18:6a4db94011d3	897	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	898
sahilmgandhi	18:6a4db94011d3	899	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	900	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	901
sahilmgandhi	18:6a4db94011d3	902	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	903	{
sahilmgandhi	18:6a4db94011d3	904	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	905	{
sahilmgandhi	18:6a4db94011d3	906	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	907	}
sahilmgandhi	18:6a4db94011d3	908
sahilmgandhi	18:6a4db94011d3	909	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	910	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	911	{
sahilmgandhi	18:6a4db94011d3	912	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	913	}
sahilmgandhi	18:6a4db94011d3	914
sahilmgandhi	18:6a4db94011d3	915	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	916	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	917
sahilmgandhi	18:6a4db94011d3	918	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	919	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	920
sahilmgandhi	18:6a4db94011d3	921	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	922	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	923	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	924	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	925
sahilmgandhi	18:6a4db94011d3	926	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	927	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	928
sahilmgandhi	18:6a4db94011d3	929	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	930	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	931	{
sahilmgandhi	18:6a4db94011d3	932	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	933	}
sahilmgandhi	18:6a4db94011d3	934
sahilmgandhi	18:6a4db94011d3	935	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	936	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	937
sahilmgandhi	18:6a4db94011d3	938	/* If 10bit addressing mode is selected */
sahilmgandhi	18:6a4db94011d3	939	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
sahilmgandhi	18:6a4db94011d3	940	{
sahilmgandhi	18:6a4db94011d3	941	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	942	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	943	{
sahilmgandhi	18:6a4db94011d3	944	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	945	}
sahilmgandhi	18:6a4db94011d3	946
sahilmgandhi	18:6a4db94011d3	947	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	948	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	949	}
sahilmgandhi	18:6a4db94011d3	950
sahilmgandhi	18:6a4db94011d3	951	while(Size > 0U)
sahilmgandhi	18:6a4db94011d3	952	{
sahilmgandhi	18:6a4db94011d3	953	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	954	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	955	{
sahilmgandhi	18:6a4db94011d3	956	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	957	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	958	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	959	{
sahilmgandhi	18:6a4db94011d3	960	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	961	}
sahilmgandhi	18:6a4db94011d3	962	else
sahilmgandhi	18:6a4db94011d3	963	{
sahilmgandhi	18:6a4db94011d3	964	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	965	}
sahilmgandhi	18:6a4db94011d3	966	}
sahilmgandhi	18:6a4db94011d3	967
sahilmgandhi	18:6a4db94011d3	968	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	969	hi2c->Instance->DR = (*pData++);
sahilmgandhi	18:6a4db94011d3	970	Size--;
sahilmgandhi	18:6a4db94011d3	971
sahilmgandhi	18:6a4db94011d3	972	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
sahilmgandhi	18:6a4db94011d3	973	{
sahilmgandhi	18:6a4db94011d3	974	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	975	hi2c->Instance->DR = (*pData++);
sahilmgandhi	18:6a4db94011d3	976	Size--;
sahilmgandhi	18:6a4db94011d3	977	}
sahilmgandhi	18:6a4db94011d3	978	}
sahilmgandhi	18:6a4db94011d3	979
sahilmgandhi	18:6a4db94011d3	980	/* Wait until AF flag is set */
sahilmgandhi	18:6a4db94011d3	981	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	982	{
sahilmgandhi	18:6a4db94011d3	983	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	984	}
sahilmgandhi	18:6a4db94011d3	985
sahilmgandhi	18:6a4db94011d3	986	/* Clear AF flag */
sahilmgandhi	18:6a4db94011d3	987	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	988
sahilmgandhi	18:6a4db94011d3	989	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	990	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	991
sahilmgandhi	18:6a4db94011d3	992	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	993	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	994
sahilmgandhi	18:6a4db94011d3	995	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	996	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	997
sahilmgandhi	18:6a4db94011d3	998	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	999	}
sahilmgandhi	18:6a4db94011d3	1000	else
sahilmgandhi	18:6a4db94011d3	1001	{
sahilmgandhi	18:6a4db94011d3	1002	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1003	}
sahilmgandhi	18:6a4db94011d3	1004	}
sahilmgandhi	18:6a4db94011d3	1005
sahilmgandhi	18:6a4db94011d3	1006	/**
sahilmgandhi	18:6a4db94011d3	1007	* @brief Receive in slave mode an amount of data in blocking mode
sahilmgandhi	18:6a4db94011d3	1008	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1009	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1010	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1011	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1012	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	1013	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1014	*/
sahilmgandhi	18:6a4db94011d3	1015	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1016	{
sahilmgandhi	18:6a4db94011d3	1017	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	1018
sahilmgandhi	18:6a4db94011d3	1019	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	1020	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1021
sahilmgandhi	18:6a4db94011d3	1022	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1023	{
sahilmgandhi	18:6a4db94011d3	1024	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1025	{
sahilmgandhi	18:6a4db94011d3	1026	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1027	}
sahilmgandhi	18:6a4db94011d3	1028
sahilmgandhi	18:6a4db94011d3	1029	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1030	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1031	{
sahilmgandhi	18:6a4db94011d3	1032	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1033	}
sahilmgandhi	18:6a4db94011d3	1034
sahilmgandhi	18:6a4db94011d3	1035	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1036	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1037
sahilmgandhi	18:6a4db94011d3	1038	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1039	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1040
sahilmgandhi	18:6a4db94011d3	1041	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1042	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1043	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1044	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1045
sahilmgandhi	18:6a4db94011d3	1046	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1047	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1048
sahilmgandhi	18:6a4db94011d3	1049	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	1050	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1051	{
sahilmgandhi	18:6a4db94011d3	1052	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1053	}
sahilmgandhi	18:6a4db94011d3	1054
sahilmgandhi	18:6a4db94011d3	1055	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1056	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1057
sahilmgandhi	18:6a4db94011d3	1058	while(Size > 0U)
sahilmgandhi	18:6a4db94011d3	1059	{
sahilmgandhi	18:6a4db94011d3	1060	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	1061	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1062	{
sahilmgandhi	18:6a4db94011d3	1063	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1064	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1065	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	1066	{
sahilmgandhi	18:6a4db94011d3	1067	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1068	}
sahilmgandhi	18:6a4db94011d3	1069	else
sahilmgandhi	18:6a4db94011d3	1070	{
sahilmgandhi	18:6a4db94011d3	1071	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1072	}
sahilmgandhi	18:6a4db94011d3	1073	}
sahilmgandhi	18:6a4db94011d3	1074
sahilmgandhi	18:6a4db94011d3	1075	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	1076	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	1077	Size--;
sahilmgandhi	18:6a4db94011d3	1078
sahilmgandhi	18:6a4db94011d3	1079	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
sahilmgandhi	18:6a4db94011d3	1080	{
sahilmgandhi	18:6a4db94011d3	1081	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	1082	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	1083	Size--;
sahilmgandhi	18:6a4db94011d3	1084	}
sahilmgandhi	18:6a4db94011d3	1085	}
sahilmgandhi	18:6a4db94011d3	1086
sahilmgandhi	18:6a4db94011d3	1087	/* Wait until STOP flag is set */
sahilmgandhi	18:6a4db94011d3	1088	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1089	{
sahilmgandhi	18:6a4db94011d3	1090	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1091	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1092
sahilmgandhi	18:6a4db94011d3	1093	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1094	{
sahilmgandhi	18:6a4db94011d3	1095	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1096	}
sahilmgandhi	18:6a4db94011d3	1097	else
sahilmgandhi	18:6a4db94011d3	1098	{
sahilmgandhi	18:6a4db94011d3	1099	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1100	}
sahilmgandhi	18:6a4db94011d3	1101	}
sahilmgandhi	18:6a4db94011d3	1102
sahilmgandhi	18:6a4db94011d3	1103	/* Clear STOP flag */
sahilmgandhi	18:6a4db94011d3	1104	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1105
sahilmgandhi	18:6a4db94011d3	1106	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1107	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1108
sahilmgandhi	18:6a4db94011d3	1109	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1110	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	1111
sahilmgandhi	18:6a4db94011d3	1112	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1113	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1114
sahilmgandhi	18:6a4db94011d3	1115	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1116	}
sahilmgandhi	18:6a4db94011d3	1117	else
sahilmgandhi	18:6a4db94011d3	1118	{
sahilmgandhi	18:6a4db94011d3	1119	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1120	}
sahilmgandhi	18:6a4db94011d3	1121	}
sahilmgandhi	18:6a4db94011d3	1122
sahilmgandhi	18:6a4db94011d3	1123	/**
sahilmgandhi	18:6a4db94011d3	1124	* @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1125	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1126	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1127	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1128	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1129	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1130	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1131	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1132	*/
sahilmgandhi	18:6a4db94011d3	1133	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1134	{
sahilmgandhi	18:6a4db94011d3	1135	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1136
sahilmgandhi	18:6a4db94011d3	1137	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1138	{
sahilmgandhi	18:6a4db94011d3	1139	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1140	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1141	do
sahilmgandhi	18:6a4db94011d3	1142	{
sahilmgandhi	18:6a4db94011d3	1143	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1144	{
sahilmgandhi	18:6a4db94011d3	1145	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1146	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1147
sahilmgandhi	18:6a4db94011d3	1148	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1149	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1150
sahilmgandhi	18:6a4db94011d3	1151	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1152	}
sahilmgandhi	18:6a4db94011d3	1153	}
sahilmgandhi	18:6a4db94011d3	1154	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1155
sahilmgandhi	18:6a4db94011d3	1156	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1157	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1158
sahilmgandhi	18:6a4db94011d3	1159	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1160	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1161
sahilmgandhi	18:6a4db94011d3	1162	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1163	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1164	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1165
sahilmgandhi	18:6a4db94011d3	1166	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1167	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1168	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1169	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1170	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	1171
sahilmgandhi	18:6a4db94011d3	1172	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1173	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1174
sahilmgandhi	18:6a4db94011d3	1175	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1176	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1177
sahilmgandhi	18:6a4db94011d3	1178	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1179	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1180	process unlock */
sahilmgandhi	18:6a4db94011d3	1181	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1182	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1183
sahilmgandhi	18:6a4db94011d3	1184	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1185	}
sahilmgandhi	18:6a4db94011d3	1186	else
sahilmgandhi	18:6a4db94011d3	1187	{
sahilmgandhi	18:6a4db94011d3	1188	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1189	}
sahilmgandhi	18:6a4db94011d3	1190	}
sahilmgandhi	18:6a4db94011d3	1191
sahilmgandhi	18:6a4db94011d3	1192	/**
sahilmgandhi	18:6a4db94011d3	1193	* @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1194	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1195	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1196	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1197	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1198	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1199	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1200	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1201	*/
sahilmgandhi	18:6a4db94011d3	1202	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1203	{
sahilmgandhi	18:6a4db94011d3	1204	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1205
sahilmgandhi	18:6a4db94011d3	1206	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1207	{
sahilmgandhi	18:6a4db94011d3	1208	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1209	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1210	do
sahilmgandhi	18:6a4db94011d3	1211	{
sahilmgandhi	18:6a4db94011d3	1212	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1213	{
sahilmgandhi	18:6a4db94011d3	1214	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1215	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1216
sahilmgandhi	18:6a4db94011d3	1217	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1218	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1219
sahilmgandhi	18:6a4db94011d3	1220	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1221	}
sahilmgandhi	18:6a4db94011d3	1222	}
sahilmgandhi	18:6a4db94011d3	1223	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1224
sahilmgandhi	18:6a4db94011d3	1225	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1226	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1227
sahilmgandhi	18:6a4db94011d3	1228	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1229	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1230
sahilmgandhi	18:6a4db94011d3	1231	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1232	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1233	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1234	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1235	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1236	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1237	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1238	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	1239
sahilmgandhi	18:6a4db94011d3	1240	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	1241	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1242
sahilmgandhi	18:6a4db94011d3	1243	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1244	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1245
sahilmgandhi	18:6a4db94011d3	1246	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1247	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1248
sahilmgandhi	18:6a4db94011d3	1249	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1250	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1251	process unlock */
sahilmgandhi	18:6a4db94011d3	1252
sahilmgandhi	18:6a4db94011d3	1253	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1254	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1255
sahilmgandhi	18:6a4db94011d3	1256	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1257	}
sahilmgandhi	18:6a4db94011d3	1258	else
sahilmgandhi	18:6a4db94011d3	1259	{
sahilmgandhi	18:6a4db94011d3	1260	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1261	}
sahilmgandhi	18:6a4db94011d3	1262	}
sahilmgandhi	18:6a4db94011d3	1263
sahilmgandhi	18:6a4db94011d3	1264	/**
sahilmgandhi	18:6a4db94011d3	1265	* @brief Sequential transmit in master mode an amount of data in no-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1266	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	1267	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1268	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1269	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1270	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1271	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1272	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1273	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	1274	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1275	*/
sahilmgandhi	18:6a4db94011d3	1276	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	1277	{
sahilmgandhi	18:6a4db94011d3	1278	uint32_t Prev_State = 0x00U;
sahilmgandhi	18:6a4db94011d3	1279	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1280
sahilmgandhi	18:6a4db94011d3	1281	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1282	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	1283
sahilmgandhi	18:6a4db94011d3	1284	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1285	{
sahilmgandhi	18:6a4db94011d3	1286	/* Check Busy Flag only if FIRST call of Master interface */
sahilmgandhi	18:6a4db94011d3	1287	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
sahilmgandhi	18:6a4db94011d3	1288	{
sahilmgandhi	18:6a4db94011d3	1289	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1290	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1291	do
sahilmgandhi	18:6a4db94011d3	1292	{
sahilmgandhi	18:6a4db94011d3	1293	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1294	{
sahilmgandhi	18:6a4db94011d3	1295	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1296	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1297
sahilmgandhi	18:6a4db94011d3	1298	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1299	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1300
sahilmgandhi	18:6a4db94011d3	1301	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1302	}
sahilmgandhi	18:6a4db94011d3	1303	}
sahilmgandhi	18:6a4db94011d3	1304	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1305	}
sahilmgandhi	18:6a4db94011d3	1306
sahilmgandhi	18:6a4db94011d3	1307	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1308	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1309
sahilmgandhi	18:6a4db94011d3	1310	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1311	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1312
sahilmgandhi	18:6a4db94011d3	1313	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1314	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1315	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1316
sahilmgandhi	18:6a4db94011d3	1317	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1318	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1319	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1320	hi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	1321	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	1322
sahilmgandhi	18:6a4db94011d3	1323	Prev_State = hi2c->PreviousState;
sahilmgandhi	18:6a4db94011d3	1324
sahilmgandhi	18:6a4db94011d3	1325	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1326	if((Prev_State == I2C_STATE_MASTER_BUSY_RX) \|\| (Prev_State == I2C_STATE_NONE))
sahilmgandhi	18:6a4db94011d3	1327	{
sahilmgandhi	18:6a4db94011d3	1328	/* Generate Start condition if first transfer */
sahilmgandhi	18:6a4db94011d3	1329	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
sahilmgandhi	18:6a4db94011d3	1330	{
sahilmgandhi	18:6a4db94011d3	1331	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1332	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1333	}
sahilmgandhi	18:6a4db94011d3	1334	else if(Prev_State == I2C_STATE_MASTER_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	1335	{
sahilmgandhi	18:6a4db94011d3	1336	/* Generate ReStart */
sahilmgandhi	18:6a4db94011d3	1337	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1338	}
sahilmgandhi	18:6a4db94011d3	1339	}
sahilmgandhi	18:6a4db94011d3	1340
sahilmgandhi	18:6a4db94011d3	1341	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1342	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1343
sahilmgandhi	18:6a4db94011d3	1344	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1345	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1346	process unlock */
sahilmgandhi	18:6a4db94011d3	1347
sahilmgandhi	18:6a4db94011d3	1348	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1349	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1350
sahilmgandhi	18:6a4db94011d3	1351	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1352	}
sahilmgandhi	18:6a4db94011d3	1353	else
sahilmgandhi	18:6a4db94011d3	1354	{
sahilmgandhi	18:6a4db94011d3	1355	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1356	}
sahilmgandhi	18:6a4db94011d3	1357	}
sahilmgandhi	18:6a4db94011d3	1358
sahilmgandhi	18:6a4db94011d3	1359	/**
sahilmgandhi	18:6a4db94011d3	1360	* @brief Sequential receive in master mode an amount of data in no-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1361	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	1362	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1363	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1364	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1365	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1366	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1367	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1368	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	1369	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1370	*/
sahilmgandhi	18:6a4db94011d3	1371	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	1372	{
sahilmgandhi	18:6a4db94011d3	1373	uint32_t Prev_State = 0x00U;
sahilmgandhi	18:6a4db94011d3	1374	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1375
sahilmgandhi	18:6a4db94011d3	1376	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1377	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	1378
sahilmgandhi	18:6a4db94011d3	1379	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1380	{
sahilmgandhi	18:6a4db94011d3	1381	/* Check Busy Flag only if FIRST call of Master interface */
sahilmgandhi	18:6a4db94011d3	1382	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
sahilmgandhi	18:6a4db94011d3	1383	{
sahilmgandhi	18:6a4db94011d3	1384	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1385	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1386	do
sahilmgandhi	18:6a4db94011d3	1387	{
sahilmgandhi	18:6a4db94011d3	1388	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1389	{
sahilmgandhi	18:6a4db94011d3	1390	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1391	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1392
sahilmgandhi	18:6a4db94011d3	1393	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1394	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1395
sahilmgandhi	18:6a4db94011d3	1396	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1397	}
sahilmgandhi	18:6a4db94011d3	1398	}
sahilmgandhi	18:6a4db94011d3	1399	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1400	}
sahilmgandhi	18:6a4db94011d3	1401
sahilmgandhi	18:6a4db94011d3	1402	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1403	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1404
sahilmgandhi	18:6a4db94011d3	1405	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1406	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1407
sahilmgandhi	18:6a4db94011d3	1408	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1409	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1410	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1411
sahilmgandhi	18:6a4db94011d3	1412	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1413	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1414	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1415	hi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	1416	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	1417
sahilmgandhi	18:6a4db94011d3	1418	Prev_State = hi2c->PreviousState;
sahilmgandhi	18:6a4db94011d3	1419
sahilmgandhi	18:6a4db94011d3	1420	if((Prev_State == I2C_STATE_MASTER_BUSY_TX) \|\| (Prev_State == I2C_STATE_NONE))
sahilmgandhi	18:6a4db94011d3	1421	{
sahilmgandhi	18:6a4db94011d3	1422	/* Generate Start condition if first transfer */
sahilmgandhi	18:6a4db94011d3	1423	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME) \|\| (XferOptions == I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	1424	{
sahilmgandhi	18:6a4db94011d3	1425	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	1426	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1427
sahilmgandhi	18:6a4db94011d3	1428	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1429	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1430	}
sahilmgandhi	18:6a4db94011d3	1431	else if(Prev_State == I2C_STATE_MASTER_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	1432	{
sahilmgandhi	18:6a4db94011d3	1433	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	1434	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1435
sahilmgandhi	18:6a4db94011d3	1436	/* Generate ReStart */
sahilmgandhi	18:6a4db94011d3	1437	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1438	}
sahilmgandhi	18:6a4db94011d3	1439	}
sahilmgandhi	18:6a4db94011d3	1440
sahilmgandhi	18:6a4db94011d3	1441	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1442	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1443
sahilmgandhi	18:6a4db94011d3	1444	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1445	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1446	process unlock */
sahilmgandhi	18:6a4db94011d3	1447
sahilmgandhi	18:6a4db94011d3	1448	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1449	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1450
sahilmgandhi	18:6a4db94011d3	1451	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1452	}
sahilmgandhi	18:6a4db94011d3	1453	else
sahilmgandhi	18:6a4db94011d3	1454	{
sahilmgandhi	18:6a4db94011d3	1455	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1456	}
sahilmgandhi	18:6a4db94011d3	1457	}
sahilmgandhi	18:6a4db94011d3	1458
sahilmgandhi	18:6a4db94011d3	1459	/**
sahilmgandhi	18:6a4db94011d3	1460	* @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1461	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1462	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1463	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1464	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1465	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1466	*/
sahilmgandhi	18:6a4db94011d3	1467	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1468	{
sahilmgandhi	18:6a4db94011d3	1469	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1470
sahilmgandhi	18:6a4db94011d3	1471	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1472	{
sahilmgandhi	18:6a4db94011d3	1473	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1474	{
sahilmgandhi	18:6a4db94011d3	1475	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1476	}
sahilmgandhi	18:6a4db94011d3	1477
sahilmgandhi	18:6a4db94011d3	1478	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1479	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1480	do
sahilmgandhi	18:6a4db94011d3	1481	{
sahilmgandhi	18:6a4db94011d3	1482	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1483	{
sahilmgandhi	18:6a4db94011d3	1484	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1485	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1486
sahilmgandhi	18:6a4db94011d3	1487	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1488	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1489
sahilmgandhi	18:6a4db94011d3	1490	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1491	}
sahilmgandhi	18:6a4db94011d3	1492	}
sahilmgandhi	18:6a4db94011d3	1493	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1494
sahilmgandhi	18:6a4db94011d3	1495	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1496	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1497
sahilmgandhi	18:6a4db94011d3	1498	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1499	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1500
sahilmgandhi	18:6a4db94011d3	1501	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1502	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1503	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1504
sahilmgandhi	18:6a4db94011d3	1505	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1506	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1507	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1508	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1509
sahilmgandhi	18:6a4db94011d3	1510	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1511	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1512
sahilmgandhi	18:6a4db94011d3	1513	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1514	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1515
sahilmgandhi	18:6a4db94011d3	1516	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1517	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1518	process unlock */
sahilmgandhi	18:6a4db94011d3	1519
sahilmgandhi	18:6a4db94011d3	1520	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1521	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1522
sahilmgandhi	18:6a4db94011d3	1523	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1524	}
sahilmgandhi	18:6a4db94011d3	1525	else
sahilmgandhi	18:6a4db94011d3	1526	{
sahilmgandhi	18:6a4db94011d3	1527	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1528	}
sahilmgandhi	18:6a4db94011d3	1529	}
sahilmgandhi	18:6a4db94011d3	1530
sahilmgandhi	18:6a4db94011d3	1531	/**
sahilmgandhi	18:6a4db94011d3	1532	* @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1533	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1534	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1535	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1536	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1537	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1538	*/
sahilmgandhi	18:6a4db94011d3	1539	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1540	{
sahilmgandhi	18:6a4db94011d3	1541	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1542
sahilmgandhi	18:6a4db94011d3	1543	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1544	{
sahilmgandhi	18:6a4db94011d3	1545	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1546	{
sahilmgandhi	18:6a4db94011d3	1547	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1548	}
sahilmgandhi	18:6a4db94011d3	1549
sahilmgandhi	18:6a4db94011d3	1550	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1551	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1552	do
sahilmgandhi	18:6a4db94011d3	1553	{
sahilmgandhi	18:6a4db94011d3	1554	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1555	{
sahilmgandhi	18:6a4db94011d3	1556	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1557	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1558
sahilmgandhi	18:6a4db94011d3	1559	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1560	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1561
sahilmgandhi	18:6a4db94011d3	1562	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1563	}
sahilmgandhi	18:6a4db94011d3	1564	}
sahilmgandhi	18:6a4db94011d3	1565	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1566
sahilmgandhi	18:6a4db94011d3	1567	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1568	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1569
sahilmgandhi	18:6a4db94011d3	1570	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1571	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1572
sahilmgandhi	18:6a4db94011d3	1573	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1574	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1575	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1576
sahilmgandhi	18:6a4db94011d3	1577	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1578	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1579	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1580	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1581
sahilmgandhi	18:6a4db94011d3	1582	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1583	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1584
sahilmgandhi	18:6a4db94011d3	1585	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1586	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1587
sahilmgandhi	18:6a4db94011d3	1588	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1589	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1590	process unlock */
sahilmgandhi	18:6a4db94011d3	1591
sahilmgandhi	18:6a4db94011d3	1592	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1593	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1594
sahilmgandhi	18:6a4db94011d3	1595	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1596	}
sahilmgandhi	18:6a4db94011d3	1597	else
sahilmgandhi	18:6a4db94011d3	1598	{
sahilmgandhi	18:6a4db94011d3	1599	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1600	}
sahilmgandhi	18:6a4db94011d3	1601	}
sahilmgandhi	18:6a4db94011d3	1602
sahilmgandhi	18:6a4db94011d3	1603	/**
sahilmgandhi	18:6a4db94011d3	1604	* @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1605	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	1606	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1607	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1608	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1609	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1610	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	1611	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1612	*/
sahilmgandhi	18:6a4db94011d3	1613	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	1614	{
sahilmgandhi	18:6a4db94011d3	1615	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1616	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	1617
sahilmgandhi	18:6a4db94011d3	1618	if(hi2c->State == HAL_I2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	1619	{
sahilmgandhi	18:6a4db94011d3	1620	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1621	{
sahilmgandhi	18:6a4db94011d3	1622	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1623	}
sahilmgandhi	18:6a4db94011d3	1624
sahilmgandhi	18:6a4db94011d3	1625	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1626	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1627
sahilmgandhi	18:6a4db94011d3	1628	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1629	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1630
sahilmgandhi	18:6a4db94011d3	1631	hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
sahilmgandhi	18:6a4db94011d3	1632	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1633	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1634
sahilmgandhi	18:6a4db94011d3	1635	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1636	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1637	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1638	hi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	1639
sahilmgandhi	18:6a4db94011d3	1640	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1641	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1642
sahilmgandhi	18:6a4db94011d3	1643	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1644	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1645
sahilmgandhi	18:6a4db94011d3	1646	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1647	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1648	process unlock */
sahilmgandhi	18:6a4db94011d3	1649
sahilmgandhi	18:6a4db94011d3	1650	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1651	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1652
sahilmgandhi	18:6a4db94011d3	1653	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1654	}
sahilmgandhi	18:6a4db94011d3	1655	else
sahilmgandhi	18:6a4db94011d3	1656	{
sahilmgandhi	18:6a4db94011d3	1657	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1658	}
sahilmgandhi	18:6a4db94011d3	1659	}
sahilmgandhi	18:6a4db94011d3	1660
sahilmgandhi	18:6a4db94011d3	1661	/**
sahilmgandhi	18:6a4db94011d3	1662	* @brief Sequential receive in slave mode an amount of data in no-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1663	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	1664	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1665	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1666	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1667	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1668	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	1669	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1670	*/
sahilmgandhi	18:6a4db94011d3	1671	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	1672	{
sahilmgandhi	18:6a4db94011d3	1673	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1674	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	1675
sahilmgandhi	18:6a4db94011d3	1676	if(hi2c->State == HAL_I2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	1677	{
sahilmgandhi	18:6a4db94011d3	1678	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1679	{
sahilmgandhi	18:6a4db94011d3	1680	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1681	}
sahilmgandhi	18:6a4db94011d3	1682
sahilmgandhi	18:6a4db94011d3	1683	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1684	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1685
sahilmgandhi	18:6a4db94011d3	1686	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1687	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1688
sahilmgandhi	18:6a4db94011d3	1689	hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
sahilmgandhi	18:6a4db94011d3	1690	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1691	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1692
sahilmgandhi	18:6a4db94011d3	1693	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1694	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1695	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1696	hi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	1697
sahilmgandhi	18:6a4db94011d3	1698	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1699	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1700
sahilmgandhi	18:6a4db94011d3	1701	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1702	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1703
sahilmgandhi	18:6a4db94011d3	1704	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1705	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1706	process unlock */
sahilmgandhi	18:6a4db94011d3	1707
sahilmgandhi	18:6a4db94011d3	1708	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1709	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1710
sahilmgandhi	18:6a4db94011d3	1711	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1712	}
sahilmgandhi	18:6a4db94011d3	1713	else
sahilmgandhi	18:6a4db94011d3	1714	{
sahilmgandhi	18:6a4db94011d3	1715	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1716	}
sahilmgandhi	18:6a4db94011d3	1717	}
sahilmgandhi	18:6a4db94011d3	1718
sahilmgandhi	18:6a4db94011d3	1719	/**
sahilmgandhi	18:6a4db94011d3	1720	* @brief Enable the Address listen mode with Interrupt.
sahilmgandhi	18:6a4db94011d3	1721	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1722	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1723	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1724	*/
sahilmgandhi	18:6a4db94011d3	1725	HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	1726	{
sahilmgandhi	18:6a4db94011d3	1727	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1728	{
sahilmgandhi	18:6a4db94011d3	1729	hi2c->State = HAL_I2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	1730
sahilmgandhi	18:6a4db94011d3	1731	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1732	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1733
sahilmgandhi	18:6a4db94011d3	1734	/* Enable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1735	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1736
sahilmgandhi	18:6a4db94011d3	1737	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1738	}
sahilmgandhi	18:6a4db94011d3	1739	else
sahilmgandhi	18:6a4db94011d3	1740	{
sahilmgandhi	18:6a4db94011d3	1741	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1742	}
sahilmgandhi	18:6a4db94011d3	1743	}
sahilmgandhi	18:6a4db94011d3	1744
sahilmgandhi	18:6a4db94011d3	1745	/**
sahilmgandhi	18:6a4db94011d3	1746	* @brief Disable the Address listen mode with Interrupt.
sahilmgandhi	18:6a4db94011d3	1747	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1748	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1749	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1750	*/
sahilmgandhi	18:6a4db94011d3	1751	HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	1752	{
sahilmgandhi	18:6a4db94011d3	1753	/* Declaration of tmp to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	1754	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	1755
sahilmgandhi	18:6a4db94011d3	1756	/* Disable Address listen mode only if a transfer is not ongoing */
sahilmgandhi	18:6a4db94011d3	1757	if(hi2c->State == HAL_I2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	1758	{
sahilmgandhi	18:6a4db94011d3	1759	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	1760	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	1761	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1762	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	1763
sahilmgandhi	18:6a4db94011d3	1764	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1765	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1766
sahilmgandhi	18:6a4db94011d3	1767	/* Disable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1768	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1769
sahilmgandhi	18:6a4db94011d3	1770	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1771	}
sahilmgandhi	18:6a4db94011d3	1772	else
sahilmgandhi	18:6a4db94011d3	1773	{
sahilmgandhi	18:6a4db94011d3	1774	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1775	}
sahilmgandhi	18:6a4db94011d3	1776	}
sahilmgandhi	18:6a4db94011d3	1777
sahilmgandhi	18:6a4db94011d3	1778	/**
sahilmgandhi	18:6a4db94011d3	1779	* @brief Transmit in master mode an amount of data in no-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	1780	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1781	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1782	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1783	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1784	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1785	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1786	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1787	*/
sahilmgandhi	18:6a4db94011d3	1788	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1789	{
sahilmgandhi	18:6a4db94011d3	1790	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	1791
sahilmgandhi	18:6a4db94011d3	1792	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1793
sahilmgandhi	18:6a4db94011d3	1794	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	1795	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1796
sahilmgandhi	18:6a4db94011d3	1797	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1798	{
sahilmgandhi	18:6a4db94011d3	1799	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1800	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1801	do
sahilmgandhi	18:6a4db94011d3	1802	{
sahilmgandhi	18:6a4db94011d3	1803	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1804	{
sahilmgandhi	18:6a4db94011d3	1805	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1806	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1807
sahilmgandhi	18:6a4db94011d3	1808	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1809	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1810
sahilmgandhi	18:6a4db94011d3	1811	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1812	}
sahilmgandhi	18:6a4db94011d3	1813	}
sahilmgandhi	18:6a4db94011d3	1814	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1815
sahilmgandhi	18:6a4db94011d3	1816	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1817	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1818
sahilmgandhi	18:6a4db94011d3	1819	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1820	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1821
sahilmgandhi	18:6a4db94011d3	1822	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1823	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1824	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1825
sahilmgandhi	18:6a4db94011d3	1826	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1827	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1828	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1829	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1830
sahilmgandhi	18:6a4db94011d3	1831	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	1832	{
sahilmgandhi	18:6a4db94011d3	1833	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1834	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	1835
sahilmgandhi	18:6a4db94011d3	1836	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	1837	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	1838
sahilmgandhi	18:6a4db94011d3	1839	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	1840	hi2c->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1841	hi2c->hdmatx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1842	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1843	hi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1844
sahilmgandhi	18:6a4db94011d3	1845	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	1846	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
sahilmgandhi	18:6a4db94011d3	1847
sahilmgandhi	18:6a4db94011d3	1848	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	1849	if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1850	{
sahilmgandhi	18:6a4db94011d3	1851	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1852	{
sahilmgandhi	18:6a4db94011d3	1853	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1854	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1855	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1856	}
sahilmgandhi	18:6a4db94011d3	1857	else
sahilmgandhi	18:6a4db94011d3	1858	{
sahilmgandhi	18:6a4db94011d3	1859	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1860	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1861	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1862	}
sahilmgandhi	18:6a4db94011d3	1863	}
sahilmgandhi	18:6a4db94011d3	1864
sahilmgandhi	18:6a4db94011d3	1865	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1866	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1867
sahilmgandhi	18:6a4db94011d3	1868	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1869	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1870
sahilmgandhi	18:6a4db94011d3	1871	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	1872	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	1873	}
sahilmgandhi	18:6a4db94011d3	1874	else
sahilmgandhi	18:6a4db94011d3	1875	{
sahilmgandhi	18:6a4db94011d3	1876	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	1877	if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1878	{
sahilmgandhi	18:6a4db94011d3	1879	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1880	{
sahilmgandhi	18:6a4db94011d3	1881	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1882	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1883	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1884	}
sahilmgandhi	18:6a4db94011d3	1885	else
sahilmgandhi	18:6a4db94011d3	1886	{
sahilmgandhi	18:6a4db94011d3	1887	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1888	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1889	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1890	}
sahilmgandhi	18:6a4db94011d3	1891	}
sahilmgandhi	18:6a4db94011d3	1892
sahilmgandhi	18:6a4db94011d3	1893	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1894	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1895
sahilmgandhi	18:6a4db94011d3	1896	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	1897	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	1898
sahilmgandhi	18:6a4db94011d3	1899	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1900	}
sahilmgandhi	18:6a4db94011d3	1901
sahilmgandhi	18:6a4db94011d3	1902	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1903	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1904
sahilmgandhi	18:6a4db94011d3	1905	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1906	}
sahilmgandhi	18:6a4db94011d3	1907	else
sahilmgandhi	18:6a4db94011d3	1908	{
sahilmgandhi	18:6a4db94011d3	1909	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1910	}
sahilmgandhi	18:6a4db94011d3	1911	}
sahilmgandhi	18:6a4db94011d3	1912
sahilmgandhi	18:6a4db94011d3	1913	/**
sahilmgandhi	18:6a4db94011d3	1914	* @brief Receive in master mode an amount of data in no-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	1915	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1916	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1917	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1918	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1919	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1920	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1921	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1922	*/
sahilmgandhi	18:6a4db94011d3	1923	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1924	{
sahilmgandhi	18:6a4db94011d3	1925	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	1926
sahilmgandhi	18:6a4db94011d3	1927	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1928
sahilmgandhi	18:6a4db94011d3	1929	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	1930	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1931
sahilmgandhi	18:6a4db94011d3	1932	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1933	{
sahilmgandhi	18:6a4db94011d3	1934	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1935	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1936	do
sahilmgandhi	18:6a4db94011d3	1937	{
sahilmgandhi	18:6a4db94011d3	1938	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1939	{
sahilmgandhi	18:6a4db94011d3	1940	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1941	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1942
sahilmgandhi	18:6a4db94011d3	1943	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1944	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1945
sahilmgandhi	18:6a4db94011d3	1946	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1947	}
sahilmgandhi	18:6a4db94011d3	1948	}
sahilmgandhi	18:6a4db94011d3	1949	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1950
sahilmgandhi	18:6a4db94011d3	1951	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1952	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1953
sahilmgandhi	18:6a4db94011d3	1954	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1955	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1956
sahilmgandhi	18:6a4db94011d3	1957	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1958	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1959	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1960
sahilmgandhi	18:6a4db94011d3	1961	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1962	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1963	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1964	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1965
sahilmgandhi	18:6a4db94011d3	1966	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	1967	{
sahilmgandhi	18:6a4db94011d3	1968	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1969	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	1970
sahilmgandhi	18:6a4db94011d3	1971	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	1972	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	1973
sahilmgandhi	18:6a4db94011d3	1974	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	1975	hi2c->hdmarx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1976	hi2c->hdmarx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1977	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1978	hi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1979
sahilmgandhi	18:6a4db94011d3	1980	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	1981	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
sahilmgandhi	18:6a4db94011d3	1982
sahilmgandhi	18:6a4db94011d3	1983	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	1984	if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1985	{
sahilmgandhi	18:6a4db94011d3	1986	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1987	{
sahilmgandhi	18:6a4db94011d3	1988	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1989	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1990	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1991	}
sahilmgandhi	18:6a4db94011d3	1992	else
sahilmgandhi	18:6a4db94011d3	1993	{
sahilmgandhi	18:6a4db94011d3	1994	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1995	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1996	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1997	}
sahilmgandhi	18:6a4db94011d3	1998	}
sahilmgandhi	18:6a4db94011d3	1999
sahilmgandhi	18:6a4db94011d3	2000	if(Size == 1U)
sahilmgandhi	18:6a4db94011d3	2001	{
sahilmgandhi	18:6a4db94011d3	2002	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2003	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2004	}
sahilmgandhi	18:6a4db94011d3	2005	else
sahilmgandhi	18:6a4db94011d3	2006	{
sahilmgandhi	18:6a4db94011d3	2007	/* Enable Last DMA bit */
sahilmgandhi	18:6a4db94011d3	2008	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
sahilmgandhi	18:6a4db94011d3	2009	}
sahilmgandhi	18:6a4db94011d3	2010
sahilmgandhi	18:6a4db94011d3	2011	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2012	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2013
sahilmgandhi	18:6a4db94011d3	2014	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2015	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2016
sahilmgandhi	18:6a4db94011d3	2017	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2018	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2019	process unlock */
sahilmgandhi	18:6a4db94011d3	2020	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2021	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2022
sahilmgandhi	18:6a4db94011d3	2023	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2024	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	2025	}
sahilmgandhi	18:6a4db94011d3	2026	else
sahilmgandhi	18:6a4db94011d3	2027	{
sahilmgandhi	18:6a4db94011d3	2028	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	2029	if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2030	{
sahilmgandhi	18:6a4db94011d3	2031	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2032	{
sahilmgandhi	18:6a4db94011d3	2033	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2034	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2035	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2036	}
sahilmgandhi	18:6a4db94011d3	2037	else
sahilmgandhi	18:6a4db94011d3	2038	{
sahilmgandhi	18:6a4db94011d3	2039	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2040	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2041	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2042	}
sahilmgandhi	18:6a4db94011d3	2043	}
sahilmgandhi	18:6a4db94011d3	2044
sahilmgandhi	18:6a4db94011d3	2045	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2046	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2047
sahilmgandhi	18:6a4db94011d3	2048	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2049	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2050
sahilmgandhi	18:6a4db94011d3	2051	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2052
sahilmgandhi	18:6a4db94011d3	2053	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2054	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2055	}
sahilmgandhi	18:6a4db94011d3	2056
sahilmgandhi	18:6a4db94011d3	2057	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2058	}
sahilmgandhi	18:6a4db94011d3	2059	else
sahilmgandhi	18:6a4db94011d3	2060	{
sahilmgandhi	18:6a4db94011d3	2061	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2062	}
sahilmgandhi	18:6a4db94011d3	2063	}
sahilmgandhi	18:6a4db94011d3	2064
sahilmgandhi	18:6a4db94011d3	2065	/**
sahilmgandhi	18:6a4db94011d3	2066	* @brief Abort a master I2C process communication with Interrupt.
sahilmgandhi	18:6a4db94011d3	2067	* @note This abort can be called only if state is ready
sahilmgandhi	18:6a4db94011d3	2068	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2069	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2070	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	2071	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	2072	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2073	*/
sahilmgandhi	18:6a4db94011d3	2074	HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
sahilmgandhi	18:6a4db94011d3	2075	{
sahilmgandhi	18:6a4db94011d3	2076	/* Abort Master transfer during Receive or Transmit process */
sahilmgandhi	18:6a4db94011d3	2077	if(hi2c->Mode == HAL_I2C_MODE_MASTER)
sahilmgandhi	18:6a4db94011d3	2078	{
sahilmgandhi	18:6a4db94011d3	2079	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2080	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2081
sahilmgandhi	18:6a4db94011d3	2082	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2083	hi2c->State = HAL_I2C_STATE_ABORT;
sahilmgandhi	18:6a4db94011d3	2084
sahilmgandhi	18:6a4db94011d3	2085	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2086	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2087
sahilmgandhi	18:6a4db94011d3	2088	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2089	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2090
sahilmgandhi	18:6a4db94011d3	2091	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	2092
sahilmgandhi	18:6a4db94011d3	2093	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2094	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2095
sahilmgandhi	18:6a4db94011d3	2096	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2097	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2098
sahilmgandhi	18:6a4db94011d3	2099	if(hi2c->State == HAL_I2C_STATE_ABORT)
sahilmgandhi	18:6a4db94011d3	2100	{
sahilmgandhi	18:6a4db94011d3	2101	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2102
sahilmgandhi	18:6a4db94011d3	2103	/* Call the Abort Complete callback */
sahilmgandhi	18:6a4db94011d3	2104	HAL_I2C_AbortCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	2105	}
sahilmgandhi	18:6a4db94011d3	2106
sahilmgandhi	18:6a4db94011d3	2107	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2108	}
sahilmgandhi	18:6a4db94011d3	2109	else
sahilmgandhi	18:6a4db94011d3	2110	{
sahilmgandhi	18:6a4db94011d3	2111	/* Wrong usage of abort function */
sahilmgandhi	18:6a4db94011d3	2112	/* This function should be used only in case of abort monitored by master device */
sahilmgandhi	18:6a4db94011d3	2113	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2114	}
sahilmgandhi	18:6a4db94011d3	2115	}
sahilmgandhi	18:6a4db94011d3	2116
sahilmgandhi	18:6a4db94011d3	2117	/**
sahilmgandhi	18:6a4db94011d3	2118	* @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	2119	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2120	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	2121	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2122	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2123	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2124	*/
sahilmgandhi	18:6a4db94011d3	2125	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2126	{
sahilmgandhi	18:6a4db94011d3	2127	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2128
sahilmgandhi	18:6a4db94011d3	2129	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2130	{
sahilmgandhi	18:6a4db94011d3	2131	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	2132	{
sahilmgandhi	18:6a4db94011d3	2133	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2134	}
sahilmgandhi	18:6a4db94011d3	2135
sahilmgandhi	18:6a4db94011d3	2136	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2137	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2138	do
sahilmgandhi	18:6a4db94011d3	2139	{
sahilmgandhi	18:6a4db94011d3	2140	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2141	{
sahilmgandhi	18:6a4db94011d3	2142	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2143	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2144
sahilmgandhi	18:6a4db94011d3	2145	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2146	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2147
sahilmgandhi	18:6a4db94011d3	2148	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2149	}
sahilmgandhi	18:6a4db94011d3	2150	}
sahilmgandhi	18:6a4db94011d3	2151	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2152
sahilmgandhi	18:6a4db94011d3	2153	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2154	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2155
sahilmgandhi	18:6a4db94011d3	2156	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2157	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2158
sahilmgandhi	18:6a4db94011d3	2159	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2160	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	2161	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2162
sahilmgandhi	18:6a4db94011d3	2163	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2164	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	2165	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2166	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2167
sahilmgandhi	18:6a4db94011d3	2168	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	2169	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	2170
sahilmgandhi	18:6a4db94011d3	2171	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	2172	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	2173
sahilmgandhi	18:6a4db94011d3	2174	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	2175	hi2c->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2176	hi2c->hdmatx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2177	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2178	hi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2179
sahilmgandhi	18:6a4db94011d3	2180	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	2181	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
sahilmgandhi	18:6a4db94011d3	2182
sahilmgandhi	18:6a4db94011d3	2183	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2184	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2185
sahilmgandhi	18:6a4db94011d3	2186	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2187	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	2188
sahilmgandhi	18:6a4db94011d3	2189	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	2190	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2191
sahilmgandhi	18:6a4db94011d3	2192	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	2193	count = I2C_TIMEOUT_ADDR_SLAVE * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2194	do
sahilmgandhi	18:6a4db94011d3	2195	{
sahilmgandhi	18:6a4db94011d3	2196	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2197	{
sahilmgandhi	18:6a4db94011d3	2198	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2199	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2200
sahilmgandhi	18:6a4db94011d3	2201	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2202	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2203
sahilmgandhi	18:6a4db94011d3	2204	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2205	}
sahilmgandhi	18:6a4db94011d3	2206	}
sahilmgandhi	18:6a4db94011d3	2207	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET);
sahilmgandhi	18:6a4db94011d3	2208
sahilmgandhi	18:6a4db94011d3	2209	/* If 7bit addressing mode is selected */
sahilmgandhi	18:6a4db94011d3	2210	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
sahilmgandhi	18:6a4db94011d3	2211	{
sahilmgandhi	18:6a4db94011d3	2212	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2213	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2214	}
sahilmgandhi	18:6a4db94011d3	2215	else
sahilmgandhi	18:6a4db94011d3	2216	{
sahilmgandhi	18:6a4db94011d3	2217	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2218	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2219
sahilmgandhi	18:6a4db94011d3	2220	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	2221	count = I2C_TIMEOUT_ADDR_SLAVE * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2222	do
sahilmgandhi	18:6a4db94011d3	2223	{
sahilmgandhi	18:6a4db94011d3	2224	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2225	{
sahilmgandhi	18:6a4db94011d3	2226	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2227	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2228
sahilmgandhi	18:6a4db94011d3	2229	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2230	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2231
sahilmgandhi	18:6a4db94011d3	2232	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2233	}
sahilmgandhi	18:6a4db94011d3	2234	}
sahilmgandhi	18:6a4db94011d3	2235	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET);
sahilmgandhi	18:6a4db94011d3	2236
sahilmgandhi	18:6a4db94011d3	2237	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2238	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2239	}
sahilmgandhi	18:6a4db94011d3	2240
sahilmgandhi	18:6a4db94011d3	2241	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2242	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2243
sahilmgandhi	18:6a4db94011d3	2244	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2245	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2246	process unlock */
sahilmgandhi	18:6a4db94011d3	2247	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2248	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2249
sahilmgandhi	18:6a4db94011d3	2250	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2251	}
sahilmgandhi	18:6a4db94011d3	2252	else
sahilmgandhi	18:6a4db94011d3	2253	{
sahilmgandhi	18:6a4db94011d3	2254	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2255	}
sahilmgandhi	18:6a4db94011d3	2256	}
sahilmgandhi	18:6a4db94011d3	2257
sahilmgandhi	18:6a4db94011d3	2258	/**
sahilmgandhi	18:6a4db94011d3	2259	* @brief Receive in slave mode an amount of data in no-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	2260	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2261	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	2262	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2263	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2264	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2265	*/
sahilmgandhi	18:6a4db94011d3	2266	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2267	{
sahilmgandhi	18:6a4db94011d3	2268	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2269
sahilmgandhi	18:6a4db94011d3	2270	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2271	{
sahilmgandhi	18:6a4db94011d3	2272	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	2273	{
sahilmgandhi	18:6a4db94011d3	2274	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2275	}
sahilmgandhi	18:6a4db94011d3	2276
sahilmgandhi	18:6a4db94011d3	2277	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2278	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2279	do
sahilmgandhi	18:6a4db94011d3	2280	{
sahilmgandhi	18:6a4db94011d3	2281	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2282	{
sahilmgandhi	18:6a4db94011d3	2283	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2284	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2285
sahilmgandhi	18:6a4db94011d3	2286	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2287	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2288
sahilmgandhi	18:6a4db94011d3	2289	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2290	}
sahilmgandhi	18:6a4db94011d3	2291	}
sahilmgandhi	18:6a4db94011d3	2292	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2293
sahilmgandhi	18:6a4db94011d3	2294	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2295	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2296
sahilmgandhi	18:6a4db94011d3	2297	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2298	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2299
sahilmgandhi	18:6a4db94011d3	2300	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2301	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	2302	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2303
sahilmgandhi	18:6a4db94011d3	2304	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2305	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	2306	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2307	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2308
sahilmgandhi	18:6a4db94011d3	2309	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	2310	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	2311
sahilmgandhi	18:6a4db94011d3	2312	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	2313	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	2314
sahilmgandhi	18:6a4db94011d3	2315	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	2316	hi2c->hdmarx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2317	hi2c->hdmarx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2318	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2319	hi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2320
sahilmgandhi	18:6a4db94011d3	2321	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	2322	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
sahilmgandhi	18:6a4db94011d3	2323
sahilmgandhi	18:6a4db94011d3	2324	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2325	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2326
sahilmgandhi	18:6a4db94011d3	2327	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2328	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	2329
sahilmgandhi	18:6a4db94011d3	2330	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	2331	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2332
sahilmgandhi	18:6a4db94011d3	2333	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	2334	count = I2C_TIMEOUT_ADDR_SLAVE * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2335	do
sahilmgandhi	18:6a4db94011d3	2336	{
sahilmgandhi	18:6a4db94011d3	2337	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2338	{
sahilmgandhi	18:6a4db94011d3	2339	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2340	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2341
sahilmgandhi	18:6a4db94011d3	2342	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2343	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2344
sahilmgandhi	18:6a4db94011d3	2345	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2346	}
sahilmgandhi	18:6a4db94011d3	2347	}
sahilmgandhi	18:6a4db94011d3	2348	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET);
sahilmgandhi	18:6a4db94011d3	2349
sahilmgandhi	18:6a4db94011d3	2350	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2351	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2352
sahilmgandhi	18:6a4db94011d3	2353	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2354	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2355
sahilmgandhi	18:6a4db94011d3	2356	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2357	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2358	process unlock */
sahilmgandhi	18:6a4db94011d3	2359	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2360	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2361
sahilmgandhi	18:6a4db94011d3	2362	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2363	}
sahilmgandhi	18:6a4db94011d3	2364	else
sahilmgandhi	18:6a4db94011d3	2365	{
sahilmgandhi	18:6a4db94011d3	2366	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2367	}
sahilmgandhi	18:6a4db94011d3	2368	}
sahilmgandhi	18:6a4db94011d3	2369	/**
sahilmgandhi	18:6a4db94011d3	2370	* @brief Write an amount of data in blocking mode to a specific memory address
sahilmgandhi	18:6a4db94011d3	2371	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2372	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	2373	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2374	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2375	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2376	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2377	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2378	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	2379	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2380	*/
sahilmgandhi	18:6a4db94011d3	2381	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	2382	{
sahilmgandhi	18:6a4db94011d3	2383	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	2384
sahilmgandhi	18:6a4db94011d3	2385	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2386	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2387
sahilmgandhi	18:6a4db94011d3	2388	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2389	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2390
sahilmgandhi	18:6a4db94011d3	2391	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2392	{
sahilmgandhi	18:6a4db94011d3	2393	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2394	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2395	{
sahilmgandhi	18:6a4db94011d3	2396	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2397	}
sahilmgandhi	18:6a4db94011d3	2398
sahilmgandhi	18:6a4db94011d3	2399	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2400	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2401
sahilmgandhi	18:6a4db94011d3	2402	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2403	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2404
sahilmgandhi	18:6a4db94011d3	2405	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2406	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2407	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2408	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2409
sahilmgandhi	18:6a4db94011d3	2410	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2411	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2412	{
sahilmgandhi	18:6a4db94011d3	2413	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2414	{
sahilmgandhi	18:6a4db94011d3	2415	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2416	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2417	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2418	}
sahilmgandhi	18:6a4db94011d3	2419	else
sahilmgandhi	18:6a4db94011d3	2420	{
sahilmgandhi	18:6a4db94011d3	2421	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2422	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2423	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2424	}
sahilmgandhi	18:6a4db94011d3	2425	}
sahilmgandhi	18:6a4db94011d3	2426
sahilmgandhi	18:6a4db94011d3	2427	while(Size > 0U)
sahilmgandhi	18:6a4db94011d3	2428	{
sahilmgandhi	18:6a4db94011d3	2429	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	2430	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2431	{
sahilmgandhi	18:6a4db94011d3	2432	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2433	{
sahilmgandhi	18:6a4db94011d3	2434	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2435	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2436	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2437	}
sahilmgandhi	18:6a4db94011d3	2438	else
sahilmgandhi	18:6a4db94011d3	2439	{
sahilmgandhi	18:6a4db94011d3	2440	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2441	}
sahilmgandhi	18:6a4db94011d3	2442	}
sahilmgandhi	18:6a4db94011d3	2443
sahilmgandhi	18:6a4db94011d3	2444	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	2445	hi2c->Instance->DR = (*pData++);
sahilmgandhi	18:6a4db94011d3	2446	Size--;
sahilmgandhi	18:6a4db94011d3	2447
sahilmgandhi	18:6a4db94011d3	2448	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
sahilmgandhi	18:6a4db94011d3	2449	{
sahilmgandhi	18:6a4db94011d3	2450	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	2451	hi2c->Instance->DR = (*pData++);
sahilmgandhi	18:6a4db94011d3	2452	Size--;
sahilmgandhi	18:6a4db94011d3	2453	}
sahilmgandhi	18:6a4db94011d3	2454	}
sahilmgandhi	18:6a4db94011d3	2455
sahilmgandhi	18:6a4db94011d3	2456	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	2457	if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2458	{
sahilmgandhi	18:6a4db94011d3	2459	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2460	{
sahilmgandhi	18:6a4db94011d3	2461	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2462	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2463	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2464	}
sahilmgandhi	18:6a4db94011d3	2465	else
sahilmgandhi	18:6a4db94011d3	2466	{
sahilmgandhi	18:6a4db94011d3	2467	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2468	}
sahilmgandhi	18:6a4db94011d3	2469	}
sahilmgandhi	18:6a4db94011d3	2470
sahilmgandhi	18:6a4db94011d3	2471	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2472	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2473
sahilmgandhi	18:6a4db94011d3	2474	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2475	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	2476
sahilmgandhi	18:6a4db94011d3	2477	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2478	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2479
sahilmgandhi	18:6a4db94011d3	2480	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2481	}
sahilmgandhi	18:6a4db94011d3	2482	else
sahilmgandhi	18:6a4db94011d3	2483	{
sahilmgandhi	18:6a4db94011d3	2484	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2485	}
sahilmgandhi	18:6a4db94011d3	2486	}
sahilmgandhi	18:6a4db94011d3	2487
sahilmgandhi	18:6a4db94011d3	2488	/**
sahilmgandhi	18:6a4db94011d3	2489	* @brief Read an amount of data in blocking mode from a specific memory address
sahilmgandhi	18:6a4db94011d3	2490	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2491	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	2492	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2493	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2494	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2495	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2496	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2497	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	2498	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2499	*/
sahilmgandhi	18:6a4db94011d3	2500	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	2501	{
sahilmgandhi	18:6a4db94011d3	2502	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	2503
sahilmgandhi	18:6a4db94011d3	2504	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2505	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2506
sahilmgandhi	18:6a4db94011d3	2507	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2508	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2509
sahilmgandhi	18:6a4db94011d3	2510	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2511	{
sahilmgandhi	18:6a4db94011d3	2512	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2513	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2514	{
sahilmgandhi	18:6a4db94011d3	2515	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2516	}
sahilmgandhi	18:6a4db94011d3	2517
sahilmgandhi	18:6a4db94011d3	2518	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2519	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2520
sahilmgandhi	18:6a4db94011d3	2521	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2522	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2523
sahilmgandhi	18:6a4db94011d3	2524	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2525	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2526	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2527	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2528
sahilmgandhi	18:6a4db94011d3	2529	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2530	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2531	{
sahilmgandhi	18:6a4db94011d3	2532	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2533	{
sahilmgandhi	18:6a4db94011d3	2534	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2535	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2536	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2537	}
sahilmgandhi	18:6a4db94011d3	2538	else
sahilmgandhi	18:6a4db94011d3	2539	{
sahilmgandhi	18:6a4db94011d3	2540	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2541	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2542	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2543	}
sahilmgandhi	18:6a4db94011d3	2544	}
sahilmgandhi	18:6a4db94011d3	2545
sahilmgandhi	18:6a4db94011d3	2546	if(Size == 0U)
sahilmgandhi	18:6a4db94011d3	2547	{
sahilmgandhi	18:6a4db94011d3	2548	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2549	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2550
sahilmgandhi	18:6a4db94011d3	2551	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2552	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2553	}
sahilmgandhi	18:6a4db94011d3	2554	else if(Size == 1U)
sahilmgandhi	18:6a4db94011d3	2555	{
sahilmgandhi	18:6a4db94011d3	2556	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2557	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2558
sahilmgandhi	18:6a4db94011d3	2559	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2560	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2561
sahilmgandhi	18:6a4db94011d3	2562	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2563	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2564	}
sahilmgandhi	18:6a4db94011d3	2565	else if(Size == 2U)
sahilmgandhi	18:6a4db94011d3	2566	{
sahilmgandhi	18:6a4db94011d3	2567	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2568	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2569
sahilmgandhi	18:6a4db94011d3	2570	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	2571	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2572
sahilmgandhi	18:6a4db94011d3	2573	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2574	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2575	}
sahilmgandhi	18:6a4db94011d3	2576	else
sahilmgandhi	18:6a4db94011d3	2577	{
sahilmgandhi	18:6a4db94011d3	2578	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2579	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2580	}
sahilmgandhi	18:6a4db94011d3	2581
sahilmgandhi	18:6a4db94011d3	2582	while(Size > 0U)
sahilmgandhi	18:6a4db94011d3	2583	{
sahilmgandhi	18:6a4db94011d3	2584	if(Size <= 3U)
sahilmgandhi	18:6a4db94011d3	2585	{
sahilmgandhi	18:6a4db94011d3	2586	/* One byte */
sahilmgandhi	18:6a4db94011d3	2587	if(Size== 1U)
sahilmgandhi	18:6a4db94011d3	2588	{
sahilmgandhi	18:6a4db94011d3	2589	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	2590	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2591	{
sahilmgandhi	18:6a4db94011d3	2592	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	2593	{
sahilmgandhi	18:6a4db94011d3	2594	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2595	}
sahilmgandhi	18:6a4db94011d3	2596	else
sahilmgandhi	18:6a4db94011d3	2597	{
sahilmgandhi	18:6a4db94011d3	2598	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2599	}
sahilmgandhi	18:6a4db94011d3	2600	}
sahilmgandhi	18:6a4db94011d3	2601
sahilmgandhi	18:6a4db94011d3	2602	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2603	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2604	Size--;
sahilmgandhi	18:6a4db94011d3	2605	}
sahilmgandhi	18:6a4db94011d3	2606	/* Two bytes */
sahilmgandhi	18:6a4db94011d3	2607	else if(Size == 2U)
sahilmgandhi	18:6a4db94011d3	2608	{
sahilmgandhi	18:6a4db94011d3	2609	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	2610	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2611	{
sahilmgandhi	18:6a4db94011d3	2612	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2613	}
sahilmgandhi	18:6a4db94011d3	2614
sahilmgandhi	18:6a4db94011d3	2615	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2616	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2617
sahilmgandhi	18:6a4db94011d3	2618	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2619	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2620	Size--;
sahilmgandhi	18:6a4db94011d3	2621
sahilmgandhi	18:6a4db94011d3	2622	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2623	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2624	Size--;
sahilmgandhi	18:6a4db94011d3	2625	}
sahilmgandhi	18:6a4db94011d3	2626	/* 3 Last bytes */
sahilmgandhi	18:6a4db94011d3	2627	else
sahilmgandhi	18:6a4db94011d3	2628	{
sahilmgandhi	18:6a4db94011d3	2629	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	2630	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2631	{
sahilmgandhi	18:6a4db94011d3	2632	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2633	}
sahilmgandhi	18:6a4db94011d3	2634
sahilmgandhi	18:6a4db94011d3	2635	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2636	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2637
sahilmgandhi	18:6a4db94011d3	2638	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2639	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2640	Size--;
sahilmgandhi	18:6a4db94011d3	2641
sahilmgandhi	18:6a4db94011d3	2642	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	2643	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2644	{
sahilmgandhi	18:6a4db94011d3	2645	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2646	}
sahilmgandhi	18:6a4db94011d3	2647
sahilmgandhi	18:6a4db94011d3	2648	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2649	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2650
sahilmgandhi	18:6a4db94011d3	2651	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2652	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2653	Size--;
sahilmgandhi	18:6a4db94011d3	2654
sahilmgandhi	18:6a4db94011d3	2655	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2656	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2657	Size--;
sahilmgandhi	18:6a4db94011d3	2658	}
sahilmgandhi	18:6a4db94011d3	2659	}
sahilmgandhi	18:6a4db94011d3	2660	else
sahilmgandhi	18:6a4db94011d3	2661	{
sahilmgandhi	18:6a4db94011d3	2662	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	2663	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2664	{
sahilmgandhi	18:6a4db94011d3	2665	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	2666	{
sahilmgandhi	18:6a4db94011d3	2667	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2668	}
sahilmgandhi	18:6a4db94011d3	2669	else
sahilmgandhi	18:6a4db94011d3	2670	{
sahilmgandhi	18:6a4db94011d3	2671	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2672	}
sahilmgandhi	18:6a4db94011d3	2673	}
sahilmgandhi	18:6a4db94011d3	2674
sahilmgandhi	18:6a4db94011d3	2675	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2676	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2677	Size--;
sahilmgandhi	18:6a4db94011d3	2678
sahilmgandhi	18:6a4db94011d3	2679	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
sahilmgandhi	18:6a4db94011d3	2680	{
sahilmgandhi	18:6a4db94011d3	2681	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2682	(*pData++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2683	Size--;
sahilmgandhi	18:6a4db94011d3	2684	}
sahilmgandhi	18:6a4db94011d3	2685	}
sahilmgandhi	18:6a4db94011d3	2686	}
sahilmgandhi	18:6a4db94011d3	2687
sahilmgandhi	18:6a4db94011d3	2688	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2689	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	2690
sahilmgandhi	18:6a4db94011d3	2691	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2692	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2693
sahilmgandhi	18:6a4db94011d3	2694	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2695	}
sahilmgandhi	18:6a4db94011d3	2696	else
sahilmgandhi	18:6a4db94011d3	2697	{
sahilmgandhi	18:6a4db94011d3	2698	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2699	}
sahilmgandhi	18:6a4db94011d3	2700	}
sahilmgandhi	18:6a4db94011d3	2701
sahilmgandhi	18:6a4db94011d3	2702	/**
sahilmgandhi	18:6a4db94011d3	2703	* @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
sahilmgandhi	18:6a4db94011d3	2704	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2705	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	2706	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2707	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2708	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2709	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2710	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2711	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2712	*/
sahilmgandhi	18:6a4db94011d3	2713	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2714	{
sahilmgandhi	18:6a4db94011d3	2715	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2716
sahilmgandhi	18:6a4db94011d3	2717	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2718	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2719
sahilmgandhi	18:6a4db94011d3	2720	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2721	{
sahilmgandhi	18:6a4db94011d3	2722	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2723	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2724	do
sahilmgandhi	18:6a4db94011d3	2725	{
sahilmgandhi	18:6a4db94011d3	2726	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2727	{
sahilmgandhi	18:6a4db94011d3	2728	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2729	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2730
sahilmgandhi	18:6a4db94011d3	2731	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2732	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2733
sahilmgandhi	18:6a4db94011d3	2734	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2735	}
sahilmgandhi	18:6a4db94011d3	2736	}
sahilmgandhi	18:6a4db94011d3	2737	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2738
sahilmgandhi	18:6a4db94011d3	2739	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2740	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2741
sahilmgandhi	18:6a4db94011d3	2742	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2743	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2744
sahilmgandhi	18:6a4db94011d3	2745	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2746	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2747	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2748
sahilmgandhi	18:6a4db94011d3	2749	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2750	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	2751	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2752	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2753	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	2754	hi2c->Memaddress = MemAddress;
sahilmgandhi	18:6a4db94011d3	2755	hi2c->MemaddSize = MemAddSize;
sahilmgandhi	18:6a4db94011d3	2756	hi2c->EventCount = 0U;
sahilmgandhi	18:6a4db94011d3	2757
sahilmgandhi	18:6a4db94011d3	2758	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	2759	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	2760
sahilmgandhi	18:6a4db94011d3	2761	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2762	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2763
sahilmgandhi	18:6a4db94011d3	2764	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2765	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2766	process unlock */
sahilmgandhi	18:6a4db94011d3	2767
sahilmgandhi	18:6a4db94011d3	2768	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2769	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2770
sahilmgandhi	18:6a4db94011d3	2771	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2772	}
sahilmgandhi	18:6a4db94011d3	2773	else
sahilmgandhi	18:6a4db94011d3	2774	{
sahilmgandhi	18:6a4db94011d3	2775	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2776	}
sahilmgandhi	18:6a4db94011d3	2777	}
sahilmgandhi	18:6a4db94011d3	2778
sahilmgandhi	18:6a4db94011d3	2779	/**
sahilmgandhi	18:6a4db94011d3	2780	* @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
sahilmgandhi	18:6a4db94011d3	2781	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2782	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	2783	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2784	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2785	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2786	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2787	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2788	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2789	*/
sahilmgandhi	18:6a4db94011d3	2790	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2791	{
sahilmgandhi	18:6a4db94011d3	2792	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2793
sahilmgandhi	18:6a4db94011d3	2794	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2795	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2796
sahilmgandhi	18:6a4db94011d3	2797	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2798	{
sahilmgandhi	18:6a4db94011d3	2799	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2800	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2801	do
sahilmgandhi	18:6a4db94011d3	2802	{
sahilmgandhi	18:6a4db94011d3	2803	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2804	{
sahilmgandhi	18:6a4db94011d3	2805	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2806	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2807
sahilmgandhi	18:6a4db94011d3	2808	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2809	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2810
sahilmgandhi	18:6a4db94011d3	2811	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2812	}
sahilmgandhi	18:6a4db94011d3	2813	}
sahilmgandhi	18:6a4db94011d3	2814	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2815
sahilmgandhi	18:6a4db94011d3	2816	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2817	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2818
sahilmgandhi	18:6a4db94011d3	2819	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2820	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2821
sahilmgandhi	18:6a4db94011d3	2822	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2823	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2824	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2825
sahilmgandhi	18:6a4db94011d3	2826	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2827	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	2828	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2829	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2830	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	2831	hi2c->Memaddress = MemAddress;
sahilmgandhi	18:6a4db94011d3	2832	hi2c->MemaddSize = MemAddSize;
sahilmgandhi	18:6a4db94011d3	2833	hi2c->EventCount = 0U;
sahilmgandhi	18:6a4db94011d3	2834
sahilmgandhi	18:6a4db94011d3	2835	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2836	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2837
sahilmgandhi	18:6a4db94011d3	2838	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	2839	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	2840
sahilmgandhi	18:6a4db94011d3	2841	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2842	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2843
sahilmgandhi	18:6a4db94011d3	2844	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	2845	{
sahilmgandhi	18:6a4db94011d3	2846	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2847	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2848	process unlock */
sahilmgandhi	18:6a4db94011d3	2849
sahilmgandhi	18:6a4db94011d3	2850	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2851	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2852	}
sahilmgandhi	18:6a4db94011d3	2853	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2854	}
sahilmgandhi	18:6a4db94011d3	2855	else
sahilmgandhi	18:6a4db94011d3	2856	{
sahilmgandhi	18:6a4db94011d3	2857	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2858	}
sahilmgandhi	18:6a4db94011d3	2859	}
sahilmgandhi	18:6a4db94011d3	2860
sahilmgandhi	18:6a4db94011d3	2861	/**
sahilmgandhi	18:6a4db94011d3	2862	* @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
sahilmgandhi	18:6a4db94011d3	2863	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2864	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	2865	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2866	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2867	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2868	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2869	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2870	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2871	*/
sahilmgandhi	18:6a4db94011d3	2872	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2873	{
sahilmgandhi	18:6a4db94011d3	2874	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	2875
sahilmgandhi	18:6a4db94011d3	2876	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2877	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2878
sahilmgandhi	18:6a4db94011d3	2879	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2880
sahilmgandhi	18:6a4db94011d3	2881	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2882	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2883
sahilmgandhi	18:6a4db94011d3	2884	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2885	{
sahilmgandhi	18:6a4db94011d3	2886	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2887	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2888	do
sahilmgandhi	18:6a4db94011d3	2889	{
sahilmgandhi	18:6a4db94011d3	2890	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2891	{
sahilmgandhi	18:6a4db94011d3	2892	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2893	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2894
sahilmgandhi	18:6a4db94011d3	2895	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2896	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2897
sahilmgandhi	18:6a4db94011d3	2898	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2899	}
sahilmgandhi	18:6a4db94011d3	2900	}
sahilmgandhi	18:6a4db94011d3	2901	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2902
sahilmgandhi	18:6a4db94011d3	2903	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2904	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2905
sahilmgandhi	18:6a4db94011d3	2906	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2907	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2908
sahilmgandhi	18:6a4db94011d3	2909	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2910	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2911	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2912
sahilmgandhi	18:6a4db94011d3	2913	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2914	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	2915	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2916	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2917
sahilmgandhi	18:6a4db94011d3	2918	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	2919	{
sahilmgandhi	18:6a4db94011d3	2920	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	2921	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	2922
sahilmgandhi	18:6a4db94011d3	2923	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	2924	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	2925
sahilmgandhi	18:6a4db94011d3	2926	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	2927	hi2c->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2928	hi2c->hdmatx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2929	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2930	hi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2931
sahilmgandhi	18:6a4db94011d3	2932	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	2933	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
sahilmgandhi	18:6a4db94011d3	2934
sahilmgandhi	18:6a4db94011d3	2935	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2936	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2937	{
sahilmgandhi	18:6a4db94011d3	2938	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2939	{
sahilmgandhi	18:6a4db94011d3	2940	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2941	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2942	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2943	}
sahilmgandhi	18:6a4db94011d3	2944	else
sahilmgandhi	18:6a4db94011d3	2945	{
sahilmgandhi	18:6a4db94011d3	2946	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2947	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2948	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2949	}
sahilmgandhi	18:6a4db94011d3	2950	}
sahilmgandhi	18:6a4db94011d3	2951
sahilmgandhi	18:6a4db94011d3	2952	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2953	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2954
sahilmgandhi	18:6a4db94011d3	2955	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2956	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	2957	}
sahilmgandhi	18:6a4db94011d3	2958	else
sahilmgandhi	18:6a4db94011d3	2959	{
sahilmgandhi	18:6a4db94011d3	2960	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2961	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2962	{
sahilmgandhi	18:6a4db94011d3	2963	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2964	{
sahilmgandhi	18:6a4db94011d3	2965	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2966	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2967	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2968	}
sahilmgandhi	18:6a4db94011d3	2969	else
sahilmgandhi	18:6a4db94011d3	2970	{
sahilmgandhi	18:6a4db94011d3	2971	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2972	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2973	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2974	}
sahilmgandhi	18:6a4db94011d3	2975	}
sahilmgandhi	18:6a4db94011d3	2976
sahilmgandhi	18:6a4db94011d3	2977	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2978	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2979
sahilmgandhi	18:6a4db94011d3	2980	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2981	}
sahilmgandhi	18:6a4db94011d3	2982
sahilmgandhi	18:6a4db94011d3	2983	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2984	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2985
sahilmgandhi	18:6a4db94011d3	2986	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2987	}
sahilmgandhi	18:6a4db94011d3	2988	else
sahilmgandhi	18:6a4db94011d3	2989	{
sahilmgandhi	18:6a4db94011d3	2990	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2991	}
sahilmgandhi	18:6a4db94011d3	2992	}
sahilmgandhi	18:6a4db94011d3	2993
sahilmgandhi	18:6a4db94011d3	2994	/**
sahilmgandhi	18:6a4db94011d3	2995	* @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
sahilmgandhi	18:6a4db94011d3	2996	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2997	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	2998	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2999	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	3000	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	3001	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	3002	* @param Size Amount of data to be read
sahilmgandhi	18:6a4db94011d3	3003	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3004	*/
sahilmgandhi	18:6a4db94011d3	3005	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	3006	{
sahilmgandhi	18:6a4db94011d3	3007	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	3008
sahilmgandhi	18:6a4db94011d3	3009	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	3010	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	3011
sahilmgandhi	18:6a4db94011d3	3012	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	3013
sahilmgandhi	18:6a4db94011d3	3014	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	3015	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	3016
sahilmgandhi	18:6a4db94011d3	3017	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	3018	{
sahilmgandhi	18:6a4db94011d3	3019	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	3020	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	3021	do
sahilmgandhi	18:6a4db94011d3	3022	{
sahilmgandhi	18:6a4db94011d3	3023	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	3024	{
sahilmgandhi	18:6a4db94011d3	3025	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	3026	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3027
sahilmgandhi	18:6a4db94011d3	3028	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3029	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3030
sahilmgandhi	18:6a4db94011d3	3031	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3032	}
sahilmgandhi	18:6a4db94011d3	3033	}
sahilmgandhi	18:6a4db94011d3	3034	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	3035
sahilmgandhi	18:6a4db94011d3	3036	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	3037	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3038
sahilmgandhi	18:6a4db94011d3	3039	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	3040	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	3041
sahilmgandhi	18:6a4db94011d3	3042	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	3043	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	3044	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	3045
sahilmgandhi	18:6a4db94011d3	3046	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	3047	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	3048	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	3049	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	3050
sahilmgandhi	18:6a4db94011d3	3051	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	3052	{
sahilmgandhi	18:6a4db94011d3	3053	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	3054	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	3055
sahilmgandhi	18:6a4db94011d3	3056	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	3057	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	3058
sahilmgandhi	18:6a4db94011d3	3059	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	3060	hi2c->hdmarx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3061	hi2c->hdmarx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3062	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3063	hi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3064
sahilmgandhi	18:6a4db94011d3	3065	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	3066	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
sahilmgandhi	18:6a4db94011d3	3067
sahilmgandhi	18:6a4db94011d3	3068	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	3069	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3070	{
sahilmgandhi	18:6a4db94011d3	3071	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	3072	{
sahilmgandhi	18:6a4db94011d3	3073	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3074	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3075	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3076	}
sahilmgandhi	18:6a4db94011d3	3077	else
sahilmgandhi	18:6a4db94011d3	3078	{
sahilmgandhi	18:6a4db94011d3	3079	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3080	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3081	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3082	}
sahilmgandhi	18:6a4db94011d3	3083	}
sahilmgandhi	18:6a4db94011d3	3084
sahilmgandhi	18:6a4db94011d3	3085	if(Size == 1U)
sahilmgandhi	18:6a4db94011d3	3086	{
sahilmgandhi	18:6a4db94011d3	3087	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	3088	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	3089	}
sahilmgandhi	18:6a4db94011d3	3090	else
sahilmgandhi	18:6a4db94011d3	3091	{
sahilmgandhi	18:6a4db94011d3	3092	/* Enable Last DMA bit */
sahilmgandhi	18:6a4db94011d3	3093	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
sahilmgandhi	18:6a4db94011d3	3094	}
sahilmgandhi	18:6a4db94011d3	3095
sahilmgandhi	18:6a4db94011d3	3096	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	3097	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	3098
sahilmgandhi	18:6a4db94011d3	3099	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3100	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3101
sahilmgandhi	18:6a4db94011d3	3102	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	3103	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	3104	process unlock */
sahilmgandhi	18:6a4db94011d3	3105	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3106	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3107
sahilmgandhi	18:6a4db94011d3	3108	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	3109	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	3110	}
sahilmgandhi	18:6a4db94011d3	3111	else
sahilmgandhi	18:6a4db94011d3	3112	{
sahilmgandhi	18:6a4db94011d3	3113	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	3114	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3115	{
sahilmgandhi	18:6a4db94011d3	3116	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	3117	{
sahilmgandhi	18:6a4db94011d3	3118	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3119	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3120	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3121	}
sahilmgandhi	18:6a4db94011d3	3122	else
sahilmgandhi	18:6a4db94011d3	3123	{
sahilmgandhi	18:6a4db94011d3	3124	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3125	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3126	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3127	}
sahilmgandhi	18:6a4db94011d3	3128	}
sahilmgandhi	18:6a4db94011d3	3129
sahilmgandhi	18:6a4db94011d3	3130	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	3131	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	3132
sahilmgandhi	18:6a4db94011d3	3133	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3134	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3135
sahilmgandhi	18:6a4db94011d3	3136	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3137
sahilmgandhi	18:6a4db94011d3	3138	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3139	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3140	}
sahilmgandhi	18:6a4db94011d3	3141
sahilmgandhi	18:6a4db94011d3	3142	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3143	}
sahilmgandhi	18:6a4db94011d3	3144	else
sahilmgandhi	18:6a4db94011d3	3145	{
sahilmgandhi	18:6a4db94011d3	3146	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	3147	}
sahilmgandhi	18:6a4db94011d3	3148	}
sahilmgandhi	18:6a4db94011d3	3149
sahilmgandhi	18:6a4db94011d3	3150	/**
sahilmgandhi	18:6a4db94011d3	3151	* @brief Checks if target device is ready for communication.
sahilmgandhi	18:6a4db94011d3	3152	* @note This function is used with Memory devices
sahilmgandhi	18:6a4db94011d3	3153	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3154	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3155	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	3156	* @param Trials Number of trials
sahilmgandhi	18:6a4db94011d3	3157	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	3158	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3159	*/
sahilmgandhi	18:6a4db94011d3	3160	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	3161	{
sahilmgandhi	18:6a4db94011d3	3162	uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
sahilmgandhi	18:6a4db94011d3	3163
sahilmgandhi	18:6a4db94011d3	3164	/* Get tick */
sahilmgandhi	18:6a4db94011d3	3165	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	3166
sahilmgandhi	18:6a4db94011d3	3167	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	3168	{
sahilmgandhi	18:6a4db94011d3	3169	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	3170	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3171	{
sahilmgandhi	18:6a4db94011d3	3172	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	3173	}
sahilmgandhi	18:6a4db94011d3	3174
sahilmgandhi	18:6a4db94011d3	3175	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	3176	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3177
sahilmgandhi	18:6a4db94011d3	3178	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	3179	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	3180
sahilmgandhi	18:6a4db94011d3	3181	hi2c->State = HAL_I2C_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	3182	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	3183	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	3184
sahilmgandhi	18:6a4db94011d3	3185	do
sahilmgandhi	18:6a4db94011d3	3186	{
sahilmgandhi	18:6a4db94011d3	3187	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	3188	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	3189
sahilmgandhi	18:6a4db94011d3	3190	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	3191	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3192	{
sahilmgandhi	18:6a4db94011d3	3193	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3194	}
sahilmgandhi	18:6a4db94011d3	3195
sahilmgandhi	18:6a4db94011d3	3196	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	3197	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	3198
sahilmgandhi	18:6a4db94011d3	3199	/* Wait until ADDR or AF flag are set */
sahilmgandhi	18:6a4db94011d3	3200	/* Get tick */
sahilmgandhi	18:6a4db94011d3	3201	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	3202
sahilmgandhi	18:6a4db94011d3	3203	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	3204	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3205	tmp3 = hi2c->State;
sahilmgandhi	18:6a4db94011d3	3206	while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
sahilmgandhi	18:6a4db94011d3	3207	{
sahilmgandhi	18:6a4db94011d3	3208	if((Timeout == 0U)\|\|((HAL_GetTick() - tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	3209	{
sahilmgandhi	18:6a4db94011d3	3210	hi2c->State = HAL_I2C_STATE_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3211	}
sahilmgandhi	18:6a4db94011d3	3212	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	3213	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3214	tmp3 = hi2c->State;
sahilmgandhi	18:6a4db94011d3	3215	}
sahilmgandhi	18:6a4db94011d3	3216
sahilmgandhi	18:6a4db94011d3	3217	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3218
sahilmgandhi	18:6a4db94011d3	3219	/* Check if the ADDR flag has been set */
sahilmgandhi	18:6a4db94011d3	3220	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
sahilmgandhi	18:6a4db94011d3	3221	{
sahilmgandhi	18:6a4db94011d3	3222	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3223	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3224
sahilmgandhi	18:6a4db94011d3	3225	/* Clear ADDR Flag */
sahilmgandhi	18:6a4db94011d3	3226	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	3227
sahilmgandhi	18:6a4db94011d3	3228	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	3229	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3230	{
sahilmgandhi	18:6a4db94011d3	3231	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3232	}
sahilmgandhi	18:6a4db94011d3	3233
sahilmgandhi	18:6a4db94011d3	3234	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3235
sahilmgandhi	18:6a4db94011d3	3236	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3237	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3238
sahilmgandhi	18:6a4db94011d3	3239	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3240	}
sahilmgandhi	18:6a4db94011d3	3241	else
sahilmgandhi	18:6a4db94011d3	3242	{
sahilmgandhi	18:6a4db94011d3	3243	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3244	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3245
sahilmgandhi	18:6a4db94011d3	3246	/* Clear AF Flag */
sahilmgandhi	18:6a4db94011d3	3247	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3248
sahilmgandhi	18:6a4db94011d3	3249	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	3250	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3251	{
sahilmgandhi	18:6a4db94011d3	3252	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3253	}
sahilmgandhi	18:6a4db94011d3	3254	}
sahilmgandhi	18:6a4db94011d3	3255	}while(I2C_Trials++ < Trials);
sahilmgandhi	18:6a4db94011d3	3256
sahilmgandhi	18:6a4db94011d3	3257	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3258
sahilmgandhi	18:6a4db94011d3	3259	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3260	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3261
sahilmgandhi	18:6a4db94011d3	3262	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3263	}
sahilmgandhi	18:6a4db94011d3	3264	else
sahilmgandhi	18:6a4db94011d3	3265	{
sahilmgandhi	18:6a4db94011d3	3266	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	3267	}
sahilmgandhi	18:6a4db94011d3	3268	}
sahilmgandhi	18:6a4db94011d3	3269
sahilmgandhi	18:6a4db94011d3	3270	/**
sahilmgandhi	18:6a4db94011d3	3271	* @brief This function handles I2C event interrupt request.
sahilmgandhi	18:6a4db94011d3	3272	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3273	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3274	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3275	*/
sahilmgandhi	18:6a4db94011d3	3276	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3277	{
sahilmgandhi	18:6a4db94011d3	3278	uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
sahilmgandhi	18:6a4db94011d3	3279	uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
sahilmgandhi	18:6a4db94011d3	3280	uint32_t itsources = READ_REG(hi2c->Instance->CR2);
sahilmgandhi	18:6a4db94011d3	3281
sahilmgandhi	18:6a4db94011d3	3282	uint32_t CurrentMode = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	3283
sahilmgandhi	18:6a4db94011d3	3284	/* Master or Memory mode selected */
sahilmgandhi	18:6a4db94011d3	3285	if((CurrentMode == HAL_I2C_MODE_MASTER) \|\| (CurrentMode == HAL_I2C_MODE_MEM))
sahilmgandhi	18:6a4db94011d3	3286	{
sahilmgandhi	18:6a4db94011d3	3287	/* SB Set ----------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3288	if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3289	{
sahilmgandhi	18:6a4db94011d3	3290	I2C_Master_SB(hi2c);
sahilmgandhi	18:6a4db94011d3	3291	}
sahilmgandhi	18:6a4db94011d3	3292	/* ADD10 Set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3293	else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3294	{
sahilmgandhi	18:6a4db94011d3	3295	I2C_Master_ADD10(hi2c);
sahilmgandhi	18:6a4db94011d3	3296	}
sahilmgandhi	18:6a4db94011d3	3297	/* ADDR Set --------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3298	else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3299	{
sahilmgandhi	18:6a4db94011d3	3300	I2C_Master_ADDR(hi2c);
sahilmgandhi	18:6a4db94011d3	3301	}
sahilmgandhi	18:6a4db94011d3	3302
sahilmgandhi	18:6a4db94011d3	3303	/* I2C in mode Transmitter -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3304	if((sr2itflags & I2C_FLAG_TRA) != RESET)
sahilmgandhi	18:6a4db94011d3	3305	{
sahilmgandhi	18:6a4db94011d3	3306	/* TXE set and BTF reset -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3307	if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
sahilmgandhi	18:6a4db94011d3	3308	{
sahilmgandhi	18:6a4db94011d3	3309	I2C_MasterTransmit_TXE(hi2c);
sahilmgandhi	18:6a4db94011d3	3310	}
sahilmgandhi	18:6a4db94011d3	3311	/* BTF set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3312	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3313	{
sahilmgandhi	18:6a4db94011d3	3314	I2C_MasterTransmit_BTF(hi2c);
sahilmgandhi	18:6a4db94011d3	3315	}
sahilmgandhi	18:6a4db94011d3	3316	}
sahilmgandhi	18:6a4db94011d3	3317	/* I2C in mode Receiver --------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3318	else
sahilmgandhi	18:6a4db94011d3	3319	{
sahilmgandhi	18:6a4db94011d3	3320	/* RXNE set and BTF reset -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3321	if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
sahilmgandhi	18:6a4db94011d3	3322	{
sahilmgandhi	18:6a4db94011d3	3323	I2C_MasterReceive_RXNE(hi2c);
sahilmgandhi	18:6a4db94011d3	3324	}
sahilmgandhi	18:6a4db94011d3	3325	/* BTF set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3326	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3327	{
sahilmgandhi	18:6a4db94011d3	3328	I2C_MasterReceive_BTF(hi2c);
sahilmgandhi	18:6a4db94011d3	3329	}
sahilmgandhi	18:6a4db94011d3	3330	}
sahilmgandhi	18:6a4db94011d3	3331	}
sahilmgandhi	18:6a4db94011d3	3332	/* Slave mode selected */
sahilmgandhi	18:6a4db94011d3	3333	else
sahilmgandhi	18:6a4db94011d3	3334	{
sahilmgandhi	18:6a4db94011d3	3335	/* ADDR set --------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3336	if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3337	{
sahilmgandhi	18:6a4db94011d3	3338	I2C_Slave_ADDR(hi2c);
sahilmgandhi	18:6a4db94011d3	3339	}
sahilmgandhi	18:6a4db94011d3	3340	/* STOPF set --------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3341	else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3342	{
sahilmgandhi	18:6a4db94011d3	3343	I2C_Slave_STOPF(hi2c);
sahilmgandhi	18:6a4db94011d3	3344	}
sahilmgandhi	18:6a4db94011d3	3345	/* I2C in mode Transmitter -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3346	else if((sr2itflags & I2C_FLAG_TRA) != RESET)
sahilmgandhi	18:6a4db94011d3	3347	{
sahilmgandhi	18:6a4db94011d3	3348	/* TXE set and BTF reset -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3349	if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
sahilmgandhi	18:6a4db94011d3	3350	{
sahilmgandhi	18:6a4db94011d3	3351	I2C_SlaveTransmit_TXE(hi2c);
sahilmgandhi	18:6a4db94011d3	3352	}
sahilmgandhi	18:6a4db94011d3	3353	/* BTF set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3354	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3355	{
sahilmgandhi	18:6a4db94011d3	3356	I2C_SlaveTransmit_BTF(hi2c);
sahilmgandhi	18:6a4db94011d3	3357	}
sahilmgandhi	18:6a4db94011d3	3358	}
sahilmgandhi	18:6a4db94011d3	3359	/* I2C in mode Receiver --------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3360	else
sahilmgandhi	18:6a4db94011d3	3361	{
sahilmgandhi	18:6a4db94011d3	3362	/* RXNE set and BTF reset ----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3363	if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
sahilmgandhi	18:6a4db94011d3	3364	{
sahilmgandhi	18:6a4db94011d3	3365	I2C_SlaveReceive_RXNE(hi2c);
sahilmgandhi	18:6a4db94011d3	3366	}
sahilmgandhi	18:6a4db94011d3	3367	/* BTF set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3368	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3369	{
sahilmgandhi	18:6a4db94011d3	3370	I2C_SlaveReceive_BTF(hi2c);
sahilmgandhi	18:6a4db94011d3	3371	}
sahilmgandhi	18:6a4db94011d3	3372	}
sahilmgandhi	18:6a4db94011d3	3373	}
sahilmgandhi	18:6a4db94011d3	3374	}
sahilmgandhi	18:6a4db94011d3	3375
sahilmgandhi	18:6a4db94011d3	3376	/**
sahilmgandhi	18:6a4db94011d3	3377	* @brief This function handles I2C error interrupt request.
sahilmgandhi	18:6a4db94011d3	3378	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3379	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3380	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3381	*/
sahilmgandhi	18:6a4db94011d3	3382	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3383	{
sahilmgandhi	18:6a4db94011d3	3384	uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
sahilmgandhi	18:6a4db94011d3	3385	uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
sahilmgandhi	18:6a4db94011d3	3386	uint32_t itsources = READ_REG(hi2c->Instance->CR2);
sahilmgandhi	18:6a4db94011d3	3387
sahilmgandhi	18:6a4db94011d3	3388	/* I2C Bus error interrupt occurred ----------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3389	if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
sahilmgandhi	18:6a4db94011d3	3390	{
sahilmgandhi	18:6a4db94011d3	3391	hi2c->ErrorCode \|= HAL_I2C_ERROR_BERR;
sahilmgandhi	18:6a4db94011d3	3392
sahilmgandhi	18:6a4db94011d3	3393	/* Clear BERR flag */
sahilmgandhi	18:6a4db94011d3	3394	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
sahilmgandhi	18:6a4db94011d3	3395	}
sahilmgandhi	18:6a4db94011d3	3396
sahilmgandhi	18:6a4db94011d3	3397	/* I2C Arbitration Loss error interrupt occurred ---------------------------*/
sahilmgandhi	18:6a4db94011d3	3398	if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
sahilmgandhi	18:6a4db94011d3	3399	{
sahilmgandhi	18:6a4db94011d3	3400	hi2c->ErrorCode \|= HAL_I2C_ERROR_ARLO;
sahilmgandhi	18:6a4db94011d3	3401
sahilmgandhi	18:6a4db94011d3	3402	/* Clear ARLO flag */
sahilmgandhi	18:6a4db94011d3	3403	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
sahilmgandhi	18:6a4db94011d3	3404	}
sahilmgandhi	18:6a4db94011d3	3405
sahilmgandhi	18:6a4db94011d3	3406	/* I2C Acknowledge failure error interrupt occurred ------------------------*/
sahilmgandhi	18:6a4db94011d3	3407	if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
sahilmgandhi	18:6a4db94011d3	3408	{
sahilmgandhi	18:6a4db94011d3	3409	tmp1 = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	3410	tmp2 = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	3411	tmp3 = hi2c->State;
sahilmgandhi	18:6a4db94011d3	3412	tmp4 = hi2c->PreviousState;
sahilmgandhi	18:6a4db94011d3	3413	if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
sahilmgandhi	18:6a4db94011d3	3414	((tmp3 == HAL_I2C_STATE_BUSY_TX) \|\| (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) \|\| \
sahilmgandhi	18:6a4db94011d3	3415	((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
sahilmgandhi	18:6a4db94011d3	3416	{
sahilmgandhi	18:6a4db94011d3	3417	I2C_Slave_AF(hi2c);
sahilmgandhi	18:6a4db94011d3	3418	}
sahilmgandhi	18:6a4db94011d3	3419	else
sahilmgandhi	18:6a4db94011d3	3420	{
sahilmgandhi	18:6a4db94011d3	3421	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	3422
sahilmgandhi	18:6a4db94011d3	3423	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3424	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
sahilmgandhi	18:6a4db94011d3	3425
sahilmgandhi	18:6a4db94011d3	3426	/* Clear AF flag */
sahilmgandhi	18:6a4db94011d3	3427	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3428
sahilmgandhi	18:6a4db94011d3	3429	}
sahilmgandhi	18:6a4db94011d3	3430	}
sahilmgandhi	18:6a4db94011d3	3431
sahilmgandhi	18:6a4db94011d3	3432	/* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
sahilmgandhi	18:6a4db94011d3	3433	if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
sahilmgandhi	18:6a4db94011d3	3434	{
sahilmgandhi	18:6a4db94011d3	3435	hi2c->ErrorCode \|= HAL_I2C_ERROR_OVR;
sahilmgandhi	18:6a4db94011d3	3436	/* Clear OVR flag */
sahilmgandhi	18:6a4db94011d3	3437	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
sahilmgandhi	18:6a4db94011d3	3438	}
sahilmgandhi	18:6a4db94011d3	3439
sahilmgandhi	18:6a4db94011d3	3440	/* Call the Error Callback in case of Error detected -----------------------*/
sahilmgandhi	18:6a4db94011d3	3441	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
sahilmgandhi	18:6a4db94011d3	3442	{
sahilmgandhi	18:6a4db94011d3	3443	I2C_ITError(hi2c);
sahilmgandhi	18:6a4db94011d3	3444	}
sahilmgandhi	18:6a4db94011d3	3445	}
sahilmgandhi	18:6a4db94011d3	3446
sahilmgandhi	18:6a4db94011d3	3447	/**
sahilmgandhi	18:6a4db94011d3	3448	* @brief Master Tx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	3449	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3450	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3451	* @retval None
sahilmgandhi	18:6a4db94011d3	3452	*/
sahilmgandhi	18:6a4db94011d3	3453	__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3454	{
sahilmgandhi	18:6a4db94011d3	3455	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3456	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3457	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3458	the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3459	*/
sahilmgandhi	18:6a4db94011d3	3460	}
sahilmgandhi	18:6a4db94011d3	3461
sahilmgandhi	18:6a4db94011d3	3462	/**
sahilmgandhi	18:6a4db94011d3	3463	* @brief Master Rx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	3464	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3465	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3466	* @retval None
sahilmgandhi	18:6a4db94011d3	3467	*/
sahilmgandhi	18:6a4db94011d3	3468	__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3469	{
sahilmgandhi	18:6a4db94011d3	3470	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3471	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3472	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3473	the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3474	*/
sahilmgandhi	18:6a4db94011d3	3475	}
sahilmgandhi	18:6a4db94011d3	3476
sahilmgandhi	18:6a4db94011d3	3477	/** @brief Slave Tx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	3478	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3479	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3480	* @retval None
sahilmgandhi	18:6a4db94011d3	3481	*/
sahilmgandhi	18:6a4db94011d3	3482	__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3483	{
sahilmgandhi	18:6a4db94011d3	3484	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3485	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3486	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3487	the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3488	*/
sahilmgandhi	18:6a4db94011d3	3489	}
sahilmgandhi	18:6a4db94011d3	3490
sahilmgandhi	18:6a4db94011d3	3491	/**
sahilmgandhi	18:6a4db94011d3	3492	* @brief Slave Rx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	3493	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3494	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3495	* @retval None
sahilmgandhi	18:6a4db94011d3	3496	*/
sahilmgandhi	18:6a4db94011d3	3497	__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3498	{
sahilmgandhi	18:6a4db94011d3	3499	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3500	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3501	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3502	the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3503	*/
sahilmgandhi	18:6a4db94011d3	3504	}
sahilmgandhi	18:6a4db94011d3	3505
sahilmgandhi	18:6a4db94011d3	3506	/**
sahilmgandhi	18:6a4db94011d3	3507	* @brief Slave Address Match callback.
sahilmgandhi	18:6a4db94011d3	3508	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3509	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3510	* @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	3511	* @param AddrMatchCode Address Match Code
sahilmgandhi	18:6a4db94011d3	3512	* @retval None
sahilmgandhi	18:6a4db94011d3	3513	*/
sahilmgandhi	18:6a4db94011d3	3514	__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
sahilmgandhi	18:6a4db94011d3	3515	{
sahilmgandhi	18:6a4db94011d3	3516	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3517	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3518	UNUSED(TransferDirection);
sahilmgandhi	18:6a4db94011d3	3519	UNUSED(AddrMatchCode);
sahilmgandhi	18:6a4db94011d3	3520	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3521	the HAL_I2C_AddrCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3522	*/
sahilmgandhi	18:6a4db94011d3	3523	}
sahilmgandhi	18:6a4db94011d3	3524
sahilmgandhi	18:6a4db94011d3	3525	/**
sahilmgandhi	18:6a4db94011d3	3526	* @brief Listen Complete callback.
sahilmgandhi	18:6a4db94011d3	3527	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3528	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3529	* @retval None
sahilmgandhi	18:6a4db94011d3	3530	*/
sahilmgandhi	18:6a4db94011d3	3531	__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3532	{
sahilmgandhi	18:6a4db94011d3	3533	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3534	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3535	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3536	the HAL_I2C_ListenCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3537	*/
sahilmgandhi	18:6a4db94011d3	3538	}
sahilmgandhi	18:6a4db94011d3	3539
sahilmgandhi	18:6a4db94011d3	3540	/**
sahilmgandhi	18:6a4db94011d3	3541	* @brief Memory Tx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	3542	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3543	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3544	* @retval None
sahilmgandhi	18:6a4db94011d3	3545	*/
sahilmgandhi	18:6a4db94011d3	3546	__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3547	{
sahilmgandhi	18:6a4db94011d3	3548	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3549	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3550	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3551	the HAL_I2C_MemTxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3552	*/
sahilmgandhi	18:6a4db94011d3	3553	}
sahilmgandhi	18:6a4db94011d3	3554
sahilmgandhi	18:6a4db94011d3	3555	/**
sahilmgandhi	18:6a4db94011d3	3556	* @brief Memory Rx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	3557	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3558	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3559	* @retval None
sahilmgandhi	18:6a4db94011d3	3560	*/
sahilmgandhi	18:6a4db94011d3	3561	__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3562	{
sahilmgandhi	18:6a4db94011d3	3563	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3564	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3565	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3566	the HAL_I2C_MemRxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3567	*/
sahilmgandhi	18:6a4db94011d3	3568	}
sahilmgandhi	18:6a4db94011d3	3569
sahilmgandhi	18:6a4db94011d3	3570	/**
sahilmgandhi	18:6a4db94011d3	3571	* @brief I2C error callbacks.
sahilmgandhi	18:6a4db94011d3	3572	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3573	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3574	* @retval None
sahilmgandhi	18:6a4db94011d3	3575	*/
sahilmgandhi	18:6a4db94011d3	3576	__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3577	{
sahilmgandhi	18:6a4db94011d3	3578	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3579	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3580	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3581	the HAL_I2C_ErrorCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3582	*/
sahilmgandhi	18:6a4db94011d3	3583	}
sahilmgandhi	18:6a4db94011d3	3584
sahilmgandhi	18:6a4db94011d3	3585	/**
sahilmgandhi	18:6a4db94011d3	3586	* @brief I2C abort callback.
sahilmgandhi	18:6a4db94011d3	3587	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3588	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3589	* @retval None
sahilmgandhi	18:6a4db94011d3	3590	*/
sahilmgandhi	18:6a4db94011d3	3591	__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3592	{
sahilmgandhi	18:6a4db94011d3	3593	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3594	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3595
sahilmgandhi	18:6a4db94011d3	3596	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3597	the HAL_I2C_AbortCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3598	*/
sahilmgandhi	18:6a4db94011d3	3599	}
sahilmgandhi	18:6a4db94011d3	3600
sahilmgandhi	18:6a4db94011d3	3601	/**
sahilmgandhi	18:6a4db94011d3	3602	* @}
sahilmgandhi	18:6a4db94011d3	3603	*/
sahilmgandhi	18:6a4db94011d3	3604
sahilmgandhi	18:6a4db94011d3	3605	/** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
sahilmgandhi	18:6a4db94011d3	3606	* @brief Peripheral State and Errors functions
sahilmgandhi	18:6a4db94011d3	3607	*
sahilmgandhi	18:6a4db94011d3	3608	@verbatim
sahilmgandhi	18:6a4db94011d3	3609	===============================================================================
sahilmgandhi	18:6a4db94011d3	3610	##### Peripheral State, Mode and Errors functions #####
sahilmgandhi	18:6a4db94011d3	3611	===============================================================================
sahilmgandhi	18:6a4db94011d3	3612	[..]
sahilmgandhi	18:6a4db94011d3	3613	This subsection permits to get in run-time the status of the peripheral
sahilmgandhi	18:6a4db94011d3	3614	and the data flow.
sahilmgandhi	18:6a4db94011d3	3615
sahilmgandhi	18:6a4db94011d3	3616	@endverbatim
sahilmgandhi	18:6a4db94011d3	3617	* @{
sahilmgandhi	18:6a4db94011d3	3618	*/
sahilmgandhi	18:6a4db94011d3	3619
sahilmgandhi	18:6a4db94011d3	3620	/**
sahilmgandhi	18:6a4db94011d3	3621	* @brief Returns the I2C state.
sahilmgandhi	18:6a4db94011d3	3622	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3623	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3624	* @retval HAL state
sahilmgandhi	18:6a4db94011d3	3625	*/
sahilmgandhi	18:6a4db94011d3	3626	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3627	{
sahilmgandhi	18:6a4db94011d3	3628	return hi2c->State;
sahilmgandhi	18:6a4db94011d3	3629	}
sahilmgandhi	18:6a4db94011d3	3630
sahilmgandhi	18:6a4db94011d3	3631	/**
sahilmgandhi	18:6a4db94011d3	3632	* @brief Returns the I2C Master, Slave, Memory or no mode.
sahilmgandhi	18:6a4db94011d3	3633	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3634	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3635	* @retval HAL mode
sahilmgandhi	18:6a4db94011d3	3636	*/
sahilmgandhi	18:6a4db94011d3	3637	HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3638	{
sahilmgandhi	18:6a4db94011d3	3639	return hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	3640	}
sahilmgandhi	18:6a4db94011d3	3641
sahilmgandhi	18:6a4db94011d3	3642	/**
sahilmgandhi	18:6a4db94011d3	3643	* @brief Return the I2C error code
sahilmgandhi	18:6a4db94011d3	3644	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3645	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3646	* @retval I2C Error Code
sahilmgandhi	18:6a4db94011d3	3647	*/
sahilmgandhi	18:6a4db94011d3	3648	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3649	{
sahilmgandhi	18:6a4db94011d3	3650	return hi2c->ErrorCode;
sahilmgandhi	18:6a4db94011d3	3651	}
sahilmgandhi	18:6a4db94011d3	3652
sahilmgandhi	18:6a4db94011d3	3653	/**
sahilmgandhi	18:6a4db94011d3	3654	* @}
sahilmgandhi	18:6a4db94011d3	3655	*/
sahilmgandhi	18:6a4db94011d3	3656
sahilmgandhi	18:6a4db94011d3	3657	/**
sahilmgandhi	18:6a4db94011d3	3658	* @brief Handle TXE flag for Master
sahilmgandhi	18:6a4db94011d3	3659	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3660	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3661	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3662	*/
sahilmgandhi	18:6a4db94011d3	3663	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3664	{
sahilmgandhi	18:6a4db94011d3	3665	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	3666	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	3667	uint32_t CurrentMode = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	3668	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	3669	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	3670
sahilmgandhi	18:6a4db94011d3	3671	if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
sahilmgandhi	18:6a4db94011d3	3672	{
sahilmgandhi	18:6a4db94011d3	3673	/* Call TxCpltCallback() directly if no stop mode is set */
sahilmgandhi	18:6a4db94011d3	3674	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	3675	{
sahilmgandhi	18:6a4db94011d3	3676	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3677
sahilmgandhi	18:6a4db94011d3	3678	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	3679	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	3680	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3681	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3682
sahilmgandhi	18:6a4db94011d3	3683	HAL_I2C_MasterTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3684	}
sahilmgandhi	18:6a4db94011d3	3685	else /* Generate Stop condition then Call TxCpltCallback() */
sahilmgandhi	18:6a4db94011d3	3686	{
sahilmgandhi	18:6a4db94011d3	3687	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3688	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3689
sahilmgandhi	18:6a4db94011d3	3690	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3691	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3692
sahilmgandhi	18:6a4db94011d3	3693	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	3694	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3695
sahilmgandhi	18:6a4db94011d3	3696	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3697	{
sahilmgandhi	18:6a4db94011d3	3698	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3699	HAL_I2C_MemTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3700	}
sahilmgandhi	18:6a4db94011d3	3701	else
sahilmgandhi	18:6a4db94011d3	3702	{
sahilmgandhi	18:6a4db94011d3	3703	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3704	HAL_I2C_MasterTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3705	}
sahilmgandhi	18:6a4db94011d3	3706	}
sahilmgandhi	18:6a4db94011d3	3707	}
sahilmgandhi	18:6a4db94011d3	3708	else if((CurrentState == HAL_I2C_STATE_BUSY_TX) \|\| \
sahilmgandhi	18:6a4db94011d3	3709	((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
sahilmgandhi	18:6a4db94011d3	3710	{
sahilmgandhi	18:6a4db94011d3	3711	if(hi2c->XferCount == 0U)
sahilmgandhi	18:6a4db94011d3	3712	{
sahilmgandhi	18:6a4db94011d3	3713	/* Disable BUF interrupt */
sahilmgandhi	18:6a4db94011d3	3714	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
sahilmgandhi	18:6a4db94011d3	3715	}
sahilmgandhi	18:6a4db94011d3	3716	else
sahilmgandhi	18:6a4db94011d3	3717	{
sahilmgandhi	18:6a4db94011d3	3718	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3719	{
sahilmgandhi	18:6a4db94011d3	3720	if(hi2c->EventCount == 0)
sahilmgandhi	18:6a4db94011d3	3721	{
sahilmgandhi	18:6a4db94011d3	3722	/* If Memory address size is 8Bit */
sahilmgandhi	18:6a4db94011d3	3723	if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
sahilmgandhi	18:6a4db94011d3	3724	{
sahilmgandhi	18:6a4db94011d3	3725	/* Send Memory Address */
sahilmgandhi	18:6a4db94011d3	3726	hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
sahilmgandhi	18:6a4db94011d3	3727
sahilmgandhi	18:6a4db94011d3	3728	hi2c->EventCount += 2;
sahilmgandhi	18:6a4db94011d3	3729	}
sahilmgandhi	18:6a4db94011d3	3730	/* If Memory address size is 16Bit */
sahilmgandhi	18:6a4db94011d3	3731	else
sahilmgandhi	18:6a4db94011d3	3732	{
sahilmgandhi	18:6a4db94011d3	3733	/* Send MSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	3734	hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
sahilmgandhi	18:6a4db94011d3	3735
sahilmgandhi	18:6a4db94011d3	3736	hi2c->EventCount++;
sahilmgandhi	18:6a4db94011d3	3737	}
sahilmgandhi	18:6a4db94011d3	3738	}
sahilmgandhi	18:6a4db94011d3	3739	else if(hi2c->EventCount == 1)
sahilmgandhi	18:6a4db94011d3	3740	{
sahilmgandhi	18:6a4db94011d3	3741	/* Send LSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	3742	hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
sahilmgandhi	18:6a4db94011d3	3743
sahilmgandhi	18:6a4db94011d3	3744	hi2c->EventCount++;
sahilmgandhi	18:6a4db94011d3	3745	}
sahilmgandhi	18:6a4db94011d3	3746	else if(hi2c->EventCount == 2)
sahilmgandhi	18:6a4db94011d3	3747	{
sahilmgandhi	18:6a4db94011d3	3748	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	3749	{
sahilmgandhi	18:6a4db94011d3	3750	/* Generate Restart */
sahilmgandhi	18:6a4db94011d3	3751	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	3752	}
sahilmgandhi	18:6a4db94011d3	3753	else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	3754	{
sahilmgandhi	18:6a4db94011d3	3755	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	3756	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	3757	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3758	}
sahilmgandhi	18:6a4db94011d3	3759	}
sahilmgandhi	18:6a4db94011d3	3760	}
sahilmgandhi	18:6a4db94011d3	3761	else
sahilmgandhi	18:6a4db94011d3	3762	{
sahilmgandhi	18:6a4db94011d3	3763	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	3764	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	3765	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3766	}
sahilmgandhi	18:6a4db94011d3	3767	}
sahilmgandhi	18:6a4db94011d3	3768	}
sahilmgandhi	18:6a4db94011d3	3769	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3770	}
sahilmgandhi	18:6a4db94011d3	3771
sahilmgandhi	18:6a4db94011d3	3772	/**
sahilmgandhi	18:6a4db94011d3	3773	* @brief Handle BTF flag for Master transmitter
sahilmgandhi	18:6a4db94011d3	3774	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3775	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3776	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3777	*/
sahilmgandhi	18:6a4db94011d3	3778	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3779	{
sahilmgandhi	18:6a4db94011d3	3780	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	3781	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	3782	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	3783
sahilmgandhi	18:6a4db94011d3	3784	if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	3785	{
sahilmgandhi	18:6a4db94011d3	3786	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	3787	{
sahilmgandhi	18:6a4db94011d3	3788	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	3789	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	3790	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3791	}
sahilmgandhi	18:6a4db94011d3	3792	else
sahilmgandhi	18:6a4db94011d3	3793	{
sahilmgandhi	18:6a4db94011d3	3794	/* Call TxCpltCallback() directly if no stop mode is set */
sahilmgandhi	18:6a4db94011d3	3795	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	3796	{
sahilmgandhi	18:6a4db94011d3	3797	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3798
sahilmgandhi	18:6a4db94011d3	3799	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	3800	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	3801	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3802	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3803
sahilmgandhi	18:6a4db94011d3	3804	HAL_I2C_MasterTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3805	}
sahilmgandhi	18:6a4db94011d3	3806	else /* Generate Stop condition then Call TxCpltCallback() */
sahilmgandhi	18:6a4db94011d3	3807	{
sahilmgandhi	18:6a4db94011d3	3808	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3809	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3810
sahilmgandhi	18:6a4db94011d3	3811	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3812	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3813
sahilmgandhi	18:6a4db94011d3	3814	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	3815	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3816
sahilmgandhi	18:6a4db94011d3	3817	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3818	{
sahilmgandhi	18:6a4db94011d3	3819	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3820
sahilmgandhi	18:6a4db94011d3	3821	HAL_I2C_MemTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3822	}
sahilmgandhi	18:6a4db94011d3	3823	else
sahilmgandhi	18:6a4db94011d3	3824	{
sahilmgandhi	18:6a4db94011d3	3825	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3826
sahilmgandhi	18:6a4db94011d3	3827	HAL_I2C_MasterTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3828	}
sahilmgandhi	18:6a4db94011d3	3829	}
sahilmgandhi	18:6a4db94011d3	3830	}
sahilmgandhi	18:6a4db94011d3	3831	}
sahilmgandhi	18:6a4db94011d3	3832	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3833	}
sahilmgandhi	18:6a4db94011d3	3834
sahilmgandhi	18:6a4db94011d3	3835	/**
sahilmgandhi	18:6a4db94011d3	3836	* @brief Handle RXNE flag for Master
sahilmgandhi	18:6a4db94011d3	3837	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3838	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3839	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3840	*/
sahilmgandhi	18:6a4db94011d3	3841	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3842	{
sahilmgandhi	18:6a4db94011d3	3843
sahilmgandhi	18:6a4db94011d3	3844	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	3845	{
sahilmgandhi	18:6a4db94011d3	3846	uint32_t tmp = 0U;
sahilmgandhi	18:6a4db94011d3	3847
sahilmgandhi	18:6a4db94011d3	3848	tmp = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	3849	if(tmp > 3U)
sahilmgandhi	18:6a4db94011d3	3850	{
sahilmgandhi	18:6a4db94011d3	3851	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	3852	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	3853	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3854	}
sahilmgandhi	18:6a4db94011d3	3855	else if((tmp == 2U) \|\| (tmp == 3U))
sahilmgandhi	18:6a4db94011d3	3856	{
sahilmgandhi	18:6a4db94011d3	3857	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	3858	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	3859
sahilmgandhi	18:6a4db94011d3	3860	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	3861	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	3862
sahilmgandhi	18:6a4db94011d3	3863	/* Disable BUF interrupt */
sahilmgandhi	18:6a4db94011d3	3864	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
sahilmgandhi	18:6a4db94011d3	3865	}
sahilmgandhi	18:6a4db94011d3	3866	else
sahilmgandhi	18:6a4db94011d3	3867	{
sahilmgandhi	18:6a4db94011d3	3868	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	3869	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	3870
sahilmgandhi	18:6a4db94011d3	3871	if(hi2c->XferOptions == I2C_NEXT_FRAME)
sahilmgandhi	18:6a4db94011d3	3872	{
sahilmgandhi	18:6a4db94011d3	3873	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	3874	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	3875	}
sahilmgandhi	18:6a4db94011d3	3876
sahilmgandhi	18:6a4db94011d3	3877	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3878	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3879
sahilmgandhi	18:6a4db94011d3	3880	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	3881	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	3882	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3883
sahilmgandhi	18:6a4db94011d3	3884	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	3885	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	3886	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3887
sahilmgandhi	18:6a4db94011d3	3888	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3889	{
sahilmgandhi	18:6a4db94011d3	3890	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3891	HAL_I2C_MemRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3892	}
sahilmgandhi	18:6a4db94011d3	3893	else
sahilmgandhi	18:6a4db94011d3	3894	{
sahilmgandhi	18:6a4db94011d3	3895	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3896	HAL_I2C_MasterRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3897	}
sahilmgandhi	18:6a4db94011d3	3898	}
sahilmgandhi	18:6a4db94011d3	3899	}
sahilmgandhi	18:6a4db94011d3	3900	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3901	}
sahilmgandhi	18:6a4db94011d3	3902
sahilmgandhi	18:6a4db94011d3	3903	/**
sahilmgandhi	18:6a4db94011d3	3904	* @brief Handle BTF flag for Master receiver
sahilmgandhi	18:6a4db94011d3	3905	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3906	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3907	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3908	*/
sahilmgandhi	18:6a4db94011d3	3909	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3910	{
sahilmgandhi	18:6a4db94011d3	3911	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	3912	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	3913	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	3914
sahilmgandhi	18:6a4db94011d3	3915	if(hi2c->XferCount == 3U)
sahilmgandhi	18:6a4db94011d3	3916	{
sahilmgandhi	18:6a4db94011d3	3917	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_LAST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	3918	{
sahilmgandhi	18:6a4db94011d3	3919	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	3920	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	3921	}
sahilmgandhi	18:6a4db94011d3	3922
sahilmgandhi	18:6a4db94011d3	3923	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	3924	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	3925	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3926	}
sahilmgandhi	18:6a4db94011d3	3927	else if(hi2c->XferCount == 2U)
sahilmgandhi	18:6a4db94011d3	3928	{
sahilmgandhi	18:6a4db94011d3	3929	/* Prepare next transfer or stop current transfer */
sahilmgandhi	18:6a4db94011d3	3930	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	3931	{
sahilmgandhi	18:6a4db94011d3	3932	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	3933	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	3934
sahilmgandhi	18:6a4db94011d3	3935	if((CurrentXferOptions == I2C_NEXT_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME))
sahilmgandhi	18:6a4db94011d3	3936	{
sahilmgandhi	18:6a4db94011d3	3937	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	3938	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	3939	}
sahilmgandhi	18:6a4db94011d3	3940	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	3941	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	3942	}
sahilmgandhi	18:6a4db94011d3	3943	else
sahilmgandhi	18:6a4db94011d3	3944	{
sahilmgandhi	18:6a4db94011d3	3945	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	3946
sahilmgandhi	18:6a4db94011d3	3947	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3948	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3949	}
sahilmgandhi	18:6a4db94011d3	3950
sahilmgandhi	18:6a4db94011d3	3951	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	3952	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	3953	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3954
sahilmgandhi	18:6a4db94011d3	3955	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	3956	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	3957	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3958
sahilmgandhi	18:6a4db94011d3	3959	/* Disable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3960	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3961
sahilmgandhi	18:6a4db94011d3	3962	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3963	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	3964
sahilmgandhi	18:6a4db94011d3	3965	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3966	{
sahilmgandhi	18:6a4db94011d3	3967	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3968
sahilmgandhi	18:6a4db94011d3	3969	HAL_I2C_MemRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3970	}
sahilmgandhi	18:6a4db94011d3	3971	else
sahilmgandhi	18:6a4db94011d3	3972	{
sahilmgandhi	18:6a4db94011d3	3973	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3974
sahilmgandhi	18:6a4db94011d3	3975	HAL_I2C_MasterRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3976	}
sahilmgandhi	18:6a4db94011d3	3977	}
sahilmgandhi	18:6a4db94011d3	3978	else
sahilmgandhi	18:6a4db94011d3	3979	{
sahilmgandhi	18:6a4db94011d3	3980	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	3981	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	3982	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3983	}
sahilmgandhi	18:6a4db94011d3	3984	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3985	}
sahilmgandhi	18:6a4db94011d3	3986
sahilmgandhi	18:6a4db94011d3	3987	/**
sahilmgandhi	18:6a4db94011d3	3988	* @brief Handle SB flag for Master
sahilmgandhi	18:6a4db94011d3	3989	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3990	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3991	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3992	*/
sahilmgandhi	18:6a4db94011d3	3993
sahilmgandhi	18:6a4db94011d3	3994	static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3995	{
sahilmgandhi	18:6a4db94011d3	3996	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3997	{
sahilmgandhi	18:6a4db94011d3	3998	if(hi2c->EventCount == 0U)
sahilmgandhi	18:6a4db94011d3	3999	{
sahilmgandhi	18:6a4db94011d3	4000	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4001	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4002	}
sahilmgandhi	18:6a4db94011d3	4003	else
sahilmgandhi	18:6a4db94011d3	4004	{
sahilmgandhi	18:6a4db94011d3	4005	hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4006	}
sahilmgandhi	18:6a4db94011d3	4007	}
sahilmgandhi	18:6a4db94011d3	4008	else
sahilmgandhi	18:6a4db94011d3	4009	{
sahilmgandhi	18:6a4db94011d3	4010	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
sahilmgandhi	18:6a4db94011d3	4011	{
sahilmgandhi	18:6a4db94011d3	4012	/* Send slave 7 Bits address */
sahilmgandhi	18:6a4db94011d3	4013	if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	4014	{
sahilmgandhi	18:6a4db94011d3	4015	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4016	}
sahilmgandhi	18:6a4db94011d3	4017	else
sahilmgandhi	18:6a4db94011d3	4018	{
sahilmgandhi	18:6a4db94011d3	4019	hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4020	}
sahilmgandhi	18:6a4db94011d3	4021	}
sahilmgandhi	18:6a4db94011d3	4022	else
sahilmgandhi	18:6a4db94011d3	4023	{
sahilmgandhi	18:6a4db94011d3	4024	if(hi2c->EventCount == 0U)
sahilmgandhi	18:6a4db94011d3	4025	{
sahilmgandhi	18:6a4db94011d3	4026	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4027	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4028	}
sahilmgandhi	18:6a4db94011d3	4029	else if(hi2c->EventCount == 1U)
sahilmgandhi	18:6a4db94011d3	4030	{
sahilmgandhi	18:6a4db94011d3	4031	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4032	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4033	}
sahilmgandhi	18:6a4db94011d3	4034	}
sahilmgandhi	18:6a4db94011d3	4035	}
sahilmgandhi	18:6a4db94011d3	4036
sahilmgandhi	18:6a4db94011d3	4037	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4038	}
sahilmgandhi	18:6a4db94011d3	4039
sahilmgandhi	18:6a4db94011d3	4040	/**
sahilmgandhi	18:6a4db94011d3	4041	* @brief Handle ADD10 flag for Master
sahilmgandhi	18:6a4db94011d3	4042	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4043	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4044	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4045	*/
sahilmgandhi	18:6a4db94011d3	4046	static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4047	{
sahilmgandhi	18:6a4db94011d3	4048	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4049	hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4050
sahilmgandhi	18:6a4db94011d3	4051	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4052	}
sahilmgandhi	18:6a4db94011d3	4053
sahilmgandhi	18:6a4db94011d3	4054	/**
sahilmgandhi	18:6a4db94011d3	4055	* @brief Handle ADDR flag for Master
sahilmgandhi	18:6a4db94011d3	4056	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4057	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4058	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4059	*/
sahilmgandhi	18:6a4db94011d3	4060	static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4061	{
sahilmgandhi	18:6a4db94011d3	4062	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4063	uint32_t CurrentMode = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	4064	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	4065	uint32_t Prev_State = hi2c->PreviousState;
sahilmgandhi	18:6a4db94011d3	4066
sahilmgandhi	18:6a4db94011d3	4067	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	4068	{
sahilmgandhi	18:6a4db94011d3	4069	if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
sahilmgandhi	18:6a4db94011d3	4070	{
sahilmgandhi	18:6a4db94011d3	4071	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4072	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4073	}
sahilmgandhi	18:6a4db94011d3	4074	else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
sahilmgandhi	18:6a4db94011d3	4075	{
sahilmgandhi	18:6a4db94011d3	4076	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4077	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4078
sahilmgandhi	18:6a4db94011d3	4079	/* Generate Restart */
sahilmgandhi	18:6a4db94011d3	4080	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4081
sahilmgandhi	18:6a4db94011d3	4082	hi2c->EventCount++;
sahilmgandhi	18:6a4db94011d3	4083	}
sahilmgandhi	18:6a4db94011d3	4084	else
sahilmgandhi	18:6a4db94011d3	4085	{
sahilmgandhi	18:6a4db94011d3	4086	if(hi2c->XferCount == 0U)
sahilmgandhi	18:6a4db94011d3	4087	{
sahilmgandhi	18:6a4db94011d3	4088	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4089	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4090
sahilmgandhi	18:6a4db94011d3	4091	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4092	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4093	}
sahilmgandhi	18:6a4db94011d3	4094	else if(hi2c->XferCount == 1U)
sahilmgandhi	18:6a4db94011d3	4095	{
sahilmgandhi	18:6a4db94011d3	4096	/* Prepare next transfer or stop current transfer */
sahilmgandhi	18:6a4db94011d3	4097	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
sahilmgandhi	18:6a4db94011d3	4098	&& (Prev_State != I2C_STATE_MASTER_BUSY_RX))
sahilmgandhi	18:6a4db94011d3	4099	{
sahilmgandhi	18:6a4db94011d3	4100	if(hi2c->XferOptions != I2C_NEXT_FRAME)
sahilmgandhi	18:6a4db94011d3	4101	{
sahilmgandhi	18:6a4db94011d3	4102	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4103	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4104	}
sahilmgandhi	18:6a4db94011d3	4105	else
sahilmgandhi	18:6a4db94011d3	4106	{
sahilmgandhi	18:6a4db94011d3	4107	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4108	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4109	}
sahilmgandhi	18:6a4db94011d3	4110
sahilmgandhi	18:6a4db94011d3	4111	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4112	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4113	}
sahilmgandhi	18:6a4db94011d3	4114	else
sahilmgandhi	18:6a4db94011d3	4115	{
sahilmgandhi	18:6a4db94011d3	4116	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4117	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4118
sahilmgandhi	18:6a4db94011d3	4119	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4120	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4121
sahilmgandhi	18:6a4db94011d3	4122	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4123	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4124	}
sahilmgandhi	18:6a4db94011d3	4125	}
sahilmgandhi	18:6a4db94011d3	4126	else if(hi2c->XferCount == 2U)
sahilmgandhi	18:6a4db94011d3	4127	{
sahilmgandhi	18:6a4db94011d3	4128	if(hi2c->XferOptions != I2C_NEXT_FRAME)
sahilmgandhi	18:6a4db94011d3	4129	{
sahilmgandhi	18:6a4db94011d3	4130	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4131	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4132
sahilmgandhi	18:6a4db94011d3	4133	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	4134	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	4135	}
sahilmgandhi	18:6a4db94011d3	4136	else
sahilmgandhi	18:6a4db94011d3	4137	{
sahilmgandhi	18:6a4db94011d3	4138	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4139	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4140	}
sahilmgandhi	18:6a4db94011d3	4141
sahilmgandhi	18:6a4db94011d3	4142	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4143	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4144	}
sahilmgandhi	18:6a4db94011d3	4145	else
sahilmgandhi	18:6a4db94011d3	4146	{
sahilmgandhi	18:6a4db94011d3	4147	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4148	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4149
sahilmgandhi	18:6a4db94011d3	4150	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4151	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4152	}
sahilmgandhi	18:6a4db94011d3	4153
sahilmgandhi	18:6a4db94011d3	4154	/* Reset Event counter */
sahilmgandhi	18:6a4db94011d3	4155	hi2c->EventCount = 0;
sahilmgandhi	18:6a4db94011d3	4156	}
sahilmgandhi	18:6a4db94011d3	4157	}
sahilmgandhi	18:6a4db94011d3	4158	else
sahilmgandhi	18:6a4db94011d3	4159	{
sahilmgandhi	18:6a4db94011d3	4160	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4161	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4162	}
sahilmgandhi	18:6a4db94011d3	4163
sahilmgandhi	18:6a4db94011d3	4164	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4165	}
sahilmgandhi	18:6a4db94011d3	4166
sahilmgandhi	18:6a4db94011d3	4167	/**
sahilmgandhi	18:6a4db94011d3	4168	* @brief Handle TXE flag for Slave
sahilmgandhi	18:6a4db94011d3	4169	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4170	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4171	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4172	*/
sahilmgandhi	18:6a4db94011d3	4173	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4174	{
sahilmgandhi	18:6a4db94011d3	4175	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4176	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	4177	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4178
sahilmgandhi	18:6a4db94011d3	4179	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	4180	{
sahilmgandhi	18:6a4db94011d3	4181	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	4182	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	4183	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4184
sahilmgandhi	18:6a4db94011d3	4185	if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4186	{
sahilmgandhi	18:6a4db94011d3	4187	/* Last Byte is received, disable Interrupt */
sahilmgandhi	18:6a4db94011d3	4188	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
sahilmgandhi	18:6a4db94011d3	4189
sahilmgandhi	18:6a4db94011d3	4190	/* Set state at HAL_I2C_STATE_LISTEN */
sahilmgandhi	18:6a4db94011d3	4191	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	4192	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	4193	hi2c->State = HAL_I2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	4194
sahilmgandhi	18:6a4db94011d3	4195	/* Call the Tx complete callback to inform upper layer of the end of receive process */
sahilmgandhi	18:6a4db94011d3	4196	HAL_I2C_SlaveTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4197	}
sahilmgandhi	18:6a4db94011d3	4198	}
sahilmgandhi	18:6a4db94011d3	4199	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4200	}
sahilmgandhi	18:6a4db94011d3	4201
sahilmgandhi	18:6a4db94011d3	4202	/**
sahilmgandhi	18:6a4db94011d3	4203	* @brief Handle BTF flag for Slave transmitter
sahilmgandhi	18:6a4db94011d3	4204	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4205	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4206	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4207	*/
sahilmgandhi	18:6a4db94011d3	4208	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4209	{
sahilmgandhi	18:6a4db94011d3	4210	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	4211	{
sahilmgandhi	18:6a4db94011d3	4212	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	4213	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	4214	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4215	}
sahilmgandhi	18:6a4db94011d3	4216	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4217	}
sahilmgandhi	18:6a4db94011d3	4218
sahilmgandhi	18:6a4db94011d3	4219	/**
sahilmgandhi	18:6a4db94011d3	4220	* @brief Handle RXNE flag for Slave
sahilmgandhi	18:6a4db94011d3	4221	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4222	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4223	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4224	*/
sahilmgandhi	18:6a4db94011d3	4225	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4226	{
sahilmgandhi	18:6a4db94011d3	4227	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4228	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	4229	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4230
sahilmgandhi	18:6a4db94011d3	4231	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	4232	{
sahilmgandhi	18:6a4db94011d3	4233	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4234	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4235	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4236
sahilmgandhi	18:6a4db94011d3	4237	if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4238	{
sahilmgandhi	18:6a4db94011d3	4239	/* Last Byte is received, disable Interrupt */
sahilmgandhi	18:6a4db94011d3	4240	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
sahilmgandhi	18:6a4db94011d3	4241
sahilmgandhi	18:6a4db94011d3	4242	/* Set state at HAL_I2C_STATE_LISTEN */
sahilmgandhi	18:6a4db94011d3	4243	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	4244	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	4245	hi2c->State = HAL_I2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	4246
sahilmgandhi	18:6a4db94011d3	4247	/* Call the Rx complete callback to inform upper layer of the end of receive process */
sahilmgandhi	18:6a4db94011d3	4248	HAL_I2C_SlaveRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4249	}
sahilmgandhi	18:6a4db94011d3	4250	}
sahilmgandhi	18:6a4db94011d3	4251	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4252	}
sahilmgandhi	18:6a4db94011d3	4253
sahilmgandhi	18:6a4db94011d3	4254	/**
sahilmgandhi	18:6a4db94011d3	4255	* @brief Handle BTF flag for Slave receiver
sahilmgandhi	18:6a4db94011d3	4256	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4257	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4258	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4259	*/
sahilmgandhi	18:6a4db94011d3	4260	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4261	{
sahilmgandhi	18:6a4db94011d3	4262	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	4263	{
sahilmgandhi	18:6a4db94011d3	4264	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4265	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4266	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4267	}
sahilmgandhi	18:6a4db94011d3	4268	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4269	}
sahilmgandhi	18:6a4db94011d3	4270
sahilmgandhi	18:6a4db94011d3	4271	/**
sahilmgandhi	18:6a4db94011d3	4272	* @brief Handle ADD flag for Slave
sahilmgandhi	18:6a4db94011d3	4273	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4274	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4275	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4276	*/
sahilmgandhi	18:6a4db94011d3	4277	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4278	{
sahilmgandhi	18:6a4db94011d3	4279	uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
sahilmgandhi	18:6a4db94011d3	4280	uint16_t SlaveAddrCode = 0U;
sahilmgandhi	18:6a4db94011d3	4281
sahilmgandhi	18:6a4db94011d3	4282	/* Transfer Direction requested by Master */
sahilmgandhi	18:6a4db94011d3	4283	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
sahilmgandhi	18:6a4db94011d3	4284	{
sahilmgandhi	18:6a4db94011d3	4285	TransferDirection = I2C_DIRECTION_TRANSMIT;
sahilmgandhi	18:6a4db94011d3	4286	}
sahilmgandhi	18:6a4db94011d3	4287
sahilmgandhi	18:6a4db94011d3	4288	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
sahilmgandhi	18:6a4db94011d3	4289	{
sahilmgandhi	18:6a4db94011d3	4290	SlaveAddrCode = hi2c->Init.OwnAddress1;
sahilmgandhi	18:6a4db94011d3	4291	}
sahilmgandhi	18:6a4db94011d3	4292	else
sahilmgandhi	18:6a4db94011d3	4293	{
sahilmgandhi	18:6a4db94011d3	4294	SlaveAddrCode = hi2c->Init.OwnAddress2;
sahilmgandhi	18:6a4db94011d3	4295	}
sahilmgandhi	18:6a4db94011d3	4296
sahilmgandhi	18:6a4db94011d3	4297	/* Call Slave Addr callback */
sahilmgandhi	18:6a4db94011d3	4298	HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
sahilmgandhi	18:6a4db94011d3	4299
sahilmgandhi	18:6a4db94011d3	4300	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4301	}
sahilmgandhi	18:6a4db94011d3	4302
sahilmgandhi	18:6a4db94011d3	4303	/**
sahilmgandhi	18:6a4db94011d3	4304	* @brief Handle STOPF flag for Slave
sahilmgandhi	18:6a4db94011d3	4305	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4306	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4307	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4308	*/
sahilmgandhi	18:6a4db94011d3	4309	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4310	{
sahilmgandhi	18:6a4db94011d3	4311	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4312	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4313
sahilmgandhi	18:6a4db94011d3	4314	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	4315	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	4316
sahilmgandhi	18:6a4db94011d3	4317	/* Clear STOPF flag */
sahilmgandhi	18:6a4db94011d3	4318	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4319
sahilmgandhi	18:6a4db94011d3	4320	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4321	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4322
sahilmgandhi	18:6a4db94011d3	4323	if((CurrentState == HAL_I2C_STATE_LISTEN ) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) \|\| \
sahilmgandhi	18:6a4db94011d3	4324	(CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4325	{
sahilmgandhi	18:6a4db94011d3	4326	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4327	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4328	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4329	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4330
sahilmgandhi	18:6a4db94011d3	4331	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
sahilmgandhi	18:6a4db94011d3	4332	HAL_I2C_ListenCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4333	}
sahilmgandhi	18:6a4db94011d3	4334	else
sahilmgandhi	18:6a4db94011d3	4335	{
sahilmgandhi	18:6a4db94011d3	4336	if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX))
sahilmgandhi	18:6a4db94011d3	4337	{
sahilmgandhi	18:6a4db94011d3	4338	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4339	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4340	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4341
sahilmgandhi	18:6a4db94011d3	4342	HAL_I2C_SlaveRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4343	}
sahilmgandhi	18:6a4db94011d3	4344	}
sahilmgandhi	18:6a4db94011d3	4345
sahilmgandhi	18:6a4db94011d3	4346	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4347	}
sahilmgandhi	18:6a4db94011d3	4348
sahilmgandhi	18:6a4db94011d3	4349	/**
sahilmgandhi	18:6a4db94011d3	4350	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4351	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4352	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4353	*/
sahilmgandhi	18:6a4db94011d3	4354	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4355	{
sahilmgandhi	18:6a4db94011d3	4356	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4357	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4358	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	4359	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	4360
sahilmgandhi	18:6a4db94011d3	4361	if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_LAST_FRAME)) && \
sahilmgandhi	18:6a4db94011d3	4362	(CurrentState == HAL_I2C_STATE_LISTEN))
sahilmgandhi	18:6a4db94011d3	4363	{
sahilmgandhi	18:6a4db94011d3	4364	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4365
sahilmgandhi	18:6a4db94011d3	4366	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	4367	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	4368
sahilmgandhi	18:6a4db94011d3	4369	/* Clear AF flag */
sahilmgandhi	18:6a4db94011d3	4370	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	4371
sahilmgandhi	18:6a4db94011d3	4372	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4373	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4374
sahilmgandhi	18:6a4db94011d3	4375	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4376	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4377	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4378
sahilmgandhi	18:6a4db94011d3	4379	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
sahilmgandhi	18:6a4db94011d3	4380	HAL_I2C_ListenCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4381	}
sahilmgandhi	18:6a4db94011d3	4382	else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	4383	{
sahilmgandhi	18:6a4db94011d3	4384	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4385	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	4386	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	4387	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4388	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4389
sahilmgandhi	18:6a4db94011d3	4390	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	4391	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	4392
sahilmgandhi	18:6a4db94011d3	4393	/* Clear AF flag */
sahilmgandhi	18:6a4db94011d3	4394	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	4395
sahilmgandhi	18:6a4db94011d3	4396	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4397	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4398
sahilmgandhi	18:6a4db94011d3	4399	HAL_I2C_SlaveTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4400	}
sahilmgandhi	18:6a4db94011d3	4401	else
sahilmgandhi	18:6a4db94011d3	4402	{
sahilmgandhi	18:6a4db94011d3	4403	/* Clear AF flag only */
sahilmgandhi	18:6a4db94011d3	4404	/* State Listen, but XferOptions == FIRST or NEXT */
sahilmgandhi	18:6a4db94011d3	4405	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	4406	}
sahilmgandhi	18:6a4db94011d3	4407
sahilmgandhi	18:6a4db94011d3	4408	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4409	}
sahilmgandhi	18:6a4db94011d3	4410
sahilmgandhi	18:6a4db94011d3	4411	/**
sahilmgandhi	18:6a4db94011d3	4412	* @brief I2C interrupts error process
sahilmgandhi	18:6a4db94011d3	4413	* @param hi2c I2C handle.
sahilmgandhi	18:6a4db94011d3	4414	* @retval None
sahilmgandhi	18:6a4db94011d3	4415	*/
sahilmgandhi	18:6a4db94011d3	4416	static void I2C_ITError(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4417	{
sahilmgandhi	18:6a4db94011d3	4418	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4419	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4420
sahilmgandhi	18:6a4db94011d3	4421	if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4422	{
sahilmgandhi	18:6a4db94011d3	4423	/* keep HAL_I2C_STATE_LISTEN */
sahilmgandhi	18:6a4db94011d3	4424	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4425	hi2c->State = HAL_I2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	4426	}
sahilmgandhi	18:6a4db94011d3	4427	else
sahilmgandhi	18:6a4db94011d3	4428	{
sahilmgandhi	18:6a4db94011d3	4429	/* If state is an abort treatment on going, don't change state */
sahilmgandhi	18:6a4db94011d3	4430	/* This change will be do later */
sahilmgandhi	18:6a4db94011d3	4431	if(hi2c->State != HAL_I2C_STATE_ABORT)
sahilmgandhi	18:6a4db94011d3	4432	{
sahilmgandhi	18:6a4db94011d3	4433	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4434	}
sahilmgandhi	18:6a4db94011d3	4435	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4436	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4437	}
sahilmgandhi	18:6a4db94011d3	4438
sahilmgandhi	18:6a4db94011d3	4439	/* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
sahilmgandhi	18:6a4db94011d3	4440	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	4441
sahilmgandhi	18:6a4db94011d3	4442	/* Abort DMA transfer */
sahilmgandhi	18:6a4db94011d3	4443	if((hi2c->Instance->CR1 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
sahilmgandhi	18:6a4db94011d3	4444	{
sahilmgandhi	18:6a4db94011d3	4445	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	4446
sahilmgandhi	18:6a4db94011d3	4447	if(hi2c->hdmatx != NULL)
sahilmgandhi	18:6a4db94011d3	4448	{
sahilmgandhi	18:6a4db94011d3	4449	/* Set the DMA Abort callback :
sahilmgandhi	18:6a4db94011d3	4450	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
sahilmgandhi	18:6a4db94011d3	4451	hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
sahilmgandhi	18:6a4db94011d3	4452
sahilmgandhi	18:6a4db94011d3	4453	if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4454	{
sahilmgandhi	18:6a4db94011d3	4455	/* Call Directly XferAbortCallback function in case of error */
sahilmgandhi	18:6a4db94011d3	4456	hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
sahilmgandhi	18:6a4db94011d3	4457	}
sahilmgandhi	18:6a4db94011d3	4458	}
sahilmgandhi	18:6a4db94011d3	4459	else if(hi2c->hdmarx != NULL)
sahilmgandhi	18:6a4db94011d3	4460	{
sahilmgandhi	18:6a4db94011d3	4461	/* Set the DMA Abort callback :
sahilmgandhi	18:6a4db94011d3	4462	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
sahilmgandhi	18:6a4db94011d3	4463	hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
sahilmgandhi	18:6a4db94011d3	4464
sahilmgandhi	18:6a4db94011d3	4465	if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4466	{
sahilmgandhi	18:6a4db94011d3	4467	/* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
sahilmgandhi	18:6a4db94011d3	4468	hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
sahilmgandhi	18:6a4db94011d3	4469	}
sahilmgandhi	18:6a4db94011d3	4470	}
sahilmgandhi	18:6a4db94011d3	4471	}
sahilmgandhi	18:6a4db94011d3	4472	else if(hi2c->State == HAL_I2C_STATE_ABORT)
sahilmgandhi	18:6a4db94011d3	4473	{
sahilmgandhi	18:6a4db94011d3	4474	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4475
sahilmgandhi	18:6a4db94011d3	4476	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4477	HAL_I2C_AbortCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4478	}
sahilmgandhi	18:6a4db94011d3	4479	else
sahilmgandhi	18:6a4db94011d3	4480	{
sahilmgandhi	18:6a4db94011d3	4481	/* Call user error callback */
sahilmgandhi	18:6a4db94011d3	4482	HAL_I2C_ErrorCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4483	}
sahilmgandhi	18:6a4db94011d3	4484	/* STOP Flag is not set after a NACK reception */
sahilmgandhi	18:6a4db94011d3	4485	/* So may inform upper layer that listen phase is stopped */
sahilmgandhi	18:6a4db94011d3	4486	/* during NACK error treatment */
sahilmgandhi	18:6a4db94011d3	4487	if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
sahilmgandhi	18:6a4db94011d3	4488	{
sahilmgandhi	18:6a4db94011d3	4489	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4490	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4491	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4492	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4493
sahilmgandhi	18:6a4db94011d3	4494	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
sahilmgandhi	18:6a4db94011d3	4495	HAL_I2C_ListenCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4496	}
sahilmgandhi	18:6a4db94011d3	4497	}
sahilmgandhi	18:6a4db94011d3	4498
sahilmgandhi	18:6a4db94011d3	4499	/**
sahilmgandhi	18:6a4db94011d3	4500	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4501	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4502	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	4503	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	4504	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4505	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4506	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4507	*/
sahilmgandhi	18:6a4db94011d3	4508	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4509	{
sahilmgandhi	18:6a4db94011d3	4510	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4511	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	4512
sahilmgandhi	18:6a4db94011d3	4513	/* Generate Start condition if first transfer */
sahilmgandhi	18:6a4db94011d3	4514	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	4515	{
sahilmgandhi	18:6a4db94011d3	4516	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	4517	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4518	}
sahilmgandhi	18:6a4db94011d3	4519	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	4520	{
sahilmgandhi	18:6a4db94011d3	4521	/* Generate ReStart */
sahilmgandhi	18:6a4db94011d3	4522	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4523	}
sahilmgandhi	18:6a4db94011d3	4524
sahilmgandhi	18:6a4db94011d3	4525	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4526	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4527	{
sahilmgandhi	18:6a4db94011d3	4528	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4529	}
sahilmgandhi	18:6a4db94011d3	4530
sahilmgandhi	18:6a4db94011d3	4531	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
sahilmgandhi	18:6a4db94011d3	4532	{
sahilmgandhi	18:6a4db94011d3	4533	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4534	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4535	}
sahilmgandhi	18:6a4db94011d3	4536	else
sahilmgandhi	18:6a4db94011d3	4537	{
sahilmgandhi	18:6a4db94011d3	4538	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4539	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4540
sahilmgandhi	18:6a4db94011d3	4541	/* Wait until ADD10 flag is set */
sahilmgandhi	18:6a4db94011d3	4542	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4543	{
sahilmgandhi	18:6a4db94011d3	4544	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4545	{
sahilmgandhi	18:6a4db94011d3	4546	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4547	}
sahilmgandhi	18:6a4db94011d3	4548	else
sahilmgandhi	18:6a4db94011d3	4549	{
sahilmgandhi	18:6a4db94011d3	4550	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4551	}
sahilmgandhi	18:6a4db94011d3	4552	}
sahilmgandhi	18:6a4db94011d3	4553
sahilmgandhi	18:6a4db94011d3	4554	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4555	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
sahilmgandhi	18:6a4db94011d3	4556	}
sahilmgandhi	18:6a4db94011d3	4557
sahilmgandhi	18:6a4db94011d3	4558	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4559	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4560	{
sahilmgandhi	18:6a4db94011d3	4561	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4562	{
sahilmgandhi	18:6a4db94011d3	4563	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4564	}
sahilmgandhi	18:6a4db94011d3	4565	else
sahilmgandhi	18:6a4db94011d3	4566	{
sahilmgandhi	18:6a4db94011d3	4567	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4568	}
sahilmgandhi	18:6a4db94011d3	4569	}
sahilmgandhi	18:6a4db94011d3	4570
sahilmgandhi	18:6a4db94011d3	4571	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4572	}
sahilmgandhi	18:6a4db94011d3	4573
sahilmgandhi	18:6a4db94011d3	4574	/**
sahilmgandhi	18:6a4db94011d3	4575	* @brief Master sends target device address for read request.
sahilmgandhi	18:6a4db94011d3	4576	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4577	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4578	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	4579	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	4580	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4581	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4582	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4583	*/
sahilmgandhi	18:6a4db94011d3	4584	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4585	{
sahilmgandhi	18:6a4db94011d3	4586	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4587	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	4588
sahilmgandhi	18:6a4db94011d3	4589	/* Generate Start condition if first transfer */
sahilmgandhi	18:6a4db94011d3	4590	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	4591	{
sahilmgandhi	18:6a4db94011d3	4592	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4593	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4594
sahilmgandhi	18:6a4db94011d3	4595	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	4596	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4597	}
sahilmgandhi	18:6a4db94011d3	4598	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	4599	{
sahilmgandhi	18:6a4db94011d3	4600	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4601	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4602
sahilmgandhi	18:6a4db94011d3	4603	/* Generate ReStart */
sahilmgandhi	18:6a4db94011d3	4604	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4605	}
sahilmgandhi	18:6a4db94011d3	4606
sahilmgandhi	18:6a4db94011d3	4607	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4608	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4609	{
sahilmgandhi	18:6a4db94011d3	4610	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4611	}
sahilmgandhi	18:6a4db94011d3	4612
sahilmgandhi	18:6a4db94011d3	4613	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
sahilmgandhi	18:6a4db94011d3	4614	{
sahilmgandhi	18:6a4db94011d3	4615	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4616	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
sahilmgandhi	18:6a4db94011d3	4617	}
sahilmgandhi	18:6a4db94011d3	4618	else
sahilmgandhi	18:6a4db94011d3	4619	{
sahilmgandhi	18:6a4db94011d3	4620	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4621	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4622
sahilmgandhi	18:6a4db94011d3	4623	/* Wait until ADD10 flag is set */
sahilmgandhi	18:6a4db94011d3	4624	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4625	{
sahilmgandhi	18:6a4db94011d3	4626	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4627	{
sahilmgandhi	18:6a4db94011d3	4628	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4629	}
sahilmgandhi	18:6a4db94011d3	4630	else
sahilmgandhi	18:6a4db94011d3	4631	{
sahilmgandhi	18:6a4db94011d3	4632	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4633	}
sahilmgandhi	18:6a4db94011d3	4634	}
sahilmgandhi	18:6a4db94011d3	4635
sahilmgandhi	18:6a4db94011d3	4636	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4637	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
sahilmgandhi	18:6a4db94011d3	4638
sahilmgandhi	18:6a4db94011d3	4639	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4640	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4641	{
sahilmgandhi	18:6a4db94011d3	4642	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4643	{
sahilmgandhi	18:6a4db94011d3	4644	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4645	}
sahilmgandhi	18:6a4db94011d3	4646	else
sahilmgandhi	18:6a4db94011d3	4647	{
sahilmgandhi	18:6a4db94011d3	4648	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4649	}
sahilmgandhi	18:6a4db94011d3	4650	}
sahilmgandhi	18:6a4db94011d3	4651
sahilmgandhi	18:6a4db94011d3	4652	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4653	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4654
sahilmgandhi	18:6a4db94011d3	4655	/* Generate Restart */
sahilmgandhi	18:6a4db94011d3	4656	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4657
sahilmgandhi	18:6a4db94011d3	4658	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4659	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4660	{
sahilmgandhi	18:6a4db94011d3	4661	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4662	}
sahilmgandhi	18:6a4db94011d3	4663
sahilmgandhi	18:6a4db94011d3	4664	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4665	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
sahilmgandhi	18:6a4db94011d3	4666	}
sahilmgandhi	18:6a4db94011d3	4667
sahilmgandhi	18:6a4db94011d3	4668	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4669	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4670	{
sahilmgandhi	18:6a4db94011d3	4671	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4672	{
sahilmgandhi	18:6a4db94011d3	4673	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4674	}
sahilmgandhi	18:6a4db94011d3	4675	else
sahilmgandhi	18:6a4db94011d3	4676	{
sahilmgandhi	18:6a4db94011d3	4677	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4678	}
sahilmgandhi	18:6a4db94011d3	4679	}
sahilmgandhi	18:6a4db94011d3	4680
sahilmgandhi	18:6a4db94011d3	4681	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4682	}
sahilmgandhi	18:6a4db94011d3	4683
sahilmgandhi	18:6a4db94011d3	4684	/**
sahilmgandhi	18:6a4db94011d3	4685	* @brief Master sends target device address followed by internal memory address for write request.
sahilmgandhi	18:6a4db94011d3	4686	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4687	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4688	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	4689	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	4690	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	4691	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4692	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4693	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4694	*/
sahilmgandhi	18:6a4db94011d3	4695	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4696	{
sahilmgandhi	18:6a4db94011d3	4697	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	4698	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4699
sahilmgandhi	18:6a4db94011d3	4700	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4701	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4702	{
sahilmgandhi	18:6a4db94011d3	4703	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4704	}
sahilmgandhi	18:6a4db94011d3	4705
sahilmgandhi	18:6a4db94011d3	4706	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4707	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4708
sahilmgandhi	18:6a4db94011d3	4709	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4710	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4711	{
sahilmgandhi	18:6a4db94011d3	4712	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4713	{
sahilmgandhi	18:6a4db94011d3	4714	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4715	}
sahilmgandhi	18:6a4db94011d3	4716	else
sahilmgandhi	18:6a4db94011d3	4717	{
sahilmgandhi	18:6a4db94011d3	4718	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4719	}
sahilmgandhi	18:6a4db94011d3	4720	}
sahilmgandhi	18:6a4db94011d3	4721
sahilmgandhi	18:6a4db94011d3	4722	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4723	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4724
sahilmgandhi	18:6a4db94011d3	4725	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	4726	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4727	{
sahilmgandhi	18:6a4db94011d3	4728	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4729	{
sahilmgandhi	18:6a4db94011d3	4730	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4731	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4732	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4733	}
sahilmgandhi	18:6a4db94011d3	4734	else
sahilmgandhi	18:6a4db94011d3	4735	{
sahilmgandhi	18:6a4db94011d3	4736	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4737	}
sahilmgandhi	18:6a4db94011d3	4738	}
sahilmgandhi	18:6a4db94011d3	4739
sahilmgandhi	18:6a4db94011d3	4740	/* If Memory address size is 8Bit */
sahilmgandhi	18:6a4db94011d3	4741	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
sahilmgandhi	18:6a4db94011d3	4742	{
sahilmgandhi	18:6a4db94011d3	4743	/* Send Memory Address */
sahilmgandhi	18:6a4db94011d3	4744	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	4745	}
sahilmgandhi	18:6a4db94011d3	4746	/* If Memory address size is 16Bit */
sahilmgandhi	18:6a4db94011d3	4747	else
sahilmgandhi	18:6a4db94011d3	4748	{
sahilmgandhi	18:6a4db94011d3	4749	/* Send MSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	4750	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	4751
sahilmgandhi	18:6a4db94011d3	4752	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	4753	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4754	{
sahilmgandhi	18:6a4db94011d3	4755	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4756	{
sahilmgandhi	18:6a4db94011d3	4757	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4758	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4759	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4760	}
sahilmgandhi	18:6a4db94011d3	4761	else
sahilmgandhi	18:6a4db94011d3	4762	{
sahilmgandhi	18:6a4db94011d3	4763	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4764	}
sahilmgandhi	18:6a4db94011d3	4765	}
sahilmgandhi	18:6a4db94011d3	4766
sahilmgandhi	18:6a4db94011d3	4767	/* Send LSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	4768	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	4769	}
sahilmgandhi	18:6a4db94011d3	4770
sahilmgandhi	18:6a4db94011d3	4771	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4772	}
sahilmgandhi	18:6a4db94011d3	4773
sahilmgandhi	18:6a4db94011d3	4774	/**
sahilmgandhi	18:6a4db94011d3	4775	* @brief Master sends target device address followed by internal memory address for read request.
sahilmgandhi	18:6a4db94011d3	4776	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4777	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4778	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	4779	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	4780	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	4781	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4782	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4783	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4784	*/
sahilmgandhi	18:6a4db94011d3	4785	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4786	{
sahilmgandhi	18:6a4db94011d3	4787	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4788	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4789
sahilmgandhi	18:6a4db94011d3	4790	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	4791	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4792
sahilmgandhi	18:6a4db94011d3	4793	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4794	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4795	{
sahilmgandhi	18:6a4db94011d3	4796	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4797	}
sahilmgandhi	18:6a4db94011d3	4798
sahilmgandhi	18:6a4db94011d3	4799	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4800	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4801
sahilmgandhi	18:6a4db94011d3	4802	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4803	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4804	{
sahilmgandhi	18:6a4db94011d3	4805	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4806	{
sahilmgandhi	18:6a4db94011d3	4807	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4808	}
sahilmgandhi	18:6a4db94011d3	4809	else
sahilmgandhi	18:6a4db94011d3	4810	{
sahilmgandhi	18:6a4db94011d3	4811	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4812	}
sahilmgandhi	18:6a4db94011d3	4813	}
sahilmgandhi	18:6a4db94011d3	4814
sahilmgandhi	18:6a4db94011d3	4815	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4816	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4817
sahilmgandhi	18:6a4db94011d3	4818	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	4819	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4820	{
sahilmgandhi	18:6a4db94011d3	4821	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4822	{
sahilmgandhi	18:6a4db94011d3	4823	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4824	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4825	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4826	}
sahilmgandhi	18:6a4db94011d3	4827	else
sahilmgandhi	18:6a4db94011d3	4828	{
sahilmgandhi	18:6a4db94011d3	4829	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4830	}
sahilmgandhi	18:6a4db94011d3	4831	}
sahilmgandhi	18:6a4db94011d3	4832
sahilmgandhi	18:6a4db94011d3	4833	/* If Memory address size is 8Bit */
sahilmgandhi	18:6a4db94011d3	4834	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
sahilmgandhi	18:6a4db94011d3	4835	{
sahilmgandhi	18:6a4db94011d3	4836	/* Send Memory Address */
sahilmgandhi	18:6a4db94011d3	4837	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	4838	}
sahilmgandhi	18:6a4db94011d3	4839	/* If Memory address size is 16Bit */
sahilmgandhi	18:6a4db94011d3	4840	else
sahilmgandhi	18:6a4db94011d3	4841	{
sahilmgandhi	18:6a4db94011d3	4842	/* Send MSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	4843	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	4844
sahilmgandhi	18:6a4db94011d3	4845	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	4846	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4847	{
sahilmgandhi	18:6a4db94011d3	4848	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4849	{
sahilmgandhi	18:6a4db94011d3	4850	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4851	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4852	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4853	}
sahilmgandhi	18:6a4db94011d3	4854	else
sahilmgandhi	18:6a4db94011d3	4855	{
sahilmgandhi	18:6a4db94011d3	4856	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4857	}
sahilmgandhi	18:6a4db94011d3	4858	}
sahilmgandhi	18:6a4db94011d3	4859
sahilmgandhi	18:6a4db94011d3	4860	/* Send LSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	4861	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	4862	}
sahilmgandhi	18:6a4db94011d3	4863
sahilmgandhi	18:6a4db94011d3	4864	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	4865	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4866	{
sahilmgandhi	18:6a4db94011d3	4867	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4868	{
sahilmgandhi	18:6a4db94011d3	4869	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4870	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4871	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4872	}
sahilmgandhi	18:6a4db94011d3	4873	else
sahilmgandhi	18:6a4db94011d3	4874	{
sahilmgandhi	18:6a4db94011d3	4875	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4876	}
sahilmgandhi	18:6a4db94011d3	4877	}
sahilmgandhi	18:6a4db94011d3	4878
sahilmgandhi	18:6a4db94011d3	4879	/* Generate Restart */
sahilmgandhi	18:6a4db94011d3	4880	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4881
sahilmgandhi	18:6a4db94011d3	4882	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4883	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4884	{
sahilmgandhi	18:6a4db94011d3	4885	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4886	}
sahilmgandhi	18:6a4db94011d3	4887
sahilmgandhi	18:6a4db94011d3	4888	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4889	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
sahilmgandhi	18:6a4db94011d3	4890
sahilmgandhi	18:6a4db94011d3	4891	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4892	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4893	{
sahilmgandhi	18:6a4db94011d3	4894	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4895	{
sahilmgandhi	18:6a4db94011d3	4896	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4897	}
sahilmgandhi	18:6a4db94011d3	4898	else
sahilmgandhi	18:6a4db94011d3	4899	{
sahilmgandhi	18:6a4db94011d3	4900	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4901	}
sahilmgandhi	18:6a4db94011d3	4902	}
sahilmgandhi	18:6a4db94011d3	4903
sahilmgandhi	18:6a4db94011d3	4904	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4905	}
sahilmgandhi	18:6a4db94011d3	4906
sahilmgandhi	18:6a4db94011d3	4907	/**
sahilmgandhi	18:6a4db94011d3	4908	* @brief DMA I2C process complete callback.
sahilmgandhi	18:6a4db94011d3	4909	* @param hdma DMA handle
sahilmgandhi	18:6a4db94011d3	4910	* @retval None
sahilmgandhi	18:6a4db94011d3	4911	*/
sahilmgandhi	18:6a4db94011d3	4912	static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	4913	{
sahilmgandhi	18:6a4db94011d3	4914	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	4915
sahilmgandhi	18:6a4db94011d3	4916	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4917	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4918	uint32_t CurrentMode = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	4919
sahilmgandhi	18:6a4db94011d3	4920	if((CurrentState == HAL_I2C_STATE_BUSY_TX) \|\| ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
sahilmgandhi	18:6a4db94011d3	4921	{
sahilmgandhi	18:6a4db94011d3	4922	/* Disable DMA Request */
sahilmgandhi	18:6a4db94011d3	4923	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	4924
sahilmgandhi	18:6a4db94011d3	4925	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	4926
sahilmgandhi	18:6a4db94011d3	4927	/* Enable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	4928	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	4929	}
sahilmgandhi	18:6a4db94011d3	4930	else
sahilmgandhi	18:6a4db94011d3	4931	{
sahilmgandhi	18:6a4db94011d3	4932	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4933	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4934
sahilmgandhi	18:6a4db94011d3	4935	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4936	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4937
sahilmgandhi	18:6a4db94011d3	4938	/* Disable Last DMA */
sahilmgandhi	18:6a4db94011d3	4939	hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
sahilmgandhi	18:6a4db94011d3	4940
sahilmgandhi	18:6a4db94011d3	4941	/* Disable DMA Request */
sahilmgandhi	18:6a4db94011d3	4942	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	4943
sahilmgandhi	18:6a4db94011d3	4944	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	4945
sahilmgandhi	18:6a4db94011d3	4946	/* Check if Errors has been detected during transfer */
sahilmgandhi	18:6a4db94011d3	4947	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
sahilmgandhi	18:6a4db94011d3	4948	{
sahilmgandhi	18:6a4db94011d3	4949	HAL_I2C_ErrorCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4950	}
sahilmgandhi	18:6a4db94011d3	4951	else
sahilmgandhi	18:6a4db94011d3	4952	{
sahilmgandhi	18:6a4db94011d3	4953	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4954
sahilmgandhi	18:6a4db94011d3	4955	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	4956	{
sahilmgandhi	18:6a4db94011d3	4957	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4958
sahilmgandhi	18:6a4db94011d3	4959	HAL_I2C_MemRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4960	}
sahilmgandhi	18:6a4db94011d3	4961	else
sahilmgandhi	18:6a4db94011d3	4962	{
sahilmgandhi	18:6a4db94011d3	4963	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4964
sahilmgandhi	18:6a4db94011d3	4965	HAL_I2C_MasterRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4966	}
sahilmgandhi	18:6a4db94011d3	4967	}
sahilmgandhi	18:6a4db94011d3	4968	}
sahilmgandhi	18:6a4db94011d3	4969	}
sahilmgandhi	18:6a4db94011d3	4970
sahilmgandhi	18:6a4db94011d3	4971	/**
sahilmgandhi	18:6a4db94011d3	4972	* @brief DMA I2C communication error callback.
sahilmgandhi	18:6a4db94011d3	4973	* @param hdma DMA handle
sahilmgandhi	18:6a4db94011d3	4974	* @retval None
sahilmgandhi	18:6a4db94011d3	4975	*/
sahilmgandhi	18:6a4db94011d3	4976	static void I2C_DMAError(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	4977	{
sahilmgandhi	18:6a4db94011d3	4978	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	4979
sahilmgandhi	18:6a4db94011d3	4980	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4981	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4982
sahilmgandhi	18:6a4db94011d3	4983	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	4984
sahilmgandhi	18:6a4db94011d3	4985	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4986	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4987
sahilmgandhi	18:6a4db94011d3	4988	hi2c->ErrorCode \|= HAL_I2C_ERROR_DMA;
sahilmgandhi	18:6a4db94011d3	4989
sahilmgandhi	18:6a4db94011d3	4990	HAL_I2C_ErrorCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4991	}
sahilmgandhi	18:6a4db94011d3	4992
sahilmgandhi	18:6a4db94011d3	4993	/**
sahilmgandhi	18:6a4db94011d3	4994	* @brief DMA I2C communication abort callback
sahilmgandhi	18:6a4db94011d3	4995	* (To be called at end of DMA Abort procedure).
sahilmgandhi	18:6a4db94011d3	4996	* @param hdma: DMA handle.
sahilmgandhi	18:6a4db94011d3	4997	* @retval None
sahilmgandhi	18:6a4db94011d3	4998	*/
sahilmgandhi	18:6a4db94011d3	4999	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	5000	{
sahilmgandhi	18:6a4db94011d3	5001	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	5002
sahilmgandhi	18:6a4db94011d3	5003	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	5004	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	5005
sahilmgandhi	18:6a4db94011d3	5006	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	5007
sahilmgandhi	18:6a4db94011d3	5008	/* Reset XferAbortCallback */
sahilmgandhi	18:6a4db94011d3	5009	hi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	5010	hi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	5011
sahilmgandhi	18:6a4db94011d3	5012	/* Check if come from abort from user */
sahilmgandhi	18:6a4db94011d3	5013	if(hi2c->State == HAL_I2C_STATE_ABORT)
sahilmgandhi	18:6a4db94011d3	5014	{
sahilmgandhi	18:6a4db94011d3	5015	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5016	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	5017
sahilmgandhi	18:6a4db94011d3	5018	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	5019	HAL_I2C_AbortCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	5020	}
sahilmgandhi	18:6a4db94011d3	5021	else
sahilmgandhi	18:6a4db94011d3	5022	{
sahilmgandhi	18:6a4db94011d3	5023	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5024	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	5025
sahilmgandhi	18:6a4db94011d3	5026	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	5027	HAL_I2C_ErrorCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	5028	}
sahilmgandhi	18:6a4db94011d3	5029	}
sahilmgandhi	18:6a4db94011d3	5030
sahilmgandhi	18:6a4db94011d3	5031	/**
sahilmgandhi	18:6a4db94011d3	5032	* @brief This function handles I2C Communication Timeout.
sahilmgandhi	18:6a4db94011d3	5033	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5034	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	5035	* @param Flag specifies the I2C flag to check.
sahilmgandhi	18:6a4db94011d3	5036	* @param Status The new Flag status (SET or RESET).
sahilmgandhi	18:6a4db94011d3	5037	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5038	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5039	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5040	*/
sahilmgandhi	18:6a4db94011d3	5041	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5042	{
sahilmgandhi	18:6a4db94011d3	5043	/* Wait until flag is set */
sahilmgandhi	18:6a4db94011d3	5044	while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
sahilmgandhi	18:6a4db94011d3	5045	{
sahilmgandhi	18:6a4db94011d3	5046	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5047	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	5048	{
sahilmgandhi	18:6a4db94011d3	5049	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	5050	{
sahilmgandhi	18:6a4db94011d3	5051	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5052	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5053
sahilmgandhi	18:6a4db94011d3	5054	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5055	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5056
sahilmgandhi	18:6a4db94011d3	5057	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5058	}
sahilmgandhi	18:6a4db94011d3	5059	}
sahilmgandhi	18:6a4db94011d3	5060	}
sahilmgandhi	18:6a4db94011d3	5061
sahilmgandhi	18:6a4db94011d3	5062	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5063	}
sahilmgandhi	18:6a4db94011d3	5064
sahilmgandhi	18:6a4db94011d3	5065	/**
sahilmgandhi	18:6a4db94011d3	5066	* @brief This function handles I2C Communication Timeout for Master addressing phase.
sahilmgandhi	18:6a4db94011d3	5067	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5068	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	5069	* @param Flag specifies the I2C flag to check.
sahilmgandhi	18:6a4db94011d3	5070	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5071	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5072	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5073	*/
sahilmgandhi	18:6a4db94011d3	5074	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5075	{
sahilmgandhi	18:6a4db94011d3	5076	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
sahilmgandhi	18:6a4db94011d3	5077	{
sahilmgandhi	18:6a4db94011d3	5078	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
sahilmgandhi	18:6a4db94011d3	5079	{
sahilmgandhi	18:6a4db94011d3	5080	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	5081	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	5082
sahilmgandhi	18:6a4db94011d3	5083	/* Clear AF Flag */
sahilmgandhi	18:6a4db94011d3	5084	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	5085
sahilmgandhi	18:6a4db94011d3	5086	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	5087	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5088	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5089
sahilmgandhi	18:6a4db94011d3	5090	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5091	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5092
sahilmgandhi	18:6a4db94011d3	5093	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5094	}
sahilmgandhi	18:6a4db94011d3	5095
sahilmgandhi	18:6a4db94011d3	5096	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5097	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	5098	{
sahilmgandhi	18:6a4db94011d3	5099	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	5100	{
sahilmgandhi	18:6a4db94011d3	5101	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5102	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5103
sahilmgandhi	18:6a4db94011d3	5104	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5105	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5106
sahilmgandhi	18:6a4db94011d3	5107	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5108	}
sahilmgandhi	18:6a4db94011d3	5109	}
sahilmgandhi	18:6a4db94011d3	5110	}
sahilmgandhi	18:6a4db94011d3	5111	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5112	}
sahilmgandhi	18:6a4db94011d3	5113
sahilmgandhi	18:6a4db94011d3	5114	/**
sahilmgandhi	18:6a4db94011d3	5115	* @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
sahilmgandhi	18:6a4db94011d3	5116	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5117	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5118	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5119	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5120	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5121	*/
sahilmgandhi	18:6a4db94011d3	5122	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5123	{
sahilmgandhi	18:6a4db94011d3	5124	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
sahilmgandhi	18:6a4db94011d3	5125	{
sahilmgandhi	18:6a4db94011d3	5126	/* Check if a NACK is detected */
sahilmgandhi	18:6a4db94011d3	5127	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5128	{
sahilmgandhi	18:6a4db94011d3	5129	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5130	}
sahilmgandhi	18:6a4db94011d3	5131
sahilmgandhi	18:6a4db94011d3	5132	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5133	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	5134	{
sahilmgandhi	18:6a4db94011d3	5135	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	5136	{
sahilmgandhi	18:6a4db94011d3	5137	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5138	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5139	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5140
sahilmgandhi	18:6a4db94011d3	5141	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5142	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5143
sahilmgandhi	18:6a4db94011d3	5144	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5145	}
sahilmgandhi	18:6a4db94011d3	5146	}
sahilmgandhi	18:6a4db94011d3	5147	}
sahilmgandhi	18:6a4db94011d3	5148	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5149	}
sahilmgandhi	18:6a4db94011d3	5150
sahilmgandhi	18:6a4db94011d3	5151	/**
sahilmgandhi	18:6a4db94011d3	5152	* @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
sahilmgandhi	18:6a4db94011d3	5153	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5154	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5155	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5156	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5157	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5158	*/
sahilmgandhi	18:6a4db94011d3	5159	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5160	{
sahilmgandhi	18:6a4db94011d3	5161	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
sahilmgandhi	18:6a4db94011d3	5162	{
sahilmgandhi	18:6a4db94011d3	5163	/* Check if a NACK is detected */
sahilmgandhi	18:6a4db94011d3	5164	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5165	{
sahilmgandhi	18:6a4db94011d3	5166	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5167	}
sahilmgandhi	18:6a4db94011d3	5168
sahilmgandhi	18:6a4db94011d3	5169	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5170	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	5171	{
sahilmgandhi	18:6a4db94011d3	5172	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	5173	{
sahilmgandhi	18:6a4db94011d3	5174	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5175	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5176	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5177
sahilmgandhi	18:6a4db94011d3	5178	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5179	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5180
sahilmgandhi	18:6a4db94011d3	5181	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5182	}
sahilmgandhi	18:6a4db94011d3	5183	}
sahilmgandhi	18:6a4db94011d3	5184	}
sahilmgandhi	18:6a4db94011d3	5185	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5186	}
sahilmgandhi	18:6a4db94011d3	5187
sahilmgandhi	18:6a4db94011d3	5188	/**
sahilmgandhi	18:6a4db94011d3	5189	* @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
sahilmgandhi	18:6a4db94011d3	5190	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5191	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5192	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5193	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5194	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5195	*/
sahilmgandhi	18:6a4db94011d3	5196	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5197	{
sahilmgandhi	18:6a4db94011d3	5198	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
sahilmgandhi	18:6a4db94011d3	5199	{
sahilmgandhi	18:6a4db94011d3	5200	/* Check if a NACK is detected */
sahilmgandhi	18:6a4db94011d3	5201	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5202	{
sahilmgandhi	18:6a4db94011d3	5203	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5204	}
sahilmgandhi	18:6a4db94011d3	5205
sahilmgandhi	18:6a4db94011d3	5206	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5207	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	5208	{
sahilmgandhi	18:6a4db94011d3	5209	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5210	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5211	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5212
sahilmgandhi	18:6a4db94011d3	5213	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5214	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5215
sahilmgandhi	18:6a4db94011d3	5216	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5217	}
sahilmgandhi	18:6a4db94011d3	5218	}
sahilmgandhi	18:6a4db94011d3	5219	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5220	}
sahilmgandhi	18:6a4db94011d3	5221
sahilmgandhi	18:6a4db94011d3	5222	/**
sahilmgandhi	18:6a4db94011d3	5223	* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
sahilmgandhi	18:6a4db94011d3	5224	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5225	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5226	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5227	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5228	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5229	*/
sahilmgandhi	18:6a4db94011d3	5230	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5231	{
sahilmgandhi	18:6a4db94011d3	5232
sahilmgandhi	18:6a4db94011d3	5233	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
sahilmgandhi	18:6a4db94011d3	5234	{
sahilmgandhi	18:6a4db94011d3	5235	/* Check if a STOPF is detected */
sahilmgandhi	18:6a4db94011d3	5236	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
sahilmgandhi	18:6a4db94011d3	5237	{
sahilmgandhi	18:6a4db94011d3	5238	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	5239	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	5240
sahilmgandhi	18:6a4db94011d3	5241	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	5242	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5243	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5244
sahilmgandhi	18:6a4db94011d3	5245	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5246	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5247
sahilmgandhi	18:6a4db94011d3	5248	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5249	}
sahilmgandhi	18:6a4db94011d3	5250
sahilmgandhi	18:6a4db94011d3	5251	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5252	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	5253	{
sahilmgandhi	18:6a4db94011d3	5254	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5255	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5256
sahilmgandhi	18:6a4db94011d3	5257	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5258	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5259
sahilmgandhi	18:6a4db94011d3	5260	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5261	}
sahilmgandhi	18:6a4db94011d3	5262	}
sahilmgandhi	18:6a4db94011d3	5263	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5264	}
sahilmgandhi	18:6a4db94011d3	5265
sahilmgandhi	18:6a4db94011d3	5266	/**
sahilmgandhi	18:6a4db94011d3	5267	* @brief This function handles Acknowledge failed detection during an I2C Communication.
sahilmgandhi	18:6a4db94011d3	5268	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5269	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5270	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5271	*/
sahilmgandhi	18:6a4db94011d3	5272	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	5273	{
sahilmgandhi	18:6a4db94011d3	5274	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
sahilmgandhi	18:6a4db94011d3	5275	{
sahilmgandhi	18:6a4db94011d3	5276	/* Clear NACKF Flag */
sahilmgandhi	18:6a4db94011d3	5277	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	5278
sahilmgandhi	18:6a4db94011d3	5279	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	5280	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5281	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5282
sahilmgandhi	18:6a4db94011d3	5283	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5284	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5285
sahilmgandhi	18:6a4db94011d3	5286	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5287	}
sahilmgandhi	18:6a4db94011d3	5288	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5289	}
sahilmgandhi	18:6a4db94011d3	5290	/**
sahilmgandhi	18:6a4db94011d3	5291	* @}
sahilmgandhi	18:6a4db94011d3	5292	*/
sahilmgandhi	18:6a4db94011d3	5293
sahilmgandhi	18:6a4db94011d3	5294	#endif /* HAL_I2C_MODULE_ENABLED */
sahilmgandhi	18:6a4db94011d3	5295
sahilmgandhi	18:6a4db94011d3	5296	/**
sahilmgandhi	18:6a4db94011d3	5297	* @}
sahilmgandhi	18:6a4db94011d3	5298	*/
sahilmgandhi	18:6a4db94011d3	5299
sahilmgandhi	18:6a4db94011d3	5300	/**
sahilmgandhi	18:6a4db94011d3	5301	* @}
sahilmgandhi	18:6a4db94011d3	5302	*/
sahilmgandhi	18:6a4db94011d3	5303
sahilmgandhi	18:6a4db94011d3	5304	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	25 Apr 2017
Imports:	29
Forks:	0
Commits:	47
Dependents:	0
Dependencies:	2
Followers:	5

The code in this repository is Apache licensed.

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c@18:6a4db94011d3, 2017-05-14 (annotated)

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