MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_fmpi2c.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_fmpi2c.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of FMPI2C HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_HAL_FMPI2C_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_HAL_FMPI2C_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 47 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 50 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 53 * @{
sahilmgandhi 18:6a4db94011d3 54 */
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 /** @addtogroup FMPI2C
sahilmgandhi 18:6a4db94011d3 57 * @{
sahilmgandhi 18:6a4db94011d3 58 */
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 61 /** @defgroup FMPI2C_Exported_Types FMPI2C Exported Types
sahilmgandhi 18:6a4db94011d3 62 * @{
sahilmgandhi 18:6a4db94011d3 63 */
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 /** @defgroup FMPI2C_Configuration_Structure_definition FMPI2C Configuration Structure definition
sahilmgandhi 18:6a4db94011d3 66 * @brief FMPI2C Configuration Structure definition
sahilmgandhi 18:6a4db94011d3 67 * @{
sahilmgandhi 18:6a4db94011d3 68 */
sahilmgandhi 18:6a4db94011d3 69 typedef struct
sahilmgandhi 18:6a4db94011d3 70 {
sahilmgandhi 18:6a4db94011d3 71 uint32_t Timing; /*!< Specifies the FMPI2C_TIMINGR_register value.
sahilmgandhi 18:6a4db94011d3 72 This parameter calculated by referring to FMPI2C initialization
sahilmgandhi 18:6a4db94011d3 73 section in Reference manual */
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 uint32_t OwnAddress1; /*!< Specifies the first device own address.
sahilmgandhi 18:6a4db94011d3 76 This parameter can be a 7-bit or 10-bit address. */
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
sahilmgandhi 18:6a4db94011d3 79 This parameter can be a value of @ref FMPI2C_ADDRESSING_MODE */
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
sahilmgandhi 18:6a4db94011d3 82 This parameter can be a value of @ref FMPI2C_DUAL_ADDRESSING_MODE */
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
sahilmgandhi 18:6a4db94011d3 85 This parameter can be a 7-bit address. */
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
sahilmgandhi 18:6a4db94011d3 88 This parameter can be a value of @ref FMPI2C_OWN_ADDRESS2_MASKS */
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
sahilmgandhi 18:6a4db94011d3 91 This parameter can be a value of @ref FMPI2C_GENERAL_CALL_ADDRESSING_MODE */
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
sahilmgandhi 18:6a4db94011d3 94 This parameter can be a value of @ref FMPI2C_NOSTRETCH_MODE */
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 }FMPI2C_InitTypeDef;
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 /**
sahilmgandhi 18:6a4db94011d3 99 * @}
sahilmgandhi 18:6a4db94011d3 100 */
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 /** @defgroup HAL_state_structure_definition HAL state structure definition
sahilmgandhi 18:6a4db94011d3 103 * @brief HAL State structure definition
sahilmgandhi 18:6a4db94011d3 104 * @note HAL FMPI2C State value coding follow below described bitmap :
sahilmgandhi 18:6a4db94011d3 105 * b7-b6 Error information
sahilmgandhi 18:6a4db94011d3 106 * 00 : No Error
sahilmgandhi 18:6a4db94011d3 107 * 01 : Abort (Abort user request on going)
sahilmgandhi 18:6a4db94011d3 108 * 10 : Timeout
sahilmgandhi 18:6a4db94011d3 109 * 11 : Error
sahilmgandhi 18:6a4db94011d3 110 * b5 IP initilisation status
sahilmgandhi 18:6a4db94011d3 111 * 0 : Reset (IP not initialized)
sahilmgandhi 18:6a4db94011d3 112 * 1 : Init done (IP initialized and ready to use. HAL FMPI2C Init function called)
sahilmgandhi 18:6a4db94011d3 113 * b4 (not used)
sahilmgandhi 18:6a4db94011d3 114 * x : Should be set to 0
sahilmgandhi 18:6a4db94011d3 115 * b3
sahilmgandhi 18:6a4db94011d3 116 * 0 : Ready or Busy (No Listen mode ongoing)
sahilmgandhi 18:6a4db94011d3 117 * 1 : Listen (IP in Address Listen Mode)
sahilmgandhi 18:6a4db94011d3 118 * b2 Intrinsic process state
sahilmgandhi 18:6a4db94011d3 119 * 0 : Ready
sahilmgandhi 18:6a4db94011d3 120 * 1 : Busy (IP busy with some configuration or internal operations)
sahilmgandhi 18:6a4db94011d3 121 * b1 Rx state
sahilmgandhi 18:6a4db94011d3 122 * 0 : Ready (no Rx operation ongoing)
sahilmgandhi 18:6a4db94011d3 123 * 1 : Busy (Rx operation ongoing)
sahilmgandhi 18:6a4db94011d3 124 * b0 Tx state
sahilmgandhi 18:6a4db94011d3 125 * 0 : Ready (no Tx operation ongoing)
sahilmgandhi 18:6a4db94011d3 126 * 1 : Busy (Tx operation ongoing)
sahilmgandhi 18:6a4db94011d3 127 * @{
sahilmgandhi 18:6a4db94011d3 128 */
sahilmgandhi 18:6a4db94011d3 129 typedef enum
sahilmgandhi 18:6a4db94011d3 130 {
sahilmgandhi 18:6a4db94011d3 131 HAL_FMPI2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
sahilmgandhi 18:6a4db94011d3 132 HAL_FMPI2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
sahilmgandhi 18:6a4db94011d3 133 HAL_FMPI2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
sahilmgandhi 18:6a4db94011d3 134 HAL_FMPI2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
sahilmgandhi 18:6a4db94011d3 135 HAL_FMPI2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
sahilmgandhi 18:6a4db94011d3 136 HAL_FMPI2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
sahilmgandhi 18:6a4db94011d3 137 HAL_FMPI2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
sahilmgandhi 18:6a4db94011d3 138 process is ongoing */
sahilmgandhi 18:6a4db94011d3 139 HAL_FMPI2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
sahilmgandhi 18:6a4db94011d3 140 process is ongoing */
sahilmgandhi 18:6a4db94011d3 141 HAL_FMPI2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
sahilmgandhi 18:6a4db94011d3 142 HAL_FMPI2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
sahilmgandhi 18:6a4db94011d3 143 HAL_FMPI2C_STATE_ERROR = 0xE0U /*!< Error */
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 }HAL_FMPI2C_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 /**
sahilmgandhi 18:6a4db94011d3 148 * @}
sahilmgandhi 18:6a4db94011d3 149 */
sahilmgandhi 18:6a4db94011d3 150
sahilmgandhi 18:6a4db94011d3 151 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
sahilmgandhi 18:6a4db94011d3 152 * @brief HAL Mode structure definition
sahilmgandhi 18:6a4db94011d3 153 * @note HAL FMPI2C Mode value coding follow below described bitmap :
sahilmgandhi 18:6a4db94011d3 154 * b7 (not used)
sahilmgandhi 18:6a4db94011d3 155 * x : Should be set to 0
sahilmgandhi 18:6a4db94011d3 156 * b6
sahilmgandhi 18:6a4db94011d3 157 * 0 : None
sahilmgandhi 18:6a4db94011d3 158 * 1 : Memory (HAL FMPI2C communication is in Memory Mode)
sahilmgandhi 18:6a4db94011d3 159 * b5
sahilmgandhi 18:6a4db94011d3 160 * 0 : None
sahilmgandhi 18:6a4db94011d3 161 * 1 : Slave (HAL FMPI2C communication is in Slave Mode)
sahilmgandhi 18:6a4db94011d3 162 * b4
sahilmgandhi 18:6a4db94011d3 163 * 0 : None
sahilmgandhi 18:6a4db94011d3 164 * 1 : Master (HAL FMPI2C communication is in Master Mode)
sahilmgandhi 18:6a4db94011d3 165 * b3-b2-b1-b0 (not used)
sahilmgandhi 18:6a4db94011d3 166 * xxxx : Should be set to 0000
sahilmgandhi 18:6a4db94011d3 167 * @{
sahilmgandhi 18:6a4db94011d3 168 */
sahilmgandhi 18:6a4db94011d3 169 typedef enum
sahilmgandhi 18:6a4db94011d3 170 {
sahilmgandhi 18:6a4db94011d3 171 HAL_FMPI2C_MODE_NONE = 0x00U, /*!< No FMPI2C communication on going */
sahilmgandhi 18:6a4db94011d3 172 HAL_FMPI2C_MODE_MASTER = 0x10U, /*!< FMPI2C communication is in Master Mode */
sahilmgandhi 18:6a4db94011d3 173 HAL_FMPI2C_MODE_SLAVE = 0x20U, /*!< FMPI2C communication is in Slave Mode */
sahilmgandhi 18:6a4db94011d3 174 HAL_FMPI2C_MODE_MEM = 0x40U /*!< FMPI2C communication is in Memory Mode */
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 }HAL_FMPI2C_ModeTypeDef;
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 /**
sahilmgandhi 18:6a4db94011d3 179 * @}
sahilmgandhi 18:6a4db94011d3 180 */
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 /** @defgroup FMPI2C_Error_Code_definition FMPI2C Error Code definition
sahilmgandhi 18:6a4db94011d3 183 * @brief FMPI2C Error Code definition
sahilmgandhi 18:6a4db94011d3 184 * @{
sahilmgandhi 18:6a4db94011d3 185 */
sahilmgandhi 18:6a4db94011d3 186 #define HAL_FMPI2C_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
sahilmgandhi 18:6a4db94011d3 187 #define HAL_FMPI2C_ERROR_BERR ((uint32_t)0x00000001U) /*!< BERR error */
sahilmgandhi 18:6a4db94011d3 188 #define HAL_FMPI2C_ERROR_ARLO ((uint32_t)0x00000002U) /*!< ARLO error */
sahilmgandhi 18:6a4db94011d3 189 #define HAL_FMPI2C_ERROR_AF ((uint32_t)0x00000004U) /*!< ACKF error */
sahilmgandhi 18:6a4db94011d3 190 #define HAL_FMPI2C_ERROR_OVR ((uint32_t)0x00000008U) /*!< OVR error */
sahilmgandhi 18:6a4db94011d3 191 #define HAL_FMPI2C_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
sahilmgandhi 18:6a4db94011d3 192 #define HAL_FMPI2C_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */
sahilmgandhi 18:6a4db94011d3 193 #define HAL_FMPI2C_ERROR_SIZE ((uint32_t)0x00000040U) /*!< Size Management error */
sahilmgandhi 18:6a4db94011d3 194 /**
sahilmgandhi 18:6a4db94011d3 195 * @}
sahilmgandhi 18:6a4db94011d3 196 */
sahilmgandhi 18:6a4db94011d3 197
sahilmgandhi 18:6a4db94011d3 198 /** @defgroup FMPI2C_handle_Structure_definition FMPI2C handle Structure definition
sahilmgandhi 18:6a4db94011d3 199 * @brief FMPI2C handle Structure definition
sahilmgandhi 18:6a4db94011d3 200 * @{
sahilmgandhi 18:6a4db94011d3 201 */
sahilmgandhi 18:6a4db94011d3 202 typedef struct __FMPI2C_HandleTypeDef
sahilmgandhi 18:6a4db94011d3 203 {
sahilmgandhi 18:6a4db94011d3 204 FMPI2C_TypeDef *Instance; /*!< FMPI2C registers base address */
sahilmgandhi 18:6a4db94011d3 205
sahilmgandhi 18:6a4db94011d3 206 FMPI2C_InitTypeDef Init; /*!< FMPI2C communication parameters */
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 uint8_t *pBuffPtr; /*!< Pointer to FMPI2C transfer buffer */
sahilmgandhi 18:6a4db94011d3 209
sahilmgandhi 18:6a4db94011d3 210 uint16_t XferSize; /*!< FMPI2C transfer size */
sahilmgandhi 18:6a4db94011d3 211
sahilmgandhi 18:6a4db94011d3 212 __IO uint16_t XferCount; /*!< FMPI2C transfer counter */
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 __IO uint32_t XferOptions; /*!< FMPI2C sequantial transfer options, this parameter can
sahilmgandhi 18:6a4db94011d3 215 be a value of @ref FMPI2C_XFEROPTIONS */
sahilmgandhi 18:6a4db94011d3 216
sahilmgandhi 18:6a4db94011d3 217 __IO uint32_t PreviousState; /*!< FMPI2C communication Previous state */
sahilmgandhi 18:6a4db94011d3 218
sahilmgandhi 18:6a4db94011d3 219 HAL_StatusTypeDef (*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources); /*!< FMPI2C transfer IRQ handler function pointer */
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 DMA_HandleTypeDef *hdmatx; /*!< FMPI2C Tx DMA handle parameters */
sahilmgandhi 18:6a4db94011d3 222
sahilmgandhi 18:6a4db94011d3 223 DMA_HandleTypeDef *hdmarx; /*!< FMPI2C Rx DMA handle parameters */
sahilmgandhi 18:6a4db94011d3 224
sahilmgandhi 18:6a4db94011d3 225 HAL_LockTypeDef Lock; /*!< FMPI2C locking object */
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 __IO HAL_FMPI2C_StateTypeDef State; /*!< FMPI2C communication state */
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229 __IO HAL_FMPI2C_ModeTypeDef Mode; /*!< FMPI2C communication mode */
sahilmgandhi 18:6a4db94011d3 230
sahilmgandhi 18:6a4db94011d3 231 __IO uint32_t ErrorCode; /*!< FMPI2C Error code */
sahilmgandhi 18:6a4db94011d3 232
sahilmgandhi 18:6a4db94011d3 233 __IO uint32_t AddrEventCount; /*!< FMPI2C Address Event counter */
sahilmgandhi 18:6a4db94011d3 234 }FMPI2C_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 235 /**
sahilmgandhi 18:6a4db94011d3 236 * @}
sahilmgandhi 18:6a4db94011d3 237 */
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /**
sahilmgandhi 18:6a4db94011d3 240 * @}
sahilmgandhi 18:6a4db94011d3 241 */
sahilmgandhi 18:6a4db94011d3 242 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 243
sahilmgandhi 18:6a4db94011d3 244 /** @defgroup FMPI2C_Exported_Constants FMPI2C Exported Constants
sahilmgandhi 18:6a4db94011d3 245 * @{
sahilmgandhi 18:6a4db94011d3 246 */
sahilmgandhi 18:6a4db94011d3 247
sahilmgandhi 18:6a4db94011d3 248 /** @defgroup FMPI2C_XFEROPTIONS FMPI2C Sequential Transfer Options
sahilmgandhi 18:6a4db94011d3 249 * @{
sahilmgandhi 18:6a4db94011d3 250 */
sahilmgandhi 18:6a4db94011d3 251 #define FMPI2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U)
sahilmgandhi 18:6a4db94011d3 252 #define FMPI2C_FIRST_FRAME ((uint32_t)FMPI2C_SOFTEND_MODE)
sahilmgandhi 18:6a4db94011d3 253 #define FMPI2C_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))
sahilmgandhi 18:6a4db94011d3 254 #define FMPI2C_FIRST_AND_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE)
sahilmgandhi 18:6a4db94011d3 255 #define FMPI2C_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE)
sahilmgandhi 18:6a4db94011d3 256 /**
sahilmgandhi 18:6a4db94011d3 257 * @}
sahilmgandhi 18:6a4db94011d3 258 */
sahilmgandhi 18:6a4db94011d3 259
sahilmgandhi 18:6a4db94011d3 260 /** @defgroup FMPI2C_ADDRESSING_MODE FMPI2C Addressing Mode
sahilmgandhi 18:6a4db94011d3 261 * @{
sahilmgandhi 18:6a4db94011d3 262 */
sahilmgandhi 18:6a4db94011d3 263 #define FMPI2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 264 #define FMPI2C_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002U)
sahilmgandhi 18:6a4db94011d3 265 /**
sahilmgandhi 18:6a4db94011d3 266 * @}
sahilmgandhi 18:6a4db94011d3 267 */
sahilmgandhi 18:6a4db94011d3 268
sahilmgandhi 18:6a4db94011d3 269 /** @defgroup FMPI2C_DUAL_ADDRESSING_MODE FMPI2C Dual Addressing Mode
sahilmgandhi 18:6a4db94011d3 270 * @{
sahilmgandhi 18:6a4db94011d3 271 */
sahilmgandhi 18:6a4db94011d3 272 #define FMPI2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 273 #define FMPI2C_DUALADDRESS_ENABLE FMPI2C_OAR2_OA2EN
sahilmgandhi 18:6a4db94011d3 274 /**
sahilmgandhi 18:6a4db94011d3 275 * @}
sahilmgandhi 18:6a4db94011d3 276 */
sahilmgandhi 18:6a4db94011d3 277
sahilmgandhi 18:6a4db94011d3 278 /** @defgroup FMPI2C_OWN_ADDRESS2_MASKS FMPI2C Own Address2 Masks
sahilmgandhi 18:6a4db94011d3 279 * @{
sahilmgandhi 18:6a4db94011d3 280 */
sahilmgandhi 18:6a4db94011d3 281
sahilmgandhi 18:6a4db94011d3 282 #define FMPI2C_OA2_NOMASK ((uint8_t)0x00U)
sahilmgandhi 18:6a4db94011d3 283 #define FMPI2C_OA2_MASK01 ((uint8_t)0x01U)
sahilmgandhi 18:6a4db94011d3 284 #define FMPI2C_OA2_MASK02 ((uint8_t)0x02U)
sahilmgandhi 18:6a4db94011d3 285 #define FMPI2C_OA2_MASK03 ((uint8_t)0x03U)
sahilmgandhi 18:6a4db94011d3 286 #define FMPI2C_OA2_MASK04 ((uint8_t)0x04U)
sahilmgandhi 18:6a4db94011d3 287 #define FMPI2C_OA2_MASK05 ((uint8_t)0x05U)
sahilmgandhi 18:6a4db94011d3 288 #define FMPI2C_OA2_MASK06 ((uint8_t)0x06U)
sahilmgandhi 18:6a4db94011d3 289 #define FMPI2C_OA2_MASK07 ((uint8_t)0x07U)
sahilmgandhi 18:6a4db94011d3 290
sahilmgandhi 18:6a4db94011d3 291 /**
sahilmgandhi 18:6a4db94011d3 292 * @}
sahilmgandhi 18:6a4db94011d3 293 */
sahilmgandhi 18:6a4db94011d3 294
sahilmgandhi 18:6a4db94011d3 295 /** @defgroup FMPI2C_GENERAL_CALL_ADDRESSING_MODE FMPI2C General Call Addressing Mode
sahilmgandhi 18:6a4db94011d3 296 * @{
sahilmgandhi 18:6a4db94011d3 297 */
sahilmgandhi 18:6a4db94011d3 298 #define FMPI2C_GENERALCALL_DISABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 299 #define FMPI2C_GENERALCALL_ENABLE FMPI2C_CR1_GCEN
sahilmgandhi 18:6a4db94011d3 300 /**
sahilmgandhi 18:6a4db94011d3 301 * @}
sahilmgandhi 18:6a4db94011d3 302 */
sahilmgandhi 18:6a4db94011d3 303
sahilmgandhi 18:6a4db94011d3 304 /** @defgroup FMPI2C_NOSTRETCH_MODE FMPI2C No-Stretch Mode
sahilmgandhi 18:6a4db94011d3 305 * @{
sahilmgandhi 18:6a4db94011d3 306 */
sahilmgandhi 18:6a4db94011d3 307 #define FMPI2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 308 #define FMPI2C_NOSTRETCH_ENABLE FMPI2C_CR1_NOSTRETCH
sahilmgandhi 18:6a4db94011d3 309 /**
sahilmgandhi 18:6a4db94011d3 310 * @}
sahilmgandhi 18:6a4db94011d3 311 */
sahilmgandhi 18:6a4db94011d3 312
sahilmgandhi 18:6a4db94011d3 313 /** @defgroup FMPI2C_MEMORY_ADDRESS_SIZE FMPI2C Memory Address Size
sahilmgandhi 18:6a4db94011d3 314 * @{
sahilmgandhi 18:6a4db94011d3 315 */
sahilmgandhi 18:6a4db94011d3 316 #define FMPI2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 317 #define FMPI2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000002U)
sahilmgandhi 18:6a4db94011d3 318
sahilmgandhi 18:6a4db94011d3 319 /**
sahilmgandhi 18:6a4db94011d3 320 * @}
sahilmgandhi 18:6a4db94011d3 321 */
sahilmgandhi 18:6a4db94011d3 322
sahilmgandhi 18:6a4db94011d3 323 /** @defgroup FMPI2C_XferDirection FMPI2C Transfer Direction
sahilmgandhi 18:6a4db94011d3 324 * @{
sahilmgandhi 18:6a4db94011d3 325 */
sahilmgandhi 18:6a4db94011d3 326 #define FMPI2C_DIRECTION_RECEIVE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 327 #define FMPI2C_DIRECTION_TRANSMIT ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 328
sahilmgandhi 18:6a4db94011d3 329 /**
sahilmgandhi 18:6a4db94011d3 330 * @}
sahilmgandhi 18:6a4db94011d3 331 */
sahilmgandhi 18:6a4db94011d3 332
sahilmgandhi 18:6a4db94011d3 333 /** @defgroup FMPI2C_RELOAD_END_MODE FMPI2C Reload End Mode
sahilmgandhi 18:6a4db94011d3 334 * @{
sahilmgandhi 18:6a4db94011d3 335 */
sahilmgandhi 18:6a4db94011d3 336 #define FMPI2C_RELOAD_MODE FMPI2C_CR2_RELOAD
sahilmgandhi 18:6a4db94011d3 337 #define FMPI2C_AUTOEND_MODE FMPI2C_CR2_AUTOEND
sahilmgandhi 18:6a4db94011d3 338 #define FMPI2C_SOFTEND_MODE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 339
sahilmgandhi 18:6a4db94011d3 340 /**
sahilmgandhi 18:6a4db94011d3 341 * @}
sahilmgandhi 18:6a4db94011d3 342 */
sahilmgandhi 18:6a4db94011d3 343
sahilmgandhi 18:6a4db94011d3 344 /** @defgroup FMPI2C_START_STOP_MODE FMPI2C Start or Stop Mode
sahilmgandhi 18:6a4db94011d3 345 * @{
sahilmgandhi 18:6a4db94011d3 346 */
sahilmgandhi 18:6a4db94011d3 347
sahilmgandhi 18:6a4db94011d3 348 #define FMPI2C_NO_STARTSTOP ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 349 #define FMPI2C_GENERATE_STOP FMPI2C_CR2_STOP
sahilmgandhi 18:6a4db94011d3 350 #define FMPI2C_GENERATE_START_READ (uint32_t)(FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)
sahilmgandhi 18:6a4db94011d3 351 #define FMPI2C_GENERATE_START_WRITE FMPI2C_CR2_START
sahilmgandhi 18:6a4db94011d3 352
sahilmgandhi 18:6a4db94011d3 353 /**
sahilmgandhi 18:6a4db94011d3 354 * @}
sahilmgandhi 18:6a4db94011d3 355 */
sahilmgandhi 18:6a4db94011d3 356
sahilmgandhi 18:6a4db94011d3 357 /** @defgroup FMPI2C_Interrupt_configuration_definition FMPI2C Interrupt configuration definition
sahilmgandhi 18:6a4db94011d3 358 * @brief FMPI2C Interrupt definition
sahilmgandhi 18:6a4db94011d3 359 * Elements values convention: 0xXXXXXXXX
sahilmgandhi 18:6a4db94011d3 360 * - XXXXXXXX : Interrupt control mask
sahilmgandhi 18:6a4db94011d3 361 * @{
sahilmgandhi 18:6a4db94011d3 362 */
sahilmgandhi 18:6a4db94011d3 363 #define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE
sahilmgandhi 18:6a4db94011d3 364 #define FMPI2C_IT_TCI FMPI2C_CR1_TCIE
sahilmgandhi 18:6a4db94011d3 365 #define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE
sahilmgandhi 18:6a4db94011d3 366 #define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE
sahilmgandhi 18:6a4db94011d3 367 #define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE
sahilmgandhi 18:6a4db94011d3 368 #define FMPI2C_IT_RXI FMPI2C_CR1_RXIE
sahilmgandhi 18:6a4db94011d3 369 #define FMPI2C_IT_TXI FMPI2C_CR1_TXIE
sahilmgandhi 18:6a4db94011d3 370 /**
sahilmgandhi 18:6a4db94011d3 371 * @}
sahilmgandhi 18:6a4db94011d3 372 */
sahilmgandhi 18:6a4db94011d3 373
sahilmgandhi 18:6a4db94011d3 374 /** @defgroup FMPI2C_Flag_definition FMPI2C Flag definition
sahilmgandhi 18:6a4db94011d3 375 * @{
sahilmgandhi 18:6a4db94011d3 376 */
sahilmgandhi 18:6a4db94011d3 377 #define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE
sahilmgandhi 18:6a4db94011d3 378 #define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS
sahilmgandhi 18:6a4db94011d3 379 #define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE
sahilmgandhi 18:6a4db94011d3 380 #define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR
sahilmgandhi 18:6a4db94011d3 381 #define FMPI2C_FLAG_AF FMPI2C_ISR_NACKF
sahilmgandhi 18:6a4db94011d3 382 #define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF
sahilmgandhi 18:6a4db94011d3 383 #define FMPI2C_FLAG_TC FMPI2C_ISR_TC
sahilmgandhi 18:6a4db94011d3 384 #define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR
sahilmgandhi 18:6a4db94011d3 385 #define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR
sahilmgandhi 18:6a4db94011d3 386 #define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO
sahilmgandhi 18:6a4db94011d3 387 #define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR
sahilmgandhi 18:6a4db94011d3 388 #define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR
sahilmgandhi 18:6a4db94011d3 389 #define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT
sahilmgandhi 18:6a4db94011d3 390 #define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT
sahilmgandhi 18:6a4db94011d3 391 #define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY
sahilmgandhi 18:6a4db94011d3 392 #define FMPI2C_FLAG_DIR FMPI2C_ISR_DIR
sahilmgandhi 18:6a4db94011d3 393 /**
sahilmgandhi 18:6a4db94011d3 394 * @}
sahilmgandhi 18:6a4db94011d3 395 */
sahilmgandhi 18:6a4db94011d3 396
sahilmgandhi 18:6a4db94011d3 397 /**
sahilmgandhi 18:6a4db94011d3 398 * @}
sahilmgandhi 18:6a4db94011d3 399 */
sahilmgandhi 18:6a4db94011d3 400
sahilmgandhi 18:6a4db94011d3 401 /* Exported macros -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 402
sahilmgandhi 18:6a4db94011d3 403 /** @defgroup FMPI2C_Exported_Macros FMPI2C Exported Macros
sahilmgandhi 18:6a4db94011d3 404 * @{
sahilmgandhi 18:6a4db94011d3 405 */
sahilmgandhi 18:6a4db94011d3 406
sahilmgandhi 18:6a4db94011d3 407 /** @brief Reset FMPI2C handle state.
sahilmgandhi 18:6a4db94011d3 408 * @param __HANDLE__ specifies the FMPI2C Handle.
sahilmgandhi 18:6a4db94011d3 409 * @retval None
sahilmgandhi 18:6a4db94011d3 410 */
sahilmgandhi 18:6a4db94011d3 411 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET)
sahilmgandhi 18:6a4db94011d3 412
sahilmgandhi 18:6a4db94011d3 413 /** @brief Enable the specified FMPI2C interrupt.
sahilmgandhi 18:6a4db94011d3 414 * @param __HANDLE__ specifies the FMPI2C Handle.
sahilmgandhi 18:6a4db94011d3 415 * @param __INTERRUPT__ specifies the interrupt source to enable.
sahilmgandhi 18:6a4db94011d3 416 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 417 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable
sahilmgandhi 18:6a4db94011d3 418 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable
sahilmgandhi 18:6a4db94011d3 419 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable
sahilmgandhi 18:6a4db94011d3 420 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable
sahilmgandhi 18:6a4db94011d3 421 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable
sahilmgandhi 18:6a4db94011d3 422 * @arg @ref FMPI2C_IT_RXI RX interrupt enable
sahilmgandhi 18:6a4db94011d3 423 * @arg @ref FMPI2C_IT_TXI TX interrupt enable
sahilmgandhi 18:6a4db94011d3 424 *
sahilmgandhi 18:6a4db94011d3 425 * @retval None
sahilmgandhi 18:6a4db94011d3 426 */
sahilmgandhi 18:6a4db94011d3 427 #define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 428
sahilmgandhi 18:6a4db94011d3 429 /** @brief Disable the specified FMPI2C interrupt.
sahilmgandhi 18:6a4db94011d3 430 * @param __HANDLE__ specifies the FMPI2C Handle.
sahilmgandhi 18:6a4db94011d3 431 * @param __INTERRUPT__ specifies the interrupt source to disable.
sahilmgandhi 18:6a4db94011d3 432 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 433 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable
sahilmgandhi 18:6a4db94011d3 434 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable
sahilmgandhi 18:6a4db94011d3 435 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable
sahilmgandhi 18:6a4db94011d3 436 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable
sahilmgandhi 18:6a4db94011d3 437 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable
sahilmgandhi 18:6a4db94011d3 438 * @arg @ref FMPI2C_IT_RXI RX interrupt enable
sahilmgandhi 18:6a4db94011d3 439 * @arg @ref FMPI2C_IT_TXI TX interrupt enable
sahilmgandhi 18:6a4db94011d3 440 *
sahilmgandhi 18:6a4db94011d3 441 * @retval None
sahilmgandhi 18:6a4db94011d3 442 */
sahilmgandhi 18:6a4db94011d3 443 #define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
sahilmgandhi 18:6a4db94011d3 444
sahilmgandhi 18:6a4db94011d3 445 /** @brief Check whether the specified FMPI2C interrupt source is enabled or not.
sahilmgandhi 18:6a4db94011d3 446 * @param __HANDLE__ specifies the FMPI2C Handle.
sahilmgandhi 18:6a4db94011d3 447 * @param __INTERRUPT__ specifies the FMPI2C interrupt source to check.
sahilmgandhi 18:6a4db94011d3 448 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 449 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable
sahilmgandhi 18:6a4db94011d3 450 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable
sahilmgandhi 18:6a4db94011d3 451 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable
sahilmgandhi 18:6a4db94011d3 452 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable
sahilmgandhi 18:6a4db94011d3 453 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable
sahilmgandhi 18:6a4db94011d3 454 * @arg @ref FMPI2C_IT_RXI RX interrupt enable
sahilmgandhi 18:6a4db94011d3 455 * @arg @ref FMPI2C_IT_TXI TX interrupt enable
sahilmgandhi 18:6a4db94011d3 456 *
sahilmgandhi 18:6a4db94011d3 457 * @retval The new state of __INTERRUPT__ (SET or RESET).
sahilmgandhi 18:6a4db94011d3 458 */
sahilmgandhi 18:6a4db94011d3 459 #define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
sahilmgandhi 18:6a4db94011d3 460
sahilmgandhi 18:6a4db94011d3 461 /** @brief Check whether the specified FMPI2C flag is set or not.
sahilmgandhi 18:6a4db94011d3 462 * @param __HANDLE__ specifies the FMPI2C Handle.
sahilmgandhi 18:6a4db94011d3 463 * @param __FLAG__ specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 464 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 465 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty
sahilmgandhi 18:6a4db94011d3 466 * @arg @ref FMPI2C_FLAG_TXIS Transmit interrupt status
sahilmgandhi 18:6a4db94011d3 467 * @arg @ref FMPI2C_FLAG_RXNE Receive data register not empty
sahilmgandhi 18:6a4db94011d3 468 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode)
sahilmgandhi 18:6a4db94011d3 469 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag
sahilmgandhi 18:6a4db94011d3 470 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag
sahilmgandhi 18:6a4db94011d3 471 * @arg @ref FMPI2C_FLAG_TC Transfer complete (master mode)
sahilmgandhi 18:6a4db94011d3 472 * @arg @ref FMPI2C_FLAG_TCR Transfer complete reload
sahilmgandhi 18:6a4db94011d3 473 * @arg @ref FMPI2C_FLAG_BERR Bus error
sahilmgandhi 18:6a4db94011d3 474 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost
sahilmgandhi 18:6a4db94011d3 475 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun
sahilmgandhi 18:6a4db94011d3 476 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception
sahilmgandhi 18:6a4db94011d3 477 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag
sahilmgandhi 18:6a4db94011d3 478 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert
sahilmgandhi 18:6a4db94011d3 479 * @arg @ref FMPI2C_FLAG_BUSY Bus busy
sahilmgandhi 18:6a4db94011d3 480 * @arg @ref FMPI2C_FLAG_DIR Transfer direction (slave mode)
sahilmgandhi 18:6a4db94011d3 481 *
sahilmgandhi 18:6a4db94011d3 482 * @retval The new state of __FLAG__ (SET or RESET).
sahilmgandhi 18:6a4db94011d3 483 */
sahilmgandhi 18:6a4db94011d3 484 #define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
sahilmgandhi 18:6a4db94011d3 485
sahilmgandhi 18:6a4db94011d3 486 /** @brief Clear the FMPI2C pending flags which are cleared by writing 1 in a specific bit.
sahilmgandhi 18:6a4db94011d3 487 * @param __HANDLE__ specifies the FMPI2C Handle.
sahilmgandhi 18:6a4db94011d3 488 * @param __FLAG__ specifies the flag to clear.
sahilmgandhi 18:6a4db94011d3 489 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 490 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty
sahilmgandhi 18:6a4db94011d3 491 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode)
sahilmgandhi 18:6a4db94011d3 492 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag
sahilmgandhi 18:6a4db94011d3 493 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag
sahilmgandhi 18:6a4db94011d3 494 * @arg @ref FMPI2C_FLAG_BERR Bus error
sahilmgandhi 18:6a4db94011d3 495 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost
sahilmgandhi 18:6a4db94011d3 496 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun
sahilmgandhi 18:6a4db94011d3 497 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception
sahilmgandhi 18:6a4db94011d3 498 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag
sahilmgandhi 18:6a4db94011d3 499 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert
sahilmgandhi 18:6a4db94011d3 500 *
sahilmgandhi 18:6a4db94011d3 501 * @retval None
sahilmgandhi 18:6a4db94011d3 502 */
sahilmgandhi 18:6a4db94011d3 503 #define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
sahilmgandhi 18:6a4db94011d3 504 : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
sahilmgandhi 18:6a4db94011d3 505
sahilmgandhi 18:6a4db94011d3 506 /** @brief Enable the specified FMPI2C peripheral.
sahilmgandhi 18:6a4db94011d3 507 * @param __HANDLE__ specifies the FMPI2C Handle.
sahilmgandhi 18:6a4db94011d3 508 * @retval None
sahilmgandhi 18:6a4db94011d3 509 */
sahilmgandhi 18:6a4db94011d3 510 #define __HAL_FMPI2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
sahilmgandhi 18:6a4db94011d3 511
sahilmgandhi 18:6a4db94011d3 512 /** @brief Disable the specified FMPI2C peripheral.
sahilmgandhi 18:6a4db94011d3 513 * @param __HANDLE__ specifies the FMPI2C Handle.
sahilmgandhi 18:6a4db94011d3 514 * @retval None
sahilmgandhi 18:6a4db94011d3 515 */
sahilmgandhi 18:6a4db94011d3 516 #define __HAL_FMPI2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
sahilmgandhi 18:6a4db94011d3 517
sahilmgandhi 18:6a4db94011d3 518 /** @brief Generate a Non-Acknowledge FMPI2C peripheral in Slave mode.
sahilmgandhi 18:6a4db94011d3 519 * @param __HANDLE__: specifies the FMPI2C Handle.
sahilmgandhi 18:6a4db94011d3 520 * @retval None
sahilmgandhi 18:6a4db94011d3 521 */
sahilmgandhi 18:6a4db94011d3 522 #define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK))
sahilmgandhi 18:6a4db94011d3 523 /**
sahilmgandhi 18:6a4db94011d3 524 * @}
sahilmgandhi 18:6a4db94011d3 525 */
sahilmgandhi 18:6a4db94011d3 526
sahilmgandhi 18:6a4db94011d3 527 /* Include FMPI2C HAL Extended module */
sahilmgandhi 18:6a4db94011d3 528 #include "stm32f4xx_hal_fmpi2c_ex.h"
sahilmgandhi 18:6a4db94011d3 529
sahilmgandhi 18:6a4db94011d3 530 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 531 /** @addtogroup FMPI2C_Exported_Functions
sahilmgandhi 18:6a4db94011d3 532 * @{
sahilmgandhi 18:6a4db94011d3 533 */
sahilmgandhi 18:6a4db94011d3 534
sahilmgandhi 18:6a4db94011d3 535 /** @addtogroup FMPI2C_Exported_Functions_Group1 Initialization and de-initialization functions
sahilmgandhi 18:6a4db94011d3 536 * @{
sahilmgandhi 18:6a4db94011d3 537 */
sahilmgandhi 18:6a4db94011d3 538 /* Initialization and de-initialization functions******************************/
sahilmgandhi 18:6a4db94011d3 539 HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 540 HAL_StatusTypeDef HAL_FMPI2C_DeInit (FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 541 void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 542 void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 543 /**
sahilmgandhi 18:6a4db94011d3 544 * @}
sahilmgandhi 18:6a4db94011d3 545 */
sahilmgandhi 18:6a4db94011d3 546
sahilmgandhi 18:6a4db94011d3 547 /** @addtogroup FMPI2C_Exported_Functions_Group2 Input and Output operation functions
sahilmgandhi 18:6a4db94011d3 548 * @{
sahilmgandhi 18:6a4db94011d3 549 */
sahilmgandhi 18:6a4db94011d3 550 /* IO operation functions ****************************************************/
sahilmgandhi 18:6a4db94011d3 551 /******* Blocking mode: Polling */
sahilmgandhi 18:6a4db94011d3 552 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 553 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 554 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 555 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 556 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 557 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 558 HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 559
sahilmgandhi 18:6a4db94011d3 560 /******* Non-Blocking mode: Interrupt */
sahilmgandhi 18:6a4db94011d3 561 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 562 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 563 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 564 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 565 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 566 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 567
sahilmgandhi 18:6a4db94011d3 568 HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
sahilmgandhi 18:6a4db94011d3 569 HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
sahilmgandhi 18:6a4db94011d3 570 HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
sahilmgandhi 18:6a4db94011d3 571 HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
sahilmgandhi 18:6a4db94011d3 572 HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 573 HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 574 HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress);
sahilmgandhi 18:6a4db94011d3 575
sahilmgandhi 18:6a4db94011d3 576 /******* Non-Blocking mode: DMA */
sahilmgandhi 18:6a4db94011d3 577 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 578 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 579 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 580 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 581 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 582 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 583 /**
sahilmgandhi 18:6a4db94011d3 584 * @}
sahilmgandhi 18:6a4db94011d3 585 */
sahilmgandhi 18:6a4db94011d3 586
sahilmgandhi 18:6a4db94011d3 587 /** @addtogroup FMPI2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
sahilmgandhi 18:6a4db94011d3 588 * @{
sahilmgandhi 18:6a4db94011d3 589 */
sahilmgandhi 18:6a4db94011d3 590 /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
sahilmgandhi 18:6a4db94011d3 591 void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 592 void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 593 void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 594 void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 595 void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 596 void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 597 void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
sahilmgandhi 18:6a4db94011d3 598 void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 599 void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 600 void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 601 void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 602 void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 603 /**
sahilmgandhi 18:6a4db94011d3 604 * @}
sahilmgandhi 18:6a4db94011d3 605 */
sahilmgandhi 18:6a4db94011d3 606
sahilmgandhi 18:6a4db94011d3 607 /** @addtogroup FMPI2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
sahilmgandhi 18:6a4db94011d3 608 * @{
sahilmgandhi 18:6a4db94011d3 609 */
sahilmgandhi 18:6a4db94011d3 610 /* Peripheral State, Mode and Error functions *********************************/
sahilmgandhi 18:6a4db94011d3 611 HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 612 HAL_FMPI2C_ModeTypeDef HAL_FMPI2C_GetMode(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 613 uint32_t HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi 18:6a4db94011d3 614
sahilmgandhi 18:6a4db94011d3 615 /**
sahilmgandhi 18:6a4db94011d3 616 * @}
sahilmgandhi 18:6a4db94011d3 617 */
sahilmgandhi 18:6a4db94011d3 618
sahilmgandhi 18:6a4db94011d3 619 /**
sahilmgandhi 18:6a4db94011d3 620 * @}
sahilmgandhi 18:6a4db94011d3 621 */
sahilmgandhi 18:6a4db94011d3 622
sahilmgandhi 18:6a4db94011d3 623 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 624 /** @defgroup FMPI2C_Private_Constants FMPI2C Private Constants
sahilmgandhi 18:6a4db94011d3 625 * @{
sahilmgandhi 18:6a4db94011d3 626 */
sahilmgandhi 18:6a4db94011d3 627
sahilmgandhi 18:6a4db94011d3 628 /**
sahilmgandhi 18:6a4db94011d3 629 * @}
sahilmgandhi 18:6a4db94011d3 630 */
sahilmgandhi 18:6a4db94011d3 631
sahilmgandhi 18:6a4db94011d3 632 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 633 /** @defgroup FMPI2C_Private_Macro FMPI2C Private Macros
sahilmgandhi 18:6a4db94011d3 634 * @{
sahilmgandhi 18:6a4db94011d3 635 */
sahilmgandhi 18:6a4db94011d3 636
sahilmgandhi 18:6a4db94011d3 637 #define IS_FMPI2C_ADDRESSING_MODE(MODE) (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \
sahilmgandhi 18:6a4db94011d3 638 ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT))
sahilmgandhi 18:6a4db94011d3 639
sahilmgandhi 18:6a4db94011d3 640 #define IS_FMPI2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 641 ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE))
sahilmgandhi 18:6a4db94011d3 642
sahilmgandhi 18:6a4db94011d3 643 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NOMASK) || \
sahilmgandhi 18:6a4db94011d3 644 ((MASK) == FMPI2C_OA2_MASK01) || \
sahilmgandhi 18:6a4db94011d3 645 ((MASK) == FMPI2C_OA2_MASK02) || \
sahilmgandhi 18:6a4db94011d3 646 ((MASK) == FMPI2C_OA2_MASK03) || \
sahilmgandhi 18:6a4db94011d3 647 ((MASK) == FMPI2C_OA2_MASK04) || \
sahilmgandhi 18:6a4db94011d3 648 ((MASK) == FMPI2C_OA2_MASK05) || \
sahilmgandhi 18:6a4db94011d3 649 ((MASK) == FMPI2C_OA2_MASK06) || \
sahilmgandhi 18:6a4db94011d3 650 ((MASK) == FMPI2C_OA2_MASK07))
sahilmgandhi 18:6a4db94011d3 651
sahilmgandhi 18:6a4db94011d3 652 #define IS_FMPI2C_GENERAL_CALL(CALL) (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 653 ((CALL) == FMPI2C_GENERALCALL_ENABLE))
sahilmgandhi 18:6a4db94011d3 654
sahilmgandhi 18:6a4db94011d3 655 #define IS_FMPI2C_NO_STRETCH(STRETCH) (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 656 ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE))
sahilmgandhi 18:6a4db94011d3 657
sahilmgandhi 18:6a4db94011d3 658 #define IS_FMPI2C_MEMADD_SIZE(SIZE) (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \
sahilmgandhi 18:6a4db94011d3 659 ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT))
sahilmgandhi 18:6a4db94011d3 660
sahilmgandhi 18:6a4db94011d3 661 #define IS_TRANSFER_MODE(MODE) (((MODE) == FMPI2C_RELOAD_MODE) || \
sahilmgandhi 18:6a4db94011d3 662 ((MODE) == FMPI2C_AUTOEND_MODE) || \
sahilmgandhi 18:6a4db94011d3 663 ((MODE) == FMPI2C_SOFTEND_MODE))
sahilmgandhi 18:6a4db94011d3 664
sahilmgandhi 18:6a4db94011d3 665 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == FMPI2C_GENERATE_STOP) || \
sahilmgandhi 18:6a4db94011d3 666 ((REQUEST) == FMPI2C_GENERATE_START_READ) || \
sahilmgandhi 18:6a4db94011d3 667 ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \
sahilmgandhi 18:6a4db94011d3 668 ((REQUEST) == FMPI2C_NO_STARTSTOP))
sahilmgandhi 18:6a4db94011d3 669
sahilmgandhi 18:6a4db94011d3 670 #define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_FIRST_FRAME) || \
sahilmgandhi 18:6a4db94011d3 671 ((REQUEST) == FMPI2C_NEXT_FRAME) || \
sahilmgandhi 18:6a4db94011d3 672 ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \
sahilmgandhi 18:6a4db94011d3 673 ((REQUEST) == FMPI2C_LAST_FRAME))
sahilmgandhi 18:6a4db94011d3 674
sahilmgandhi 18:6a4db94011d3 675 #define FMPI2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_RD_WRN)))
sahilmgandhi 18:6a4db94011d3 676
sahilmgandhi 18:6a4db94011d3 677 #define FMPI2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) >> 16)
sahilmgandhi 18:6a4db94011d3 678 #define FMPI2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) >> 16)
sahilmgandhi 18:6a4db94011d3 679 #define FMPI2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND)
sahilmgandhi 18:6a4db94011d3 680 #define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1)
sahilmgandhi 18:6a4db94011d3 681 #define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2)
sahilmgandhi 18:6a4db94011d3 682
sahilmgandhi 18:6a4db94011d3 683 #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FFU)
sahilmgandhi 18:6a4db94011d3 684 #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
sahilmgandhi 18:6a4db94011d3 685
sahilmgandhi 18:6a4db94011d3 686 #define FMPI2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
sahilmgandhi 18:6a4db94011d3 687 #define FMPI2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
sahilmgandhi 18:6a4db94011d3 688
sahilmgandhi 18:6a4db94011d3 689 #define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & (~FMPI2C_CR2_RD_WRN)) : \
sahilmgandhi 18:6a4db94011d3 690 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START)) & (~FMPI2C_CR2_RD_WRN)))
sahilmgandhi 18:6a4db94011d3 691 /**
sahilmgandhi 18:6a4db94011d3 692 * @}
sahilmgandhi 18:6a4db94011d3 693 */
sahilmgandhi 18:6a4db94011d3 694
sahilmgandhi 18:6a4db94011d3 695 /* Private Functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 696 /** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions
sahilmgandhi 18:6a4db94011d3 697 * @{
sahilmgandhi 18:6a4db94011d3 698 */
sahilmgandhi 18:6a4db94011d3 699 /* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */
sahilmgandhi 18:6a4db94011d3 700 /**
sahilmgandhi 18:6a4db94011d3 701 * @}
sahilmgandhi 18:6a4db94011d3 702 */
sahilmgandhi 18:6a4db94011d3 703
sahilmgandhi 18:6a4db94011d3 704 /**
sahilmgandhi 18:6a4db94011d3 705 * @}
sahilmgandhi 18:6a4db94011d3 706 */
sahilmgandhi 18:6a4db94011d3 707
sahilmgandhi 18:6a4db94011d3 708 /**
sahilmgandhi 18:6a4db94011d3 709 * @}
sahilmgandhi 18:6a4db94011d3 710 */
sahilmgandhi 18:6a4db94011d3 711 #endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 712 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 713 }
sahilmgandhi 18:6a4db94011d3 714 #endif
sahilmgandhi 18:6a4db94011d3 715
sahilmgandhi 18:6a4db94011d3 716
sahilmgandhi 18:6a4db94011d3 717 #endif /* __STM32F4xx_HAL_FMPI2C_H */
sahilmgandhi 18:6a4db94011d3 718
sahilmgandhi 18:6a4db94011d3 719 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/