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mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_flash_ex.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_flash_ex.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of FLASH HAL Extension module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_HAL_FLASH_EX_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_HAL_FLASH_EX_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup FLASHEx
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup FLASHEx_Exported_Types FLASH Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief FLASH Erase structure definition
sahilmgandhi 18:6a4db94011d3 64 */
sahilmgandhi 18:6a4db94011d3 65 typedef struct
sahilmgandhi 18:6a4db94011d3 66 {
sahilmgandhi 18:6a4db94011d3 67 uint32_t TypeErase; /*!< Mass erase or sector Erase.
sahilmgandhi 18:6a4db94011d3 68 This parameter can be a value of @ref FLASHEx_Type_Erase */
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
sahilmgandhi 18:6a4db94011d3 71 This parameter must be a value of @ref FLASHEx_Banks */
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
sahilmgandhi 18:6a4db94011d3 74 This parameter must be a value of @ref FLASHEx_Sectors */
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 uint32_t NbSectors; /*!< Number of sectors to be erased.
sahilmgandhi 18:6a4db94011d3 77 This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
sahilmgandhi 18:6a4db94011d3 80 This parameter must be a value of @ref FLASHEx_Voltage_Range */
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 } FLASH_EraseInitTypeDef;
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 /**
sahilmgandhi 18:6a4db94011d3 85 * @brief FLASH Option Bytes Program structure definition
sahilmgandhi 18:6a4db94011d3 86 */
sahilmgandhi 18:6a4db94011d3 87 typedef struct
sahilmgandhi 18:6a4db94011d3 88 {
sahilmgandhi 18:6a4db94011d3 89 uint32_t OptionType; /*!< Option byte to be configured.
sahilmgandhi 18:6a4db94011d3 90 This parameter can be a value of @ref FLASHEx_Option_Type */
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 uint32_t WRPState; /*!< Write protection activation or deactivation.
sahilmgandhi 18:6a4db94011d3 93 This parameter can be a value of @ref FLASHEx_WRP_State */
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
sahilmgandhi 18:6a4db94011d3 96 The value of this parameter depend on device used within the same series */
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
sahilmgandhi 18:6a4db94011d3 99 This parameter must be a value of @ref FLASHEx_Banks */
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 uint32_t RDPLevel; /*!< Set the read protection level.
sahilmgandhi 18:6a4db94011d3 102 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 uint32_t BORLevel; /*!< Set the BOR Level.
sahilmgandhi 18:6a4db94011d3 105 This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 } FLASH_OBProgramInitTypeDef;
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 /**
sahilmgandhi 18:6a4db94011d3 112 * @brief FLASH Advanced Option Bytes Program structure definition
sahilmgandhi 18:6a4db94011d3 113 */
sahilmgandhi 18:6a4db94011d3 114 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 115 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 116 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
sahilmgandhi 18:6a4db94011d3 117 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
sahilmgandhi 18:6a4db94011d3 118 defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 119 typedef struct
sahilmgandhi 18:6a4db94011d3 120 {
sahilmgandhi 18:6a4db94011d3 121 uint32_t OptionType; /*!< Option byte to be configured for extension.
sahilmgandhi 18:6a4db94011d3 122 This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 uint32_t PCROPState; /*!< PCROP activation or deactivation.
sahilmgandhi 18:6a4db94011d3 125 This parameter can be a value of @ref FLASHEx_PCROP_State */
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 128 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 129 uint16_t Sectors; /*!< specifies the sector(s) set for PCROP.
sahilmgandhi 18:6a4db94011d3 130 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
sahilmgandhi 18:6a4db94011d3 131 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx ||\
sahilmgandhi 18:6a4db94011d3 132 STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 135 uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors.
sahilmgandhi 18:6a4db94011d3 136 This parameter must be a value of @ref FLASHEx_Banks */
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1.
sahilmgandhi 18:6a4db94011d3 139 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
sahilmgandhi 18:6a4db94011d3 140
sahilmgandhi 18:6a4db94011d3 141 uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2.
sahilmgandhi 18:6a4db94011d3 142 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 uint8_t BootConfig; /*!< Specifies Option bytes for boot config.
sahilmgandhi 18:6a4db94011d3 145 This parameter can be a value of @ref FLASHEx_Dual_Boot */
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 #endif /*STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 148 }FLASH_AdvOBProgramInitTypeDef;
sahilmgandhi 18:6a4db94011d3 149 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 150 /**
sahilmgandhi 18:6a4db94011d3 151 * @}
sahilmgandhi 18:6a4db94011d3 152 */
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 155
sahilmgandhi 18:6a4db94011d3 156 /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants
sahilmgandhi 18:6a4db94011d3 157 * @{
sahilmgandhi 18:6a4db94011d3 158 */
sahilmgandhi 18:6a4db94011d3 159
sahilmgandhi 18:6a4db94011d3 160 /** @defgroup FLASHEx_Type_Erase FLASH Type Erase
sahilmgandhi 18:6a4db94011d3 161 * @{
sahilmgandhi 18:6a4db94011d3 162 */
sahilmgandhi 18:6a4db94011d3 163 #define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00U) /*!< Sectors erase only */
sahilmgandhi 18:6a4db94011d3 164 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01U) /*!< Flash Mass erase activation */
sahilmgandhi 18:6a4db94011d3 165 /**
sahilmgandhi 18:6a4db94011d3 166 * @}
sahilmgandhi 18:6a4db94011d3 167 */
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
sahilmgandhi 18:6a4db94011d3 170 * @{
sahilmgandhi 18:6a4db94011d3 171 */
sahilmgandhi 18:6a4db94011d3 172 #define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00U) /*!< Device operating range: 1.8V to 2.1V */
sahilmgandhi 18:6a4db94011d3 173 #define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01U) /*!< Device operating range: 2.1V to 2.7V */
sahilmgandhi 18:6a4db94011d3 174 #define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02U) /*!< Device operating range: 2.7V to 3.6V */
sahilmgandhi 18:6a4db94011d3 175 #define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03U) /*!< Device operating range: 2.7V to 3.6V + External Vpp */
sahilmgandhi 18:6a4db94011d3 176 /**
sahilmgandhi 18:6a4db94011d3 177 * @}
sahilmgandhi 18:6a4db94011d3 178 */
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 /** @defgroup FLASHEx_WRP_State FLASH WRP State
sahilmgandhi 18:6a4db94011d3 181 * @{
sahilmgandhi 18:6a4db94011d3 182 */
sahilmgandhi 18:6a4db94011d3 183 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00U) /*!< Disable the write protection of the desired bank 1 sectors */
sahilmgandhi 18:6a4db94011d3 184 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01U) /*!< Enable the write protection of the desired bank 1 sectors */
sahilmgandhi 18:6a4db94011d3 185 /**
sahilmgandhi 18:6a4db94011d3 186 * @}
sahilmgandhi 18:6a4db94011d3 187 */
sahilmgandhi 18:6a4db94011d3 188
sahilmgandhi 18:6a4db94011d3 189 /** @defgroup FLASHEx_Option_Type FLASH Option Type
sahilmgandhi 18:6a4db94011d3 190 * @{
sahilmgandhi 18:6a4db94011d3 191 */
sahilmgandhi 18:6a4db94011d3 192 #define OPTIONBYTE_WRP ((uint32_t)0x01U) /*!< WRP option byte configuration */
sahilmgandhi 18:6a4db94011d3 193 #define OPTIONBYTE_RDP ((uint32_t)0x02U) /*!< RDP option byte configuration */
sahilmgandhi 18:6a4db94011d3 194 #define OPTIONBYTE_USER ((uint32_t)0x04U) /*!< USER option byte configuration */
sahilmgandhi 18:6a4db94011d3 195 #define OPTIONBYTE_BOR ((uint32_t)0x08U) /*!< BOR option byte configuration */
sahilmgandhi 18:6a4db94011d3 196 /**
sahilmgandhi 18:6a4db94011d3 197 * @}
sahilmgandhi 18:6a4db94011d3 198 */
sahilmgandhi 18:6a4db94011d3 199
sahilmgandhi 18:6a4db94011d3 200 /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
sahilmgandhi 18:6a4db94011d3 201 * @{
sahilmgandhi 18:6a4db94011d3 202 */
sahilmgandhi 18:6a4db94011d3 203 #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU)
sahilmgandhi 18:6a4db94011d3 204 #define OB_RDP_LEVEL_1 ((uint8_t)0x55U)
sahilmgandhi 18:6a4db94011d3 205 #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /*!< Warning: When enabling read protection level 2
sahilmgandhi 18:6a4db94011d3 206 it s no more possible to go back to level 1 or 0 */
sahilmgandhi 18:6a4db94011d3 207 /**
sahilmgandhi 18:6a4db94011d3 208 * @}
sahilmgandhi 18:6a4db94011d3 209 */
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
sahilmgandhi 18:6a4db94011d3 212 * @{
sahilmgandhi 18:6a4db94011d3 213 */
sahilmgandhi 18:6a4db94011d3 214 #define OB_IWDG_SW ((uint8_t)0x20U) /*!< Software IWDG selected */
sahilmgandhi 18:6a4db94011d3 215 #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware IWDG selected */
sahilmgandhi 18:6a4db94011d3 216 /**
sahilmgandhi 18:6a4db94011d3 217 * @}
sahilmgandhi 18:6a4db94011d3 218 */
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
sahilmgandhi 18:6a4db94011d3 221 * @{
sahilmgandhi 18:6a4db94011d3 222 */
sahilmgandhi 18:6a4db94011d3 223 #define OB_STOP_NO_RST ((uint8_t)0x40U) /*!< No reset generated when entering in STOP */
sahilmgandhi 18:6a4db94011d3 224 #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */
sahilmgandhi 18:6a4db94011d3 225 /**
sahilmgandhi 18:6a4db94011d3 226 * @}
sahilmgandhi 18:6a4db94011d3 227 */
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229
sahilmgandhi 18:6a4db94011d3 230 /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
sahilmgandhi 18:6a4db94011d3 231 * @{
sahilmgandhi 18:6a4db94011d3 232 */
sahilmgandhi 18:6a4db94011d3 233 #define OB_STDBY_NO_RST ((uint8_t)0x80U) /*!< No reset generated when entering in STANDBY */
sahilmgandhi 18:6a4db94011d3 234 #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */
sahilmgandhi 18:6a4db94011d3 235 /**
sahilmgandhi 18:6a4db94011d3 236 * @}
sahilmgandhi 18:6a4db94011d3 237 */
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
sahilmgandhi 18:6a4db94011d3 240 * @{
sahilmgandhi 18:6a4db94011d3 241 */
sahilmgandhi 18:6a4db94011d3 242 #define OB_BOR_LEVEL3 ((uint8_t)0x00U) /*!< Supply voltage ranges from 2.70 to 3.60 V */
sahilmgandhi 18:6a4db94011d3 243 #define OB_BOR_LEVEL2 ((uint8_t)0x04U) /*!< Supply voltage ranges from 2.40 to 2.70 V */
sahilmgandhi 18:6a4db94011d3 244 #define OB_BOR_LEVEL1 ((uint8_t)0x08U) /*!< Supply voltage ranges from 2.10 to 2.40 V */
sahilmgandhi 18:6a4db94011d3 245 #define OB_BOR_OFF ((uint8_t)0x0CU) /*!< Supply voltage ranges from 1.62 to 2.10 V */
sahilmgandhi 18:6a4db94011d3 246 /**
sahilmgandhi 18:6a4db94011d3 247 * @}
sahilmgandhi 18:6a4db94011d3 248 */
sahilmgandhi 18:6a4db94011d3 249
sahilmgandhi 18:6a4db94011d3 250 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 251 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 252 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
sahilmgandhi 18:6a4db94011d3 253 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
sahilmgandhi 18:6a4db94011d3 254 defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 255 /** @defgroup FLASHEx_PCROP_State FLASH PCROP State
sahilmgandhi 18:6a4db94011d3 256 * @{
sahilmgandhi 18:6a4db94011d3 257 */
sahilmgandhi 18:6a4db94011d3 258 #define OB_PCROP_STATE_DISABLE ((uint32_t)0x00U) /*!< Disable PCROP */
sahilmgandhi 18:6a4db94011d3 259 #define OB_PCROP_STATE_ENABLE ((uint32_t)0x01U) /*!< Enable PCROP */
sahilmgandhi 18:6a4db94011d3 260 /**
sahilmgandhi 18:6a4db94011d3 261 * @}
sahilmgandhi 18:6a4db94011d3 262 */
sahilmgandhi 18:6a4db94011d3 263 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
sahilmgandhi 18:6a4db94011d3 264 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
sahilmgandhi 18:6a4db94011d3 265 STM32F412Vx) || defined(STM32F412Rx) ||\
sahilmgandhi 18:6a4db94011d3 266 STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 267
sahilmgandhi 18:6a4db94011d3 268 /** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type
sahilmgandhi 18:6a4db94011d3 269 * @{
sahilmgandhi 18:6a4db94011d3 270 */
sahilmgandhi 18:6a4db94011d3 271 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 272 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 273 #define OPTIONBYTE_PCROP ((uint32_t)0x01U) /*!< PCROP option byte configuration */
sahilmgandhi 18:6a4db94011d3 274 #define OPTIONBYTE_BOOTCONFIG ((uint32_t)0x02U) /*!< BOOTConfig option byte configuration */
sahilmgandhi 18:6a4db94011d3 275 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 278 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 279 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 280 #define OPTIONBYTE_PCROP ((uint32_t)0x01U) /*!<PCROP option byte configuration */
sahilmgandhi 18:6a4db94011d3 281 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 282 /**
sahilmgandhi 18:6a4db94011d3 283 * @}
sahilmgandhi 18:6a4db94011d3 284 */
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 /** @defgroup FLASH_Latency FLASH Latency
sahilmgandhi 18:6a4db94011d3 287 * @{
sahilmgandhi 18:6a4db94011d3 288 */
sahilmgandhi 18:6a4db94011d3 289 /*------------------------- STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479xx ----------------------*/
sahilmgandhi 18:6a4db94011d3 290 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 291 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 292 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
sahilmgandhi 18:6a4db94011d3 293 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
sahilmgandhi 18:6a4db94011d3 294 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
sahilmgandhi 18:6a4db94011d3 295 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
sahilmgandhi 18:6a4db94011d3 296 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
sahilmgandhi 18:6a4db94011d3 297 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
sahilmgandhi 18:6a4db94011d3 298 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
sahilmgandhi 18:6a4db94011d3 299 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
sahilmgandhi 18:6a4db94011d3 300 #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */
sahilmgandhi 18:6a4db94011d3 301 #define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */
sahilmgandhi 18:6a4db94011d3 302 #define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */
sahilmgandhi 18:6a4db94011d3 303 #define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */
sahilmgandhi 18:6a4db94011d3 304 #define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */
sahilmgandhi 18:6a4db94011d3 305 #define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */
sahilmgandhi 18:6a4db94011d3 306 #define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */
sahilmgandhi 18:6a4db94011d3 307 #define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */
sahilmgandhi 18:6a4db94011d3 308 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 309 /*--------------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 310
sahilmgandhi 18:6a4db94011d3 311 /*-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx -----------------------------------*/
sahilmgandhi 18:6a4db94011d3 312 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
sahilmgandhi 18:6a4db94011d3 313 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 314 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
sahilmgandhi 18:6a4db94011d3 315 defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 316
sahilmgandhi 18:6a4db94011d3 317 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
sahilmgandhi 18:6a4db94011d3 318 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
sahilmgandhi 18:6a4db94011d3 319 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
sahilmgandhi 18:6a4db94011d3 320 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
sahilmgandhi 18:6a4db94011d3 321 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
sahilmgandhi 18:6a4db94011d3 322 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
sahilmgandhi 18:6a4db94011d3 323 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
sahilmgandhi 18:6a4db94011d3 324 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
sahilmgandhi 18:6a4db94011d3 325 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 326 /*--------------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 327
sahilmgandhi 18:6a4db94011d3 328 /**
sahilmgandhi 18:6a4db94011d3 329 * @}
sahilmgandhi 18:6a4db94011d3 330 */
sahilmgandhi 18:6a4db94011d3 331
sahilmgandhi 18:6a4db94011d3 332
sahilmgandhi 18:6a4db94011d3 333 /** @defgroup FLASHEx_Banks FLASH Banks
sahilmgandhi 18:6a4db94011d3 334 * @{
sahilmgandhi 18:6a4db94011d3 335 */
sahilmgandhi 18:6a4db94011d3 336 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 337 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 338 #define FLASH_BANK_1 ((uint32_t)1U) /*!< Bank 1 */
sahilmgandhi 18:6a4db94011d3 339 #define FLASH_BANK_2 ((uint32_t)2U) /*!< Bank 2 */
sahilmgandhi 18:6a4db94011d3 340 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */
sahilmgandhi 18:6a4db94011d3 341 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 342
sahilmgandhi 18:6a4db94011d3 343 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
sahilmgandhi 18:6a4db94011d3 344 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 345 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 346 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 347 #define FLASH_BANK_1 ((uint32_t)1U) /*!< Bank 1 */
sahilmgandhi 18:6a4db94011d3 348 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 349 /**
sahilmgandhi 18:6a4db94011d3 350 * @}
sahilmgandhi 18:6a4db94011d3 351 */
sahilmgandhi 18:6a4db94011d3 352
sahilmgandhi 18:6a4db94011d3 353 /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
sahilmgandhi 18:6a4db94011d3 354 * @{
sahilmgandhi 18:6a4db94011d3 355 */
sahilmgandhi 18:6a4db94011d3 356 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 357 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 358 #define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits here to clear */
sahilmgandhi 18:6a4db94011d3 359 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 360
sahilmgandhi 18:6a4db94011d3 361 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
sahilmgandhi 18:6a4db94011d3 362 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 363 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 364 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 365 #define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */
sahilmgandhi 18:6a4db94011d3 366 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 367 /**
sahilmgandhi 18:6a4db94011d3 368 * @}
sahilmgandhi 18:6a4db94011d3 369 */
sahilmgandhi 18:6a4db94011d3 370
sahilmgandhi 18:6a4db94011d3 371 /** @defgroup FLASHEx_Sectors FLASH Sectors
sahilmgandhi 18:6a4db94011d3 372 * @{
sahilmgandhi 18:6a4db94011d3 373 */
sahilmgandhi 18:6a4db94011d3 374 /*-------------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx ------------------------------------*/
sahilmgandhi 18:6a4db94011d3 375 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 376 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 377 #define FLASH_SECTOR_0 ((uint32_t)0U) /*!< Sector Number 0 */
sahilmgandhi 18:6a4db94011d3 378 #define FLASH_SECTOR_1 ((uint32_t)1U) /*!< Sector Number 1 */
sahilmgandhi 18:6a4db94011d3 379 #define FLASH_SECTOR_2 ((uint32_t)2U) /*!< Sector Number 2 */
sahilmgandhi 18:6a4db94011d3 380 #define FLASH_SECTOR_3 ((uint32_t)3U) /*!< Sector Number 3 */
sahilmgandhi 18:6a4db94011d3 381 #define FLASH_SECTOR_4 ((uint32_t)4U) /*!< Sector Number 4 */
sahilmgandhi 18:6a4db94011d3 382 #define FLASH_SECTOR_5 ((uint32_t)5U) /*!< Sector Number 5 */
sahilmgandhi 18:6a4db94011d3 383 #define FLASH_SECTOR_6 ((uint32_t)6U) /*!< Sector Number 6 */
sahilmgandhi 18:6a4db94011d3 384 #define FLASH_SECTOR_7 ((uint32_t)7U) /*!< Sector Number 7 */
sahilmgandhi 18:6a4db94011d3 385 #define FLASH_SECTOR_8 ((uint32_t)8U) /*!< Sector Number 8 */
sahilmgandhi 18:6a4db94011d3 386 #define FLASH_SECTOR_9 ((uint32_t)9U) /*!< Sector Number 9 */
sahilmgandhi 18:6a4db94011d3 387 #define FLASH_SECTOR_10 ((uint32_t)10U) /*!< Sector Number 10 */
sahilmgandhi 18:6a4db94011d3 388 #define FLASH_SECTOR_11 ((uint32_t)11U) /*!< Sector Number 11 */
sahilmgandhi 18:6a4db94011d3 389 #define FLASH_SECTOR_12 ((uint32_t)12U) /*!< Sector Number 12 */
sahilmgandhi 18:6a4db94011d3 390 #define FLASH_SECTOR_13 ((uint32_t)13U) /*!< Sector Number 13 */
sahilmgandhi 18:6a4db94011d3 391 #define FLASH_SECTOR_14 ((uint32_t)14U) /*!< Sector Number 14 */
sahilmgandhi 18:6a4db94011d3 392 #define FLASH_SECTOR_15 ((uint32_t)15U) /*!< Sector Number 15 */
sahilmgandhi 18:6a4db94011d3 393 #define FLASH_SECTOR_16 ((uint32_t)16U) /*!< Sector Number 16 */
sahilmgandhi 18:6a4db94011d3 394 #define FLASH_SECTOR_17 ((uint32_t)17U) /*!< Sector Number 17 */
sahilmgandhi 18:6a4db94011d3 395 #define FLASH_SECTOR_18 ((uint32_t)18U) /*!< Sector Number 18 */
sahilmgandhi 18:6a4db94011d3 396 #define FLASH_SECTOR_19 ((uint32_t)19U) /*!< Sector Number 19 */
sahilmgandhi 18:6a4db94011d3 397 #define FLASH_SECTOR_20 ((uint32_t)20U) /*!< Sector Number 20 */
sahilmgandhi 18:6a4db94011d3 398 #define FLASH_SECTOR_21 ((uint32_t)21U) /*!< Sector Number 21 */
sahilmgandhi 18:6a4db94011d3 399 #define FLASH_SECTOR_22 ((uint32_t)22U) /*!< Sector Number 22 */
sahilmgandhi 18:6a4db94011d3 400 #define FLASH_SECTOR_23 ((uint32_t)23U) /*!< Sector Number 23 */
sahilmgandhi 18:6a4db94011d3 401 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 402 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 403
sahilmgandhi 18:6a4db94011d3 404 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 405 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 406 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 407 #define FLASH_SECTOR_0 ((uint32_t)0U) /*!< Sector Number 0 */
sahilmgandhi 18:6a4db94011d3 408 #define FLASH_SECTOR_1 ((uint32_t)1U) /*!< Sector Number 1 */
sahilmgandhi 18:6a4db94011d3 409 #define FLASH_SECTOR_2 ((uint32_t)2U) /*!< Sector Number 2 */
sahilmgandhi 18:6a4db94011d3 410 #define FLASH_SECTOR_3 ((uint32_t)3U) /*!< Sector Number 3 */
sahilmgandhi 18:6a4db94011d3 411 #define FLASH_SECTOR_4 ((uint32_t)4U) /*!< Sector Number 4 */
sahilmgandhi 18:6a4db94011d3 412 #define FLASH_SECTOR_5 ((uint32_t)5U) /*!< Sector Number 5 */
sahilmgandhi 18:6a4db94011d3 413 #define FLASH_SECTOR_6 ((uint32_t)6U) /*!< Sector Number 6 */
sahilmgandhi 18:6a4db94011d3 414 #define FLASH_SECTOR_7 ((uint32_t)7U) /*!< Sector Number 7 */
sahilmgandhi 18:6a4db94011d3 415 #define FLASH_SECTOR_8 ((uint32_t)8U) /*!< Sector Number 8 */
sahilmgandhi 18:6a4db94011d3 416 #define FLASH_SECTOR_9 ((uint32_t)9U) /*!< Sector Number 9 */
sahilmgandhi 18:6a4db94011d3 417 #define FLASH_SECTOR_10 ((uint32_t)10U) /*!< Sector Number 10 */
sahilmgandhi 18:6a4db94011d3 418 #define FLASH_SECTOR_11 ((uint32_t)11U) /*!< Sector Number 11 */
sahilmgandhi 18:6a4db94011d3 419 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 420 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 421
sahilmgandhi 18:6a4db94011d3 422 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 423 #if defined(STM32F401xC)
sahilmgandhi 18:6a4db94011d3 424 #define FLASH_SECTOR_0 ((uint32_t)0U) /*!< Sector Number 0 */
sahilmgandhi 18:6a4db94011d3 425 #define FLASH_SECTOR_1 ((uint32_t)1U) /*!< Sector Number 1 */
sahilmgandhi 18:6a4db94011d3 426 #define FLASH_SECTOR_2 ((uint32_t)2U) /*!< Sector Number 2 */
sahilmgandhi 18:6a4db94011d3 427 #define FLASH_SECTOR_3 ((uint32_t)3U) /*!< Sector Number 3 */
sahilmgandhi 18:6a4db94011d3 428 #define FLASH_SECTOR_4 ((uint32_t)4U) /*!< Sector Number 4 */
sahilmgandhi 18:6a4db94011d3 429 #define FLASH_SECTOR_5 ((uint32_t)5U) /*!< Sector Number 5 */
sahilmgandhi 18:6a4db94011d3 430 #endif /* STM32F401xC */
sahilmgandhi 18:6a4db94011d3 431 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 432
sahilmgandhi 18:6a4db94011d3 433 /*--------------------------------------------- STM32F410xx -------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 434 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 435 #define FLASH_SECTOR_0 ((uint32_t)0U) /*!< Sector Number 0 */
sahilmgandhi 18:6a4db94011d3 436 #define FLASH_SECTOR_1 ((uint32_t)1U) /*!< Sector Number 1 */
sahilmgandhi 18:6a4db94011d3 437 #define FLASH_SECTOR_2 ((uint32_t)2U) /*!< Sector Number 2 */
sahilmgandhi 18:6a4db94011d3 438 #define FLASH_SECTOR_3 ((uint32_t)3U) /*!< Sector Number 3 */
sahilmgandhi 18:6a4db94011d3 439 #define FLASH_SECTOR_4 ((uint32_t)4U) /*!< Sector Number 4 */
sahilmgandhi 18:6a4db94011d3 440 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 441 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 442
sahilmgandhi 18:6a4db94011d3 443 /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/
sahilmgandhi 18:6a4db94011d3 444 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
sahilmgandhi 18:6a4db94011d3 445 #define FLASH_SECTOR_0 ((uint32_t)0U) /*!< Sector Number 0 */
sahilmgandhi 18:6a4db94011d3 446 #define FLASH_SECTOR_1 ((uint32_t)1U) /*!< Sector Number 1 */
sahilmgandhi 18:6a4db94011d3 447 #define FLASH_SECTOR_2 ((uint32_t)2U) /*!< Sector Number 2 */
sahilmgandhi 18:6a4db94011d3 448 #define FLASH_SECTOR_3 ((uint32_t)3U) /*!< Sector Number 3 */
sahilmgandhi 18:6a4db94011d3 449 #define FLASH_SECTOR_4 ((uint32_t)4U) /*!< Sector Number 4 */
sahilmgandhi 18:6a4db94011d3 450 #define FLASH_SECTOR_5 ((uint32_t)5U) /*!< Sector Number 5 */
sahilmgandhi 18:6a4db94011d3 451 #define FLASH_SECTOR_6 ((uint32_t)6U) /*!< Sector Number 6 */
sahilmgandhi 18:6a4db94011d3 452 #define FLASH_SECTOR_7 ((uint32_t)7U) /*!< Sector Number 7 */
sahilmgandhi 18:6a4db94011d3 453 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */
sahilmgandhi 18:6a4db94011d3 454 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 455
sahilmgandhi 18:6a4db94011d3 456 /**
sahilmgandhi 18:6a4db94011d3 457 * @}
sahilmgandhi 18:6a4db94011d3 458 */
sahilmgandhi 18:6a4db94011d3 459
sahilmgandhi 18:6a4db94011d3 460 /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
sahilmgandhi 18:6a4db94011d3 461 * @{
sahilmgandhi 18:6a4db94011d3 462 */
sahilmgandhi 18:6a4db94011d3 463 /*--------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx -------------------------*/
sahilmgandhi 18:6a4db94011d3 464 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 465 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 466 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001U) /*!< Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 467 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002U) /*!< Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 468 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004U) /*!< Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 469 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008U) /*!< Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 470 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010U) /*!< Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 471 #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020U) /*!< Write protection of Sector5 */
sahilmgandhi 18:6a4db94011d3 472 #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040U) /*!< Write protection of Sector6 */
sahilmgandhi 18:6a4db94011d3 473 #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080U) /*!< Write protection of Sector7 */
sahilmgandhi 18:6a4db94011d3 474 #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100U) /*!< Write protection of Sector8 */
sahilmgandhi 18:6a4db94011d3 475 #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200U) /*!< Write protection of Sector9 */
sahilmgandhi 18:6a4db94011d3 476 #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400U) /*!< Write protection of Sector10 */
sahilmgandhi 18:6a4db94011d3 477 #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800U) /*!< Write protection of Sector11 */
sahilmgandhi 18:6a4db94011d3 478 #define OB_WRP_SECTOR_12 ((uint32_t)0x00000001U << 12) /*!< Write protection of Sector12 */
sahilmgandhi 18:6a4db94011d3 479 #define OB_WRP_SECTOR_13 ((uint32_t)0x00000002U << 12) /*!< Write protection of Sector13 */
sahilmgandhi 18:6a4db94011d3 480 #define OB_WRP_SECTOR_14 ((uint32_t)0x00000004U << 12) /*!< Write protection of Sector14 */
sahilmgandhi 18:6a4db94011d3 481 #define OB_WRP_SECTOR_15 ((uint32_t)0x00000008U << 12) /*!< Write protection of Sector15 */
sahilmgandhi 18:6a4db94011d3 482 #define OB_WRP_SECTOR_16 ((uint32_t)0x00000010U << 12) /*!< Write protection of Sector16 */
sahilmgandhi 18:6a4db94011d3 483 #define OB_WRP_SECTOR_17 ((uint32_t)0x00000020U << 12) /*!< Write protection of Sector17 */
sahilmgandhi 18:6a4db94011d3 484 #define OB_WRP_SECTOR_18 ((uint32_t)0x00000040U << 12) /*!< Write protection of Sector18 */
sahilmgandhi 18:6a4db94011d3 485 #define OB_WRP_SECTOR_19 ((uint32_t)0x00000080U << 12) /*!< Write protection of Sector19 */
sahilmgandhi 18:6a4db94011d3 486 #define OB_WRP_SECTOR_20 ((uint32_t)0x00000100U << 12) /*!< Write protection of Sector20 */
sahilmgandhi 18:6a4db94011d3 487 #define OB_WRP_SECTOR_21 ((uint32_t)0x00000200U << 12) /*!< Write protection of Sector21 */
sahilmgandhi 18:6a4db94011d3 488 #define OB_WRP_SECTOR_22 ((uint32_t)0x00000400U << 12) /*!< Write protection of Sector22 */
sahilmgandhi 18:6a4db94011d3 489 #define OB_WRP_SECTOR_23 ((uint32_t)0x00000800U << 12) /*!< Write protection of Sector23 */
sahilmgandhi 18:6a4db94011d3 490 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFFU << 12) /*!< Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 491 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 492 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 493
sahilmgandhi 18:6a4db94011d3 494 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 495 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 496 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 497 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001U) /*!< Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 498 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002U) /*!< Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 499 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004U) /*!< Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 500 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008U) /*!< Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 501 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010U) /*!< Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 502 #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020U) /*!< Write protection of Sector5 */
sahilmgandhi 18:6a4db94011d3 503 #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040U) /*!< Write protection of Sector6 */
sahilmgandhi 18:6a4db94011d3 504 #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080U) /*!< Write protection of Sector7 */
sahilmgandhi 18:6a4db94011d3 505 #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100U) /*!< Write protection of Sector8 */
sahilmgandhi 18:6a4db94011d3 506 #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200U) /*!< Write protection of Sector9 */
sahilmgandhi 18:6a4db94011d3 507 #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400U) /*!< Write protection of Sector10 */
sahilmgandhi 18:6a4db94011d3 508 #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800U) /*!< Write protection of Sector11 */
sahilmgandhi 18:6a4db94011d3 509 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFFU) /*!< Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 510 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 511 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 512
sahilmgandhi 18:6a4db94011d3 513 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 514 #if defined(STM32F401xC)
sahilmgandhi 18:6a4db94011d3 515 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001U) /*!< Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 516 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002U) /*!< Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 517 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004U) /*!< Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 518 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008U) /*!< Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 519 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010U) /*!< Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 520 #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020U) /*!< Write protection of Sector5 */
sahilmgandhi 18:6a4db94011d3 521 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFFU) /*!< Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 522 #endif /* STM32F401xC */
sahilmgandhi 18:6a4db94011d3 523 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 524
sahilmgandhi 18:6a4db94011d3 525 /*--------------------------------------------- STM32F410xx -------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 526 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 527 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001U) /*!< Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 528 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002U) /*!< Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 529 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004U) /*!< Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 530 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008U) /*!< Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 531 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010U) /*!< Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 532 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFFU) /*!< Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 533 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 534 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 535
sahilmgandhi 18:6a4db94011d3 536 /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/
sahilmgandhi 18:6a4db94011d3 537 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
sahilmgandhi 18:6a4db94011d3 538 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001U) /*!< Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 539 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002U) /*!< Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 540 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004U) /*!< Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 541 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008U) /*!< Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 542 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010U) /*!< Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 543 #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020U) /*!< Write protection of Sector5 */
sahilmgandhi 18:6a4db94011d3 544 #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040U) /*!< Write protection of Sector6 */
sahilmgandhi 18:6a4db94011d3 545 #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080U) /*!< Write protection of Sector7 */
sahilmgandhi 18:6a4db94011d3 546 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFFU) /*!< Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 547 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */
sahilmgandhi 18:6a4db94011d3 548 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 549 /**
sahilmgandhi 18:6a4db94011d3 550 * @}
sahilmgandhi 18:6a4db94011d3 551 */
sahilmgandhi 18:6a4db94011d3 552
sahilmgandhi 18:6a4db94011d3 553 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection
sahilmgandhi 18:6a4db94011d3 554 * @{
sahilmgandhi 18:6a4db94011d3 555 */
sahilmgandhi 18:6a4db94011d3 556 /*-------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx ---------------------------*/
sahilmgandhi 18:6a4db94011d3 557 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 558 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 559 #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001U) /*!< PC Read/Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 560 #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002U) /*!< PC Read/Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 561 #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004U) /*!< PC Read/Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 562 #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008U) /*!< PC Read/Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 563 #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010U) /*!< PC Read/Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 564 #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020U) /*!< PC Read/Write protection of Sector5 */
sahilmgandhi 18:6a4db94011d3 565 #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040U) /*!< PC Read/Write protection of Sector6 */
sahilmgandhi 18:6a4db94011d3 566 #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080U) /*!< PC Read/Write protection of Sector7 */
sahilmgandhi 18:6a4db94011d3 567 #define OB_PCROP_SECTOR_8 ((uint32_t)0x00000100U) /*!< PC Read/Write protection of Sector8 */
sahilmgandhi 18:6a4db94011d3 568 #define OB_PCROP_SECTOR_9 ((uint32_t)0x00000200U) /*!< PC Read/Write protection of Sector9 */
sahilmgandhi 18:6a4db94011d3 569 #define OB_PCROP_SECTOR_10 ((uint32_t)0x00000400U) /*!< PC Read/Write protection of Sector10 */
sahilmgandhi 18:6a4db94011d3 570 #define OB_PCROP_SECTOR_11 ((uint32_t)0x00000800U) /*!< PC Read/Write protection of Sector11 */
sahilmgandhi 18:6a4db94011d3 571 #define OB_PCROP_SECTOR_12 ((uint32_t)0x00000001U) /*!< PC Read/Write protection of Sector12 */
sahilmgandhi 18:6a4db94011d3 572 #define OB_PCROP_SECTOR_13 ((uint32_t)0x00000002U) /*!< PC Read/Write protection of Sector13 */
sahilmgandhi 18:6a4db94011d3 573 #define OB_PCROP_SECTOR_14 ((uint32_t)0x00000004U) /*!< PC Read/Write protection of Sector14 */
sahilmgandhi 18:6a4db94011d3 574 #define OB_PCROP_SECTOR_15 ((uint32_t)0x00000008U) /*!< PC Read/Write protection of Sector15 */
sahilmgandhi 18:6a4db94011d3 575 #define OB_PCROP_SECTOR_16 ((uint32_t)0x00000010U) /*!< PC Read/Write protection of Sector16 */
sahilmgandhi 18:6a4db94011d3 576 #define OB_PCROP_SECTOR_17 ((uint32_t)0x00000020U) /*!< PC Read/Write protection of Sector17 */
sahilmgandhi 18:6a4db94011d3 577 #define OB_PCROP_SECTOR_18 ((uint32_t)0x00000040U) /*!< PC Read/Write protection of Sector18 */
sahilmgandhi 18:6a4db94011d3 578 #define OB_PCROP_SECTOR_19 ((uint32_t)0x00000080U) /*!< PC Read/Write protection of Sector19 */
sahilmgandhi 18:6a4db94011d3 579 #define OB_PCROP_SECTOR_20 ((uint32_t)0x00000100U) /*!< PC Read/Write protection of Sector20 */
sahilmgandhi 18:6a4db94011d3 580 #define OB_PCROP_SECTOR_21 ((uint32_t)0x00000200U) /*!< PC Read/Write protection of Sector21 */
sahilmgandhi 18:6a4db94011d3 581 #define OB_PCROP_SECTOR_22 ((uint32_t)0x00000400U) /*!< PC Read/Write protection of Sector22 */
sahilmgandhi 18:6a4db94011d3 582 #define OB_PCROP_SECTOR_23 ((uint32_t)0x00000800U) /*!< PC Read/Write protection of Sector23 */
sahilmgandhi 18:6a4db94011d3 583 #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFFU) /*!< PC Read/Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 584 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 585 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 586
sahilmgandhi 18:6a4db94011d3 587 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 588 #if defined(STM32F401xC)
sahilmgandhi 18:6a4db94011d3 589 #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001U) /*!< PC Read/Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 590 #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002U) /*!< PC Read/Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 591 #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004U) /*!< PC Read/Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 592 #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008U) /*!< PC Read/Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 593 #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010U) /*!< PC Read/Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 594 #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020U) /*!< PC Read/Write protection of Sector5 */
sahilmgandhi 18:6a4db94011d3 595 #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFFU) /*!< PC Read/Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 596 #endif /* STM32F401xC */
sahilmgandhi 18:6a4db94011d3 597 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 598
sahilmgandhi 18:6a4db94011d3 599 /*--------------------------------------------- STM32F410xx -------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 600 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 601 #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001U) /*!< PC Read/Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 602 #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002U) /*!< PC Read/Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 603 #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004U) /*!< PC Read/Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 604 #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008U) /*!< PC Read/Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 605 #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010U) /*!< PC Read/Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 606 #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFFU) /*!< PC Read/Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 607 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 608 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 609
sahilmgandhi 18:6a4db94011d3 610 /*-------------- STM32F401xE/STM32F411xE/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/STM32F446xx --*/
sahilmgandhi 18:6a4db94011d3 611 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 612 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 613 #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001U) /*!< PC Read/Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 614 #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002U) /*!< PC Read/Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 615 #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004U) /*!< PC Read/Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 616 #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008U) /*!< PC Read/Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 617 #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010U) /*!< PC Read/Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 618 #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020U) /*!< PC Read/Write protection of Sector5 */
sahilmgandhi 18:6a4db94011d3 619 #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040U) /*!< PC Read/Write protection of Sector6 */
sahilmgandhi 18:6a4db94011d3 620 #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080U) /*!< PC Read/Write protection of Sector7 */
sahilmgandhi 18:6a4db94011d3 621 #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFFU) /*!< PC Read/Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 622 #endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 623 /*-----------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 624
sahilmgandhi 18:6a4db94011d3 625 /**
sahilmgandhi 18:6a4db94011d3 626 * @}
sahilmgandhi 18:6a4db94011d3 627 */
sahilmgandhi 18:6a4db94011d3 628
sahilmgandhi 18:6a4db94011d3 629 /** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot
sahilmgandhi 18:6a4db94011d3 630 * @{
sahilmgandhi 18:6a4db94011d3 631 */
sahilmgandhi 18:6a4db94011d3 632 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 633 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 634 #define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10U) /*!< Dual Bank Boot Enable */
sahilmgandhi 18:6a4db94011d3 635 #define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00U) /*!< Dual Bank Boot Disable, always boot on User Flash */
sahilmgandhi 18:6a4db94011d3 636 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 637 /**
sahilmgandhi 18:6a4db94011d3 638 * @}
sahilmgandhi 18:6a4db94011d3 639 */
sahilmgandhi 18:6a4db94011d3 640
sahilmgandhi 18:6a4db94011d3 641 /** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode
sahilmgandhi 18:6a4db94011d3 642 * @{
sahilmgandhi 18:6a4db94011d3 643 */
sahilmgandhi 18:6a4db94011d3 644 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 645 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 646 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
sahilmgandhi 18:6a4db94011d3 647 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
sahilmgandhi 18:6a4db94011d3 648 defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 649 #define OB_PCROP_DESELECTED ((uint8_t)0x00U) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
sahilmgandhi 18:6a4db94011d3 650 #define OB_PCROP_SELECTED ((uint8_t)0x80U) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
sahilmgandhi 18:6a4db94011d3 651 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
sahilmgandhi 18:6a4db94011d3 652 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
sahilmgandhi 18:6a4db94011d3 653 STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 654 /**
sahilmgandhi 18:6a4db94011d3 655 * @}
sahilmgandhi 18:6a4db94011d3 656 */
sahilmgandhi 18:6a4db94011d3 657
sahilmgandhi 18:6a4db94011d3 658 /**
sahilmgandhi 18:6a4db94011d3 659 * @}
sahilmgandhi 18:6a4db94011d3 660 */
sahilmgandhi 18:6a4db94011d3 661
sahilmgandhi 18:6a4db94011d3 662 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 663
sahilmgandhi 18:6a4db94011d3 664 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 665 /** @addtogroup FLASHEx_Exported_Functions
sahilmgandhi 18:6a4db94011d3 666 * @{
sahilmgandhi 18:6a4db94011d3 667 */
sahilmgandhi 18:6a4db94011d3 668
sahilmgandhi 18:6a4db94011d3 669 /** @addtogroup FLASHEx_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 670 * @{
sahilmgandhi 18:6a4db94011d3 671 */
sahilmgandhi 18:6a4db94011d3 672 /* Extension Program operation functions *************************************/
sahilmgandhi 18:6a4db94011d3 673 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError);
sahilmgandhi 18:6a4db94011d3 674 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
sahilmgandhi 18:6a4db94011d3 675 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
sahilmgandhi 18:6a4db94011d3 676 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
sahilmgandhi 18:6a4db94011d3 677
sahilmgandhi 18:6a4db94011d3 678 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 679 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 680 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
sahilmgandhi 18:6a4db94011d3 681 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
sahilmgandhi 18:6a4db94011d3 682 defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 683 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
sahilmgandhi 18:6a4db94011d3 684 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
sahilmgandhi 18:6a4db94011d3 685 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
sahilmgandhi 18:6a4db94011d3 686 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
sahilmgandhi 18:6a4db94011d3 687 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
sahilmgandhi 18:6a4db94011d3 688 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
sahilmgandhi 18:6a4db94011d3 689 STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 690
sahilmgandhi 18:6a4db94011d3 691 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 692 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 693 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void);
sahilmgandhi 18:6a4db94011d3 694 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 695 /**
sahilmgandhi 18:6a4db94011d3 696 * @}
sahilmgandhi 18:6a4db94011d3 697 */
sahilmgandhi 18:6a4db94011d3 698
sahilmgandhi 18:6a4db94011d3 699 /**
sahilmgandhi 18:6a4db94011d3 700 * @}
sahilmgandhi 18:6a4db94011d3 701 */
sahilmgandhi 18:6a4db94011d3 702 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 703 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 704 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 705 /** @defgroup FLASHEx_Private_Constants FLASH Private Constants
sahilmgandhi 18:6a4db94011d3 706 * @{
sahilmgandhi 18:6a4db94011d3 707 */
sahilmgandhi 18:6a4db94011d3 708 /*--------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx---------------------*/
sahilmgandhi 18:6a4db94011d3 709 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 710 #define FLASH_SECTOR_TOTAL 24U
sahilmgandhi 18:6a4db94011d3 711 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 712
sahilmgandhi 18:6a4db94011d3 713 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 714 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 715 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 716 #define FLASH_SECTOR_TOTAL 12U
sahilmgandhi 18:6a4db94011d3 717 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 718
sahilmgandhi 18:6a4db94011d3 719 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 720 #if defined(STM32F401xC)
sahilmgandhi 18:6a4db94011d3 721 #define FLASH_SECTOR_TOTAL 6U
sahilmgandhi 18:6a4db94011d3 722 #endif /* STM32F401xC */
sahilmgandhi 18:6a4db94011d3 723
sahilmgandhi 18:6a4db94011d3 724 /*--------------------------------------------- STM32F410xx -------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 725 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 726 #define FLASH_SECTOR_TOTAL 5U
sahilmgandhi 18:6a4db94011d3 727 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 728
sahilmgandhi 18:6a4db94011d3 729 /*--------------------------------- STM32F401xE/STM32F411xE/STM32F412xG/STM32F446xx -------------------*/
sahilmgandhi 18:6a4db94011d3 730 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
sahilmgandhi 18:6a4db94011d3 731 #define FLASH_SECTOR_TOTAL 8U
sahilmgandhi 18:6a4db94011d3 732 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */
sahilmgandhi 18:6a4db94011d3 733
sahilmgandhi 18:6a4db94011d3 734 /**
sahilmgandhi 18:6a4db94011d3 735 * @brief OPTCR1 register byte 2 (Bits[23:16]) base address
sahilmgandhi 18:6a4db94011d3 736 */
sahilmgandhi 18:6a4db94011d3 737 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 738 #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1AU)
sahilmgandhi 18:6a4db94011d3 739 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 740
sahilmgandhi 18:6a4db94011d3 741 /**
sahilmgandhi 18:6a4db94011d3 742 * @}
sahilmgandhi 18:6a4db94011d3 743 */
sahilmgandhi 18:6a4db94011d3 744
sahilmgandhi 18:6a4db94011d3 745 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 746 /** @defgroup FLASHEx_Private_Macros FLASH Private Macros
sahilmgandhi 18:6a4db94011d3 747 * @{
sahilmgandhi 18:6a4db94011d3 748 */
sahilmgandhi 18:6a4db94011d3 749
sahilmgandhi 18:6a4db94011d3 750 /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters
sahilmgandhi 18:6a4db94011d3 751 * @{
sahilmgandhi 18:6a4db94011d3 752 */
sahilmgandhi 18:6a4db94011d3 753
sahilmgandhi 18:6a4db94011d3 754 #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \
sahilmgandhi 18:6a4db94011d3 755 ((VALUE) == FLASH_TYPEERASE_MASSERASE))
sahilmgandhi 18:6a4db94011d3 756
sahilmgandhi 18:6a4db94011d3 757 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \
sahilmgandhi 18:6a4db94011d3 758 ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \
sahilmgandhi 18:6a4db94011d3 759 ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \
sahilmgandhi 18:6a4db94011d3 760 ((RANGE) == FLASH_VOLTAGE_RANGE_4))
sahilmgandhi 18:6a4db94011d3 761
sahilmgandhi 18:6a4db94011d3 762 #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 763 ((VALUE) == OB_WRPSTATE_ENABLE))
sahilmgandhi 18:6a4db94011d3 764
sahilmgandhi 18:6a4db94011d3 765 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
sahilmgandhi 18:6a4db94011d3 766
sahilmgandhi 18:6a4db94011d3 767 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
sahilmgandhi 18:6a4db94011d3 768 ((LEVEL) == OB_RDP_LEVEL_1) ||\
sahilmgandhi 18:6a4db94011d3 769 ((LEVEL) == OB_RDP_LEVEL_2))
sahilmgandhi 18:6a4db94011d3 770
sahilmgandhi 18:6a4db94011d3 771 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
sahilmgandhi 18:6a4db94011d3 772
sahilmgandhi 18:6a4db94011d3 773 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
sahilmgandhi 18:6a4db94011d3 774
sahilmgandhi 18:6a4db94011d3 775 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
sahilmgandhi 18:6a4db94011d3 776
sahilmgandhi 18:6a4db94011d3 777 #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
sahilmgandhi 18:6a4db94011d3 778 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
sahilmgandhi 18:6a4db94011d3 779
sahilmgandhi 18:6a4db94011d3 780 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 781 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 782 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
sahilmgandhi 18:6a4db94011d3 783 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
sahilmgandhi 18:6a4db94011d3 784 defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 785 #define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 786 ((VALUE) == OB_PCROP_STATE_ENABLE))
sahilmgandhi 18:6a4db94011d3 787 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
sahilmgandhi 18:6a4db94011d3 788 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
sahilmgandhi 18:6a4db94011d3 789 STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 790
sahilmgandhi 18:6a4db94011d3 791 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 792 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 793 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \
sahilmgandhi 18:6a4db94011d3 794 ((VALUE) == OPTIONBYTE_BOOTCONFIG))
sahilmgandhi 18:6a4db94011d3 795 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 796
sahilmgandhi 18:6a4db94011d3 797 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 798 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 799 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 800 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP))
sahilmgandhi 18:6a4db94011d3 801 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx ||\
sahilmgandhi 18:6a4db94011d3 802 STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 803
sahilmgandhi 18:6a4db94011d3 804 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 805 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 806 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
sahilmgandhi 18:6a4db94011d3 807 ((LATENCY) == FLASH_LATENCY_1) || \
sahilmgandhi 18:6a4db94011d3 808 ((LATENCY) == FLASH_LATENCY_2) || \
sahilmgandhi 18:6a4db94011d3 809 ((LATENCY) == FLASH_LATENCY_3) || \
sahilmgandhi 18:6a4db94011d3 810 ((LATENCY) == FLASH_LATENCY_4) || \
sahilmgandhi 18:6a4db94011d3 811 ((LATENCY) == FLASH_LATENCY_5) || \
sahilmgandhi 18:6a4db94011d3 812 ((LATENCY) == FLASH_LATENCY_6) || \
sahilmgandhi 18:6a4db94011d3 813 ((LATENCY) == FLASH_LATENCY_7) || \
sahilmgandhi 18:6a4db94011d3 814 ((LATENCY) == FLASH_LATENCY_8) || \
sahilmgandhi 18:6a4db94011d3 815 ((LATENCY) == FLASH_LATENCY_9) || \
sahilmgandhi 18:6a4db94011d3 816 ((LATENCY) == FLASH_LATENCY_10) || \
sahilmgandhi 18:6a4db94011d3 817 ((LATENCY) == FLASH_LATENCY_11) || \
sahilmgandhi 18:6a4db94011d3 818 ((LATENCY) == FLASH_LATENCY_12) || \
sahilmgandhi 18:6a4db94011d3 819 ((LATENCY) == FLASH_LATENCY_13) || \
sahilmgandhi 18:6a4db94011d3 820 ((LATENCY) == FLASH_LATENCY_14) || \
sahilmgandhi 18:6a4db94011d3 821 ((LATENCY) == FLASH_LATENCY_15))
sahilmgandhi 18:6a4db94011d3 822 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 823
sahilmgandhi 18:6a4db94011d3 824 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
sahilmgandhi 18:6a4db94011d3 825 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 826 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
sahilmgandhi 18:6a4db94011d3 827 defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 828 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
sahilmgandhi 18:6a4db94011d3 829 ((LATENCY) == FLASH_LATENCY_1) || \
sahilmgandhi 18:6a4db94011d3 830 ((LATENCY) == FLASH_LATENCY_2) || \
sahilmgandhi 18:6a4db94011d3 831 ((LATENCY) == FLASH_LATENCY_3) || \
sahilmgandhi 18:6a4db94011d3 832 ((LATENCY) == FLASH_LATENCY_4) || \
sahilmgandhi 18:6a4db94011d3 833 ((LATENCY) == FLASH_LATENCY_5) || \
sahilmgandhi 18:6a4db94011d3 834 ((LATENCY) == FLASH_LATENCY_6) || \
sahilmgandhi 18:6a4db94011d3 835 ((LATENCY) == FLASH_LATENCY_7))
sahilmgandhi 18:6a4db94011d3 836 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx ||\
sahilmgandhi 18:6a4db94011d3 837 STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 838
sahilmgandhi 18:6a4db94011d3 839 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 840 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
sahilmgandhi 18:6a4db94011d3 841 ((BANK) == FLASH_BANK_2) || \
sahilmgandhi 18:6a4db94011d3 842 ((BANK) == FLASH_BANK_BOTH))
sahilmgandhi 18:6a4db94011d3 843 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 844
sahilmgandhi 18:6a4db94011d3 845 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
sahilmgandhi 18:6a4db94011d3 846 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 847 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 848 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 849 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
sahilmgandhi 18:6a4db94011d3 850 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx ||\
sahilmgandhi 18:6a4db94011d3 851 STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 852
sahilmgandhi 18:6a4db94011d3 853 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 854 #define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
sahilmgandhi 18:6a4db94011d3 855 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
sahilmgandhi 18:6a4db94011d3 856 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
sahilmgandhi 18:6a4db94011d3 857 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
sahilmgandhi 18:6a4db94011d3 858 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
sahilmgandhi 18:6a4db94011d3 859 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\
sahilmgandhi 18:6a4db94011d3 860 ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\
sahilmgandhi 18:6a4db94011d3 861 ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\
sahilmgandhi 18:6a4db94011d3 862 ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\
sahilmgandhi 18:6a4db94011d3 863 ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\
sahilmgandhi 18:6a4db94011d3 864 ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\
sahilmgandhi 18:6a4db94011d3 865 ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23))
sahilmgandhi 18:6a4db94011d3 866 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 867
sahilmgandhi 18:6a4db94011d3 868 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
sahilmgandhi 18:6a4db94011d3 869 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 870 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
sahilmgandhi 18:6a4db94011d3 871 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
sahilmgandhi 18:6a4db94011d3 872 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
sahilmgandhi 18:6a4db94011d3 873 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
sahilmgandhi 18:6a4db94011d3 874 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
sahilmgandhi 18:6a4db94011d3 875 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11))
sahilmgandhi 18:6a4db94011d3 876 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 877
sahilmgandhi 18:6a4db94011d3 878 #if defined(STM32F401xC)
sahilmgandhi 18:6a4db94011d3 879 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
sahilmgandhi 18:6a4db94011d3 880 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
sahilmgandhi 18:6a4db94011d3 881 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5))
sahilmgandhi 18:6a4db94011d3 882 #endif /* STM32F401xC */
sahilmgandhi 18:6a4db94011d3 883
sahilmgandhi 18:6a4db94011d3 884 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 885 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
sahilmgandhi 18:6a4db94011d3 886 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
sahilmgandhi 18:6a4db94011d3 887 ((SECTOR) == FLASH_SECTOR_4))
sahilmgandhi 18:6a4db94011d3 888 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 889
sahilmgandhi 18:6a4db94011d3 890 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
sahilmgandhi 18:6a4db94011d3 891 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
sahilmgandhi 18:6a4db94011d3 892 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
sahilmgandhi 18:6a4db94011d3 893 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
sahilmgandhi 18:6a4db94011d3 894 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7))
sahilmgandhi 18:6a4db94011d3 895 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */
sahilmgandhi 18:6a4db94011d3 896
sahilmgandhi 18:6a4db94011d3 897 #define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END))
sahilmgandhi 18:6a4db94011d3 898 #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
sahilmgandhi 18:6a4db94011d3 899
sahilmgandhi 18:6a4db94011d3 900 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 901 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFF000000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 902 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 903
sahilmgandhi 18:6a4db94011d3 904 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
sahilmgandhi 18:6a4db94011d3 905 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 906 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
sahilmgandhi 18:6a4db94011d3 907
sahilmgandhi 18:6a4db94011d3 908 #if defined(STM32F401xC)
sahilmgandhi 18:6a4db94011d3 909 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 910 #endif /* STM32F401xC */
sahilmgandhi 18:6a4db94011d3 911
sahilmgandhi 18:6a4db94011d3 912 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 913 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 914 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 915
sahilmgandhi 18:6a4db94011d3 916 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
sahilmgandhi 18:6a4db94011d3 917 defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 918 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 919 #endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 920
sahilmgandhi 18:6a4db94011d3 921 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 922 #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 923 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 924
sahilmgandhi 18:6a4db94011d3 925 #if defined(STM32F401xC)
sahilmgandhi 18:6a4db94011d3 926 #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 927 #endif /* STM32F401xC */
sahilmgandhi 18:6a4db94011d3 928
sahilmgandhi 18:6a4db94011d3 929 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 930 #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 931 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 932
sahilmgandhi 18:6a4db94011d3 933 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
sahilmgandhi 18:6a4db94011d3 934 defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 935 #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 936 #endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 937
sahilmgandhi 18:6a4db94011d3 938 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 939 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 940 #define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) || ((BOOT) == OB_DUAL_BOOT_DISABLE))
sahilmgandhi 18:6a4db94011d3 941 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 942
sahilmgandhi 18:6a4db94011d3 943 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 944 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
sahilmgandhi 18:6a4db94011d3 945 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
sahilmgandhi 18:6a4db94011d3 946 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
sahilmgandhi 18:6a4db94011d3 947 defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 948 #define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) || ((PCROP) == OB_PCROP_DESELECTED))
sahilmgandhi 18:6a4db94011d3 949 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
sahilmgandhi 18:6a4db94011d3 950 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
sahilmgandhi 18:6a4db94011d3 951 STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 952 /**
sahilmgandhi 18:6a4db94011d3 953 * @}
sahilmgandhi 18:6a4db94011d3 954 */
sahilmgandhi 18:6a4db94011d3 955
sahilmgandhi 18:6a4db94011d3 956 /**
sahilmgandhi 18:6a4db94011d3 957 * @}
sahilmgandhi 18:6a4db94011d3 958 */
sahilmgandhi 18:6a4db94011d3 959
sahilmgandhi 18:6a4db94011d3 960 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 961 /** @defgroup FLASHEx_Private_Functions FLASH Private Functions
sahilmgandhi 18:6a4db94011d3 962 * @{
sahilmgandhi 18:6a4db94011d3 963 */
sahilmgandhi 18:6a4db94011d3 964 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
sahilmgandhi 18:6a4db94011d3 965 void FLASH_FlushCaches(void);
sahilmgandhi 18:6a4db94011d3 966 /**
sahilmgandhi 18:6a4db94011d3 967 * @}
sahilmgandhi 18:6a4db94011d3 968 */
sahilmgandhi 18:6a4db94011d3 969
sahilmgandhi 18:6a4db94011d3 970 /**
sahilmgandhi 18:6a4db94011d3 971 * @}
sahilmgandhi 18:6a4db94011d3 972 */
sahilmgandhi 18:6a4db94011d3 973
sahilmgandhi 18:6a4db94011d3 974 /**
sahilmgandhi 18:6a4db94011d3 975 * @}
sahilmgandhi 18:6a4db94011d3 976 */
sahilmgandhi 18:6a4db94011d3 977
sahilmgandhi 18:6a4db94011d3 978 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 979 }
sahilmgandhi 18:6a4db94011d3 980 #endif
sahilmgandhi 18:6a4db94011d3 981
sahilmgandhi 18:6a4db94011d3 982 #endif /* __STM32F4xx_HAL_FLASH_EX_H */
sahilmgandhi 18:6a4db94011d3 983
sahilmgandhi 18:6a4db94011d3 984 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/