Mouse code for the MacroRat
mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_flash_ex.c@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @file stm32f4xx_hal_flash_ex.c |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @author MCD Application Team |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @version V1.5.0 |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @date 06-May-2016 |
sahilmgandhi | 18:6a4db94011d3 | 7 | * @brief Extended FLASH HAL module driver. |
sahilmgandhi | 18:6a4db94011d3 | 8 | * This file provides firmware functions to manage the following |
sahilmgandhi | 18:6a4db94011d3 | 9 | * functionalities of the FLASH extension peripheral: |
sahilmgandhi | 18:6a4db94011d3 | 10 | * + Extended programming operations functions |
sahilmgandhi | 18:6a4db94011d3 | 11 | * |
sahilmgandhi | 18:6a4db94011d3 | 12 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 13 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 14 | ##### Flash Extension features ##### |
sahilmgandhi | 18:6a4db94011d3 | 15 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 16 | |
sahilmgandhi | 18:6a4db94011d3 | 17 | [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and |
sahilmgandhi | 18:6a4db94011d3 | 18 | STM32F429xx/439xx devices contains the following additional features |
sahilmgandhi | 18:6a4db94011d3 | 19 | |
sahilmgandhi | 18:6a4db94011d3 | 20 | (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write |
sahilmgandhi | 18:6a4db94011d3 | 21 | capability (RWW) |
sahilmgandhi | 18:6a4db94011d3 | 22 | (+) Dual bank memory organization |
sahilmgandhi | 18:6a4db94011d3 | 23 | (+) PCROP protection for all banks |
sahilmgandhi | 18:6a4db94011d3 | 24 | |
sahilmgandhi | 18:6a4db94011d3 | 25 | ##### How to use this driver ##### |
sahilmgandhi | 18:6a4db94011d3 | 26 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 27 | [..] This driver provides functions to configure and program the FLASH memory |
sahilmgandhi | 18:6a4db94011d3 | 28 | of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx |
sahilmgandhi | 18:6a4db94011d3 | 29 | devices. It includes |
sahilmgandhi | 18:6a4db94011d3 | 30 | (#) FLASH Memory Erase functions: |
sahilmgandhi | 18:6a4db94011d3 | 31 | (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and |
sahilmgandhi | 18:6a4db94011d3 | 32 | HAL_FLASH_Lock() functions |
sahilmgandhi | 18:6a4db94011d3 | 33 | (++) Erase function: Erase sector, erase all sectors |
sahilmgandhi | 18:6a4db94011d3 | 34 | (++) There are two modes of erase : |
sahilmgandhi | 18:6a4db94011d3 | 35 | (+++) Polling Mode using HAL_FLASHEx_Erase() |
sahilmgandhi | 18:6a4db94011d3 | 36 | (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT() |
sahilmgandhi | 18:6a4db94011d3 | 37 | |
sahilmgandhi | 18:6a4db94011d3 | 38 | (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to : |
sahilmgandhi | 18:6a4db94011d3 | 39 | (++) Set/Reset the write protection |
sahilmgandhi | 18:6a4db94011d3 | 40 | (++) Set the Read protection Level |
sahilmgandhi | 18:6a4db94011d3 | 41 | (++) Set the BOR level |
sahilmgandhi | 18:6a4db94011d3 | 42 | (++) Program the user Option Bytes |
sahilmgandhi | 18:6a4db94011d3 | 43 | (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to : |
sahilmgandhi | 18:6a4db94011d3 | 44 | (++) Extended space (bank 2) erase function |
sahilmgandhi | 18:6a4db94011d3 | 45 | (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2) |
sahilmgandhi | 18:6a4db94011d3 | 46 | (++) Dual Boot activation |
sahilmgandhi | 18:6a4db94011d3 | 47 | (++) Write protection configuration for bank 2 |
sahilmgandhi | 18:6a4db94011d3 | 48 | (++) PCROP protection configuration and control for both banks |
sahilmgandhi | 18:6a4db94011d3 | 49 | |
sahilmgandhi | 18:6a4db94011d3 | 50 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 51 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 52 | * @attention |
sahilmgandhi | 18:6a4db94011d3 | 53 | * |
sahilmgandhi | 18:6a4db94011d3 | 54 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
sahilmgandhi | 18:6a4db94011d3 | 55 | * |
sahilmgandhi | 18:6a4db94011d3 | 56 | * Redistribution and use in source and binary forms, with or without modification, |
sahilmgandhi | 18:6a4db94011d3 | 57 | * are permitted provided that the following conditions are met: |
sahilmgandhi | 18:6a4db94011d3 | 58 | * 1. Redistributions of source code must retain the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 59 | * this list of conditions and the following disclaimer. |
sahilmgandhi | 18:6a4db94011d3 | 60 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 61 | * this list of conditions and the following disclaimer in the documentation |
sahilmgandhi | 18:6a4db94011d3 | 62 | * and/or other materials provided with the distribution. |
sahilmgandhi | 18:6a4db94011d3 | 63 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
sahilmgandhi | 18:6a4db94011d3 | 64 | * may be used to endorse or promote products derived from this software |
sahilmgandhi | 18:6a4db94011d3 | 65 | * without specific prior written permission. |
sahilmgandhi | 18:6a4db94011d3 | 66 | * |
sahilmgandhi | 18:6a4db94011d3 | 67 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
sahilmgandhi | 18:6a4db94011d3 | 68 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
sahilmgandhi | 18:6a4db94011d3 | 69 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
sahilmgandhi | 18:6a4db94011d3 | 70 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
sahilmgandhi | 18:6a4db94011d3 | 71 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
sahilmgandhi | 18:6a4db94011d3 | 72 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
sahilmgandhi | 18:6a4db94011d3 | 73 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
sahilmgandhi | 18:6a4db94011d3 | 74 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
sahilmgandhi | 18:6a4db94011d3 | 75 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
sahilmgandhi | 18:6a4db94011d3 | 76 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
sahilmgandhi | 18:6a4db94011d3 | 77 | * |
sahilmgandhi | 18:6a4db94011d3 | 78 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 79 | */ |
sahilmgandhi | 18:6a4db94011d3 | 80 | |
sahilmgandhi | 18:6a4db94011d3 | 81 | /* Includes ------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 82 | #include "stm32f4xx_hal.h" |
sahilmgandhi | 18:6a4db94011d3 | 83 | |
sahilmgandhi | 18:6a4db94011d3 | 84 | /** @addtogroup STM32F4xx_HAL_Driver |
sahilmgandhi | 18:6a4db94011d3 | 85 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 86 | */ |
sahilmgandhi | 18:6a4db94011d3 | 87 | |
sahilmgandhi | 18:6a4db94011d3 | 88 | /** @defgroup FLASHEx FLASHEx |
sahilmgandhi | 18:6a4db94011d3 | 89 | * @brief FLASH HAL Extension module driver |
sahilmgandhi | 18:6a4db94011d3 | 90 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 91 | */ |
sahilmgandhi | 18:6a4db94011d3 | 92 | |
sahilmgandhi | 18:6a4db94011d3 | 93 | #ifdef HAL_FLASH_MODULE_ENABLED |
sahilmgandhi | 18:6a4db94011d3 | 94 | |
sahilmgandhi | 18:6a4db94011d3 | 95 | /* Private typedef -----------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 96 | /* Private define ------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 97 | /** @addtogroup FLASHEx_Private_Constants |
sahilmgandhi | 18:6a4db94011d3 | 98 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 99 | */ |
sahilmgandhi | 18:6a4db94011d3 | 100 | #define FLASH_TIMEOUT_VALUE ((uint32_t)50000U)/* 50 s */ |
sahilmgandhi | 18:6a4db94011d3 | 101 | /** |
sahilmgandhi | 18:6a4db94011d3 | 102 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 103 | */ |
sahilmgandhi | 18:6a4db94011d3 | 104 | |
sahilmgandhi | 18:6a4db94011d3 | 105 | /* Private macro -------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 106 | /* Private variables ---------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 107 | /** @addtogroup FLASHEx_Private_Variables |
sahilmgandhi | 18:6a4db94011d3 | 108 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 109 | */ |
sahilmgandhi | 18:6a4db94011d3 | 110 | extern FLASH_ProcessTypeDef pFlash; |
sahilmgandhi | 18:6a4db94011d3 | 111 | /** |
sahilmgandhi | 18:6a4db94011d3 | 112 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 113 | */ |
sahilmgandhi | 18:6a4db94011d3 | 114 | |
sahilmgandhi | 18:6a4db94011d3 | 115 | /* Private function prototypes -----------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 116 | /** @addtogroup FLASHEx_Private_Functions |
sahilmgandhi | 18:6a4db94011d3 | 117 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 118 | */ |
sahilmgandhi | 18:6a4db94011d3 | 119 | /* Option bytes control */ |
sahilmgandhi | 18:6a4db94011d3 | 120 | static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks); |
sahilmgandhi | 18:6a4db94011d3 | 121 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks); |
sahilmgandhi | 18:6a4db94011d3 | 122 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks); |
sahilmgandhi | 18:6a4db94011d3 | 123 | static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level); |
sahilmgandhi | 18:6a4db94011d3 | 124 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby); |
sahilmgandhi | 18:6a4db94011d3 | 125 | static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level); |
sahilmgandhi | 18:6a4db94011d3 | 126 | static uint8_t FLASH_OB_GetUser(void); |
sahilmgandhi | 18:6a4db94011d3 | 127 | static uint16_t FLASH_OB_GetWRP(void); |
sahilmgandhi | 18:6a4db94011d3 | 128 | static uint8_t FLASH_OB_GetRDP(void); |
sahilmgandhi | 18:6a4db94011d3 | 129 | static uint8_t FLASH_OB_GetBOR(void); |
sahilmgandhi | 18:6a4db94011d3 | 130 | |
sahilmgandhi | 18:6a4db94011d3 | 131 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 132 | defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) |
sahilmgandhi | 18:6a4db94011d3 | 133 | static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector); |
sahilmgandhi | 18:6a4db94011d3 | 134 | static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector); |
sahilmgandhi | 18:6a4db94011d3 | 135 | #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ |
sahilmgandhi | 18:6a4db94011d3 | 136 | |
sahilmgandhi | 18:6a4db94011d3 | 137 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
sahilmgandhi | 18:6a4db94011d3 | 138 | static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks); |
sahilmgandhi | 18:6a4db94011d3 | 139 | static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks); |
sahilmgandhi | 18:6a4db94011d3 | 140 | static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig); |
sahilmgandhi | 18:6a4db94011d3 | 141 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
sahilmgandhi | 18:6a4db94011d3 | 142 | |
sahilmgandhi | 18:6a4db94011d3 | 143 | extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); |
sahilmgandhi | 18:6a4db94011d3 | 144 | /** |
sahilmgandhi | 18:6a4db94011d3 | 145 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 146 | */ |
sahilmgandhi | 18:6a4db94011d3 | 147 | |
sahilmgandhi | 18:6a4db94011d3 | 148 | /* Exported functions --------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 149 | /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions |
sahilmgandhi | 18:6a4db94011d3 | 150 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 151 | */ |
sahilmgandhi | 18:6a4db94011d3 | 152 | |
sahilmgandhi | 18:6a4db94011d3 | 153 | /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions |
sahilmgandhi | 18:6a4db94011d3 | 154 | * @brief Extended IO operation functions |
sahilmgandhi | 18:6a4db94011d3 | 155 | * |
sahilmgandhi | 18:6a4db94011d3 | 156 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 157 | =============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 158 | ##### Extended programming operation functions ##### |
sahilmgandhi | 18:6a4db94011d3 | 159 | =============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 160 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 161 | This subsection provides a set of functions allowing to manage the Extension FLASH |
sahilmgandhi | 18:6a4db94011d3 | 162 | programming operations. |
sahilmgandhi | 18:6a4db94011d3 | 163 | |
sahilmgandhi | 18:6a4db94011d3 | 164 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 165 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 166 | */ |
sahilmgandhi | 18:6a4db94011d3 | 167 | /** |
sahilmgandhi | 18:6a4db94011d3 | 168 | * @brief Perform a mass erase or erase the specified FLASH memory sectors |
sahilmgandhi | 18:6a4db94011d3 | 169 | * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that |
sahilmgandhi | 18:6a4db94011d3 | 170 | * contains the configuration information for the erasing. |
sahilmgandhi | 18:6a4db94011d3 | 171 | * |
sahilmgandhi | 18:6a4db94011d3 | 172 | * @param[out] SectorError: pointer to variable that |
sahilmgandhi | 18:6a4db94011d3 | 173 | * contains the configuration information on faulty sector in case of error |
sahilmgandhi | 18:6a4db94011d3 | 174 | * (0xFFFFFFFFU means that all the sectors have been correctly erased) |
sahilmgandhi | 18:6a4db94011d3 | 175 | * |
sahilmgandhi | 18:6a4db94011d3 | 176 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 177 | */ |
sahilmgandhi | 18:6a4db94011d3 | 178 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError) |
sahilmgandhi | 18:6a4db94011d3 | 179 | { |
sahilmgandhi | 18:6a4db94011d3 | 180 | HAL_StatusTypeDef status = HAL_ERROR; |
sahilmgandhi | 18:6a4db94011d3 | 181 | uint32_t index = 0U; |
sahilmgandhi | 18:6a4db94011d3 | 182 | |
sahilmgandhi | 18:6a4db94011d3 | 183 | /* Process Locked */ |
sahilmgandhi | 18:6a4db94011d3 | 184 | __HAL_LOCK(&pFlash); |
sahilmgandhi | 18:6a4db94011d3 | 185 | |
sahilmgandhi | 18:6a4db94011d3 | 186 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 187 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
sahilmgandhi | 18:6a4db94011d3 | 188 | |
sahilmgandhi | 18:6a4db94011d3 | 189 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 190 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 191 | |
sahilmgandhi | 18:6a4db94011d3 | 192 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 193 | { |
sahilmgandhi | 18:6a4db94011d3 | 194 | /*Initialization of SectorError variable*/ |
sahilmgandhi | 18:6a4db94011d3 | 195 | *SectorError = 0xFFFFFFFFU; |
sahilmgandhi | 18:6a4db94011d3 | 196 | |
sahilmgandhi | 18:6a4db94011d3 | 197 | if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
sahilmgandhi | 18:6a4db94011d3 | 198 | { |
sahilmgandhi | 18:6a4db94011d3 | 199 | /*Mass erase to be done*/ |
sahilmgandhi | 18:6a4db94011d3 | 200 | FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks); |
sahilmgandhi | 18:6a4db94011d3 | 201 | |
sahilmgandhi | 18:6a4db94011d3 | 202 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 203 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 204 | |
sahilmgandhi | 18:6a4db94011d3 | 205 | /* if the erase operation is completed, disable the MER Bit */ |
sahilmgandhi | 18:6a4db94011d3 | 206 | FLASH->CR &= (~FLASH_MER_BIT); |
sahilmgandhi | 18:6a4db94011d3 | 207 | } |
sahilmgandhi | 18:6a4db94011d3 | 208 | else |
sahilmgandhi | 18:6a4db94011d3 | 209 | { |
sahilmgandhi | 18:6a4db94011d3 | 210 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 211 | assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); |
sahilmgandhi | 18:6a4db94011d3 | 212 | |
sahilmgandhi | 18:6a4db94011d3 | 213 | /* Erase by sector by sector to be done*/ |
sahilmgandhi | 18:6a4db94011d3 | 214 | for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++) |
sahilmgandhi | 18:6a4db94011d3 | 215 | { |
sahilmgandhi | 18:6a4db94011d3 | 216 | FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange); |
sahilmgandhi | 18:6a4db94011d3 | 217 | |
sahilmgandhi | 18:6a4db94011d3 | 218 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 219 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 220 | |
sahilmgandhi | 18:6a4db94011d3 | 221 | /* If the erase operation is completed, disable the SER and SNB Bits */ |
sahilmgandhi | 18:6a4db94011d3 | 222 | CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB)); |
sahilmgandhi | 18:6a4db94011d3 | 223 | |
sahilmgandhi | 18:6a4db94011d3 | 224 | if(status != HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 225 | { |
sahilmgandhi | 18:6a4db94011d3 | 226 | /* In case of error, stop erase procedure and return the faulty sector*/ |
sahilmgandhi | 18:6a4db94011d3 | 227 | *SectorError = index; |
sahilmgandhi | 18:6a4db94011d3 | 228 | break; |
sahilmgandhi | 18:6a4db94011d3 | 229 | } |
sahilmgandhi | 18:6a4db94011d3 | 230 | } |
sahilmgandhi | 18:6a4db94011d3 | 231 | } |
sahilmgandhi | 18:6a4db94011d3 | 232 | /* Flush the caches to be sure of the data consistency */ |
sahilmgandhi | 18:6a4db94011d3 | 233 | FLASH_FlushCaches(); |
sahilmgandhi | 18:6a4db94011d3 | 234 | } |
sahilmgandhi | 18:6a4db94011d3 | 235 | |
sahilmgandhi | 18:6a4db94011d3 | 236 | /* Process Unlocked */ |
sahilmgandhi | 18:6a4db94011d3 | 237 | __HAL_UNLOCK(&pFlash); |
sahilmgandhi | 18:6a4db94011d3 | 238 | |
sahilmgandhi | 18:6a4db94011d3 | 239 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 240 | } |
sahilmgandhi | 18:6a4db94011d3 | 241 | |
sahilmgandhi | 18:6a4db94011d3 | 242 | /** |
sahilmgandhi | 18:6a4db94011d3 | 243 | * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled |
sahilmgandhi | 18:6a4db94011d3 | 244 | * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that |
sahilmgandhi | 18:6a4db94011d3 | 245 | * contains the configuration information for the erasing. |
sahilmgandhi | 18:6a4db94011d3 | 246 | * |
sahilmgandhi | 18:6a4db94011d3 | 247 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 248 | */ |
sahilmgandhi | 18:6a4db94011d3 | 249 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) |
sahilmgandhi | 18:6a4db94011d3 | 250 | { |
sahilmgandhi | 18:6a4db94011d3 | 251 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 252 | |
sahilmgandhi | 18:6a4db94011d3 | 253 | /* Process Locked */ |
sahilmgandhi | 18:6a4db94011d3 | 254 | __HAL_LOCK(&pFlash); |
sahilmgandhi | 18:6a4db94011d3 | 255 | |
sahilmgandhi | 18:6a4db94011d3 | 256 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 257 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
sahilmgandhi | 18:6a4db94011d3 | 258 | |
sahilmgandhi | 18:6a4db94011d3 | 259 | /* Enable End of FLASH Operation interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 260 | __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP); |
sahilmgandhi | 18:6a4db94011d3 | 261 | |
sahilmgandhi | 18:6a4db94011d3 | 262 | /* Enable Error source interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 263 | __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR); |
sahilmgandhi | 18:6a4db94011d3 | 264 | |
sahilmgandhi | 18:6a4db94011d3 | 265 | /* Clear pending flags (if any) */ |
sahilmgandhi | 18:6a4db94011d3 | 266 | __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\ |
sahilmgandhi | 18:6a4db94011d3 | 267 | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR); |
sahilmgandhi | 18:6a4db94011d3 | 268 | |
sahilmgandhi | 18:6a4db94011d3 | 269 | if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
sahilmgandhi | 18:6a4db94011d3 | 270 | { |
sahilmgandhi | 18:6a4db94011d3 | 271 | /*Mass erase to be done*/ |
sahilmgandhi | 18:6a4db94011d3 | 272 | pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; |
sahilmgandhi | 18:6a4db94011d3 | 273 | pFlash.Bank = pEraseInit->Banks; |
sahilmgandhi | 18:6a4db94011d3 | 274 | FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks); |
sahilmgandhi | 18:6a4db94011d3 | 275 | } |
sahilmgandhi | 18:6a4db94011d3 | 276 | else |
sahilmgandhi | 18:6a4db94011d3 | 277 | { |
sahilmgandhi | 18:6a4db94011d3 | 278 | /* Erase by sector to be done*/ |
sahilmgandhi | 18:6a4db94011d3 | 279 | |
sahilmgandhi | 18:6a4db94011d3 | 280 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 281 | assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); |
sahilmgandhi | 18:6a4db94011d3 | 282 | |
sahilmgandhi | 18:6a4db94011d3 | 283 | pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE; |
sahilmgandhi | 18:6a4db94011d3 | 284 | pFlash.NbSectorsToErase = pEraseInit->NbSectors; |
sahilmgandhi | 18:6a4db94011d3 | 285 | pFlash.Sector = pEraseInit->Sector; |
sahilmgandhi | 18:6a4db94011d3 | 286 | pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange; |
sahilmgandhi | 18:6a4db94011d3 | 287 | |
sahilmgandhi | 18:6a4db94011d3 | 288 | /*Erase 1st sector and wait for IT*/ |
sahilmgandhi | 18:6a4db94011d3 | 289 | FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange); |
sahilmgandhi | 18:6a4db94011d3 | 290 | } |
sahilmgandhi | 18:6a4db94011d3 | 291 | |
sahilmgandhi | 18:6a4db94011d3 | 292 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 293 | } |
sahilmgandhi | 18:6a4db94011d3 | 294 | |
sahilmgandhi | 18:6a4db94011d3 | 295 | /** |
sahilmgandhi | 18:6a4db94011d3 | 296 | * @brief Program option bytes |
sahilmgandhi | 18:6a4db94011d3 | 297 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that |
sahilmgandhi | 18:6a4db94011d3 | 298 | * contains the configuration information for the programming. |
sahilmgandhi | 18:6a4db94011d3 | 299 | * |
sahilmgandhi | 18:6a4db94011d3 | 300 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 301 | */ |
sahilmgandhi | 18:6a4db94011d3 | 302 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) |
sahilmgandhi | 18:6a4db94011d3 | 303 | { |
sahilmgandhi | 18:6a4db94011d3 | 304 | HAL_StatusTypeDef status = HAL_ERROR; |
sahilmgandhi | 18:6a4db94011d3 | 305 | |
sahilmgandhi | 18:6a4db94011d3 | 306 | /* Process Locked */ |
sahilmgandhi | 18:6a4db94011d3 | 307 | __HAL_LOCK(&pFlash); |
sahilmgandhi | 18:6a4db94011d3 | 308 | |
sahilmgandhi | 18:6a4db94011d3 | 309 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 310 | assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); |
sahilmgandhi | 18:6a4db94011d3 | 311 | |
sahilmgandhi | 18:6a4db94011d3 | 312 | /*Write protection configuration*/ |
sahilmgandhi | 18:6a4db94011d3 | 313 | if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) |
sahilmgandhi | 18:6a4db94011d3 | 314 | { |
sahilmgandhi | 18:6a4db94011d3 | 315 | assert_param(IS_WRPSTATE(pOBInit->WRPState)); |
sahilmgandhi | 18:6a4db94011d3 | 316 | if(pOBInit->WRPState == OB_WRPSTATE_ENABLE) |
sahilmgandhi | 18:6a4db94011d3 | 317 | { |
sahilmgandhi | 18:6a4db94011d3 | 318 | /*Enable of Write protection on the selected Sector*/ |
sahilmgandhi | 18:6a4db94011d3 | 319 | status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks); |
sahilmgandhi | 18:6a4db94011d3 | 320 | } |
sahilmgandhi | 18:6a4db94011d3 | 321 | else |
sahilmgandhi | 18:6a4db94011d3 | 322 | { |
sahilmgandhi | 18:6a4db94011d3 | 323 | /*Disable of Write protection on the selected Sector*/ |
sahilmgandhi | 18:6a4db94011d3 | 324 | status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks); |
sahilmgandhi | 18:6a4db94011d3 | 325 | } |
sahilmgandhi | 18:6a4db94011d3 | 326 | } |
sahilmgandhi | 18:6a4db94011d3 | 327 | |
sahilmgandhi | 18:6a4db94011d3 | 328 | /*Read protection configuration*/ |
sahilmgandhi | 18:6a4db94011d3 | 329 | if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) |
sahilmgandhi | 18:6a4db94011d3 | 330 | { |
sahilmgandhi | 18:6a4db94011d3 | 331 | status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); |
sahilmgandhi | 18:6a4db94011d3 | 332 | } |
sahilmgandhi | 18:6a4db94011d3 | 333 | |
sahilmgandhi | 18:6a4db94011d3 | 334 | /*USER configuration*/ |
sahilmgandhi | 18:6a4db94011d3 | 335 | if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) |
sahilmgandhi | 18:6a4db94011d3 | 336 | { |
sahilmgandhi | 18:6a4db94011d3 | 337 | status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW, |
sahilmgandhi | 18:6a4db94011d3 | 338 | pOBInit->USERConfig&OB_STOP_NO_RST, |
sahilmgandhi | 18:6a4db94011d3 | 339 | pOBInit->USERConfig&OB_STDBY_NO_RST); |
sahilmgandhi | 18:6a4db94011d3 | 340 | } |
sahilmgandhi | 18:6a4db94011d3 | 341 | |
sahilmgandhi | 18:6a4db94011d3 | 342 | /*BOR Level configuration*/ |
sahilmgandhi | 18:6a4db94011d3 | 343 | if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR) |
sahilmgandhi | 18:6a4db94011d3 | 344 | { |
sahilmgandhi | 18:6a4db94011d3 | 345 | status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel); |
sahilmgandhi | 18:6a4db94011d3 | 346 | } |
sahilmgandhi | 18:6a4db94011d3 | 347 | |
sahilmgandhi | 18:6a4db94011d3 | 348 | /* Process Unlocked */ |
sahilmgandhi | 18:6a4db94011d3 | 349 | __HAL_UNLOCK(&pFlash); |
sahilmgandhi | 18:6a4db94011d3 | 350 | |
sahilmgandhi | 18:6a4db94011d3 | 351 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 352 | } |
sahilmgandhi | 18:6a4db94011d3 | 353 | |
sahilmgandhi | 18:6a4db94011d3 | 354 | /** |
sahilmgandhi | 18:6a4db94011d3 | 355 | * @brief Get the Option byte configuration |
sahilmgandhi | 18:6a4db94011d3 | 356 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that |
sahilmgandhi | 18:6a4db94011d3 | 357 | * contains the configuration information for the programming. |
sahilmgandhi | 18:6a4db94011d3 | 358 | * |
sahilmgandhi | 18:6a4db94011d3 | 359 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 360 | */ |
sahilmgandhi | 18:6a4db94011d3 | 361 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) |
sahilmgandhi | 18:6a4db94011d3 | 362 | { |
sahilmgandhi | 18:6a4db94011d3 | 363 | pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR; |
sahilmgandhi | 18:6a4db94011d3 | 364 | |
sahilmgandhi | 18:6a4db94011d3 | 365 | /*Get WRP*/ |
sahilmgandhi | 18:6a4db94011d3 | 366 | pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP(); |
sahilmgandhi | 18:6a4db94011d3 | 367 | |
sahilmgandhi | 18:6a4db94011d3 | 368 | /*Get RDP Level*/ |
sahilmgandhi | 18:6a4db94011d3 | 369 | pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP(); |
sahilmgandhi | 18:6a4db94011d3 | 370 | |
sahilmgandhi | 18:6a4db94011d3 | 371 | /*Get USER*/ |
sahilmgandhi | 18:6a4db94011d3 | 372 | pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser(); |
sahilmgandhi | 18:6a4db94011d3 | 373 | |
sahilmgandhi | 18:6a4db94011d3 | 374 | /*Get BOR Level*/ |
sahilmgandhi | 18:6a4db94011d3 | 375 | pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR(); |
sahilmgandhi | 18:6a4db94011d3 | 376 | } |
sahilmgandhi | 18:6a4db94011d3 | 377 | |
sahilmgandhi | 18:6a4db94011d3 | 378 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 379 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 380 | defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 381 | defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 382 | defined(STM32F412Cx) |
sahilmgandhi | 18:6a4db94011d3 | 383 | /** |
sahilmgandhi | 18:6a4db94011d3 | 384 | * @brief Program option bytes |
sahilmgandhi | 18:6a4db94011d3 | 385 | * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that |
sahilmgandhi | 18:6a4db94011d3 | 386 | * contains the configuration information for the programming. |
sahilmgandhi | 18:6a4db94011d3 | 387 | * |
sahilmgandhi | 18:6a4db94011d3 | 388 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 389 | */ |
sahilmgandhi | 18:6a4db94011d3 | 390 | HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit) |
sahilmgandhi | 18:6a4db94011d3 | 391 | { |
sahilmgandhi | 18:6a4db94011d3 | 392 | HAL_StatusTypeDef status = HAL_ERROR; |
sahilmgandhi | 18:6a4db94011d3 | 393 | |
sahilmgandhi | 18:6a4db94011d3 | 394 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 395 | assert_param(IS_OBEX(pAdvOBInit->OptionType)); |
sahilmgandhi | 18:6a4db94011d3 | 396 | |
sahilmgandhi | 18:6a4db94011d3 | 397 | /*Program PCROP option byte*/ |
sahilmgandhi | 18:6a4db94011d3 | 398 | if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP) |
sahilmgandhi | 18:6a4db94011d3 | 399 | { |
sahilmgandhi | 18:6a4db94011d3 | 400 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 401 | assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState)); |
sahilmgandhi | 18:6a4db94011d3 | 402 | if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE) |
sahilmgandhi | 18:6a4db94011d3 | 403 | { |
sahilmgandhi | 18:6a4db94011d3 | 404 | /*Enable of Write protection on the selected Sector*/ |
sahilmgandhi | 18:6a4db94011d3 | 405 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 406 | defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 407 | defined(STM32F412Cx) |
sahilmgandhi | 18:6a4db94011d3 | 408 | status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors); |
sahilmgandhi | 18:6a4db94011d3 | 409 | #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ |
sahilmgandhi | 18:6a4db94011d3 | 410 | status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks); |
sahilmgandhi | 18:6a4db94011d3 | 411 | #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ |
sahilmgandhi | 18:6a4db94011d3 | 412 | } |
sahilmgandhi | 18:6a4db94011d3 | 413 | else |
sahilmgandhi | 18:6a4db94011d3 | 414 | { |
sahilmgandhi | 18:6a4db94011d3 | 415 | /*Disable of Write protection on the selected Sector*/ |
sahilmgandhi | 18:6a4db94011d3 | 416 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 417 | defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 418 | defined(STM32F412Cx) |
sahilmgandhi | 18:6a4db94011d3 | 419 | status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors); |
sahilmgandhi | 18:6a4db94011d3 | 420 | #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ |
sahilmgandhi | 18:6a4db94011d3 | 421 | status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks); |
sahilmgandhi | 18:6a4db94011d3 | 422 | #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ |
sahilmgandhi | 18:6a4db94011d3 | 423 | } |
sahilmgandhi | 18:6a4db94011d3 | 424 | } |
sahilmgandhi | 18:6a4db94011d3 | 425 | |
sahilmgandhi | 18:6a4db94011d3 | 426 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
sahilmgandhi | 18:6a4db94011d3 | 427 | /*Program BOOT config option byte*/ |
sahilmgandhi | 18:6a4db94011d3 | 428 | if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG) |
sahilmgandhi | 18:6a4db94011d3 | 429 | { |
sahilmgandhi | 18:6a4db94011d3 | 430 | status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig); |
sahilmgandhi | 18:6a4db94011d3 | 431 | } |
sahilmgandhi | 18:6a4db94011d3 | 432 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
sahilmgandhi | 18:6a4db94011d3 | 433 | |
sahilmgandhi | 18:6a4db94011d3 | 434 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 435 | } |
sahilmgandhi | 18:6a4db94011d3 | 436 | |
sahilmgandhi | 18:6a4db94011d3 | 437 | /** |
sahilmgandhi | 18:6a4db94011d3 | 438 | * @brief Get the OBEX byte configuration |
sahilmgandhi | 18:6a4db94011d3 | 439 | * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that |
sahilmgandhi | 18:6a4db94011d3 | 440 | * contains the configuration information for the programming. |
sahilmgandhi | 18:6a4db94011d3 | 441 | * |
sahilmgandhi | 18:6a4db94011d3 | 442 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 443 | */ |
sahilmgandhi | 18:6a4db94011d3 | 444 | void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit) |
sahilmgandhi | 18:6a4db94011d3 | 445 | { |
sahilmgandhi | 18:6a4db94011d3 | 446 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 447 | defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 448 | defined(STM32F412Cx) |
sahilmgandhi | 18:6a4db94011d3 | 449 | /*Get Sector*/ |
sahilmgandhi | 18:6a4db94011d3 | 450 | pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS)); |
sahilmgandhi | 18:6a4db94011d3 | 451 | #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ |
sahilmgandhi | 18:6a4db94011d3 | 452 | /*Get Sector for Bank1*/ |
sahilmgandhi | 18:6a4db94011d3 | 453 | pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS)); |
sahilmgandhi | 18:6a4db94011d3 | 454 | |
sahilmgandhi | 18:6a4db94011d3 | 455 | /*Get Sector for Bank2*/ |
sahilmgandhi | 18:6a4db94011d3 | 456 | pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS)); |
sahilmgandhi | 18:6a4db94011d3 | 457 | |
sahilmgandhi | 18:6a4db94011d3 | 458 | /*Get Boot config OB*/ |
sahilmgandhi | 18:6a4db94011d3 | 459 | pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS; |
sahilmgandhi | 18:6a4db94011d3 | 460 | #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ |
sahilmgandhi | 18:6a4db94011d3 | 461 | } |
sahilmgandhi | 18:6a4db94011d3 | 462 | |
sahilmgandhi | 18:6a4db94011d3 | 463 | /** |
sahilmgandhi | 18:6a4db94011d3 | 464 | * @brief Select the Protection Mode |
sahilmgandhi | 18:6a4db94011d3 | 465 | * |
sahilmgandhi | 18:6a4db94011d3 | 466 | * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted |
sahilmgandhi | 18:6a4db94011d3 | 467 | * Global Read Out Protection modification (from level1 to level0) |
sahilmgandhi | 18:6a4db94011d3 | 468 | * @note Once SPRMOD bit is active unprotection of a protected sector is not possible |
sahilmgandhi | 18:6a4db94011d3 | 469 | * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag |
sahilmgandhi | 18:6a4db94011d3 | 470 | * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/ |
sahilmgandhi | 18:6a4db94011d3 | 471 | * STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices. |
sahilmgandhi | 18:6a4db94011d3 | 472 | * |
sahilmgandhi | 18:6a4db94011d3 | 473 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 474 | */ |
sahilmgandhi | 18:6a4db94011d3 | 475 | HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void) |
sahilmgandhi | 18:6a4db94011d3 | 476 | { |
sahilmgandhi | 18:6a4db94011d3 | 477 | uint8_t optiontmp = 0xFFU; |
sahilmgandhi | 18:6a4db94011d3 | 478 | |
sahilmgandhi | 18:6a4db94011d3 | 479 | /* Mask SPRMOD bit */ |
sahilmgandhi | 18:6a4db94011d3 | 480 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7FU); |
sahilmgandhi | 18:6a4db94011d3 | 481 | |
sahilmgandhi | 18:6a4db94011d3 | 482 | /* Update Option Byte */ |
sahilmgandhi | 18:6a4db94011d3 | 483 | *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp); |
sahilmgandhi | 18:6a4db94011d3 | 484 | |
sahilmgandhi | 18:6a4db94011d3 | 485 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 486 | } |
sahilmgandhi | 18:6a4db94011d3 | 487 | |
sahilmgandhi | 18:6a4db94011d3 | 488 | /** |
sahilmgandhi | 18:6a4db94011d3 | 489 | * @brief Deselect the Protection Mode |
sahilmgandhi | 18:6a4db94011d3 | 490 | * |
sahilmgandhi | 18:6a4db94011d3 | 491 | * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted |
sahilmgandhi | 18:6a4db94011d3 | 492 | * Global Read Out Protection modification (from level1 to level0) |
sahilmgandhi | 18:6a4db94011d3 | 493 | * @note Once SPRMOD bit is active unprotection of a protected sector is not possible |
sahilmgandhi | 18:6a4db94011d3 | 494 | * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag |
sahilmgandhi | 18:6a4db94011d3 | 495 | * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/ |
sahilmgandhi | 18:6a4db94011d3 | 496 | * STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices. |
sahilmgandhi | 18:6a4db94011d3 | 497 | * |
sahilmgandhi | 18:6a4db94011d3 | 498 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 499 | */ |
sahilmgandhi | 18:6a4db94011d3 | 500 | HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void) |
sahilmgandhi | 18:6a4db94011d3 | 501 | { |
sahilmgandhi | 18:6a4db94011d3 | 502 | uint8_t optiontmp = 0xFFU; |
sahilmgandhi | 18:6a4db94011d3 | 503 | |
sahilmgandhi | 18:6a4db94011d3 | 504 | /* Mask SPRMOD bit */ |
sahilmgandhi | 18:6a4db94011d3 | 505 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7FU); |
sahilmgandhi | 18:6a4db94011d3 | 506 | |
sahilmgandhi | 18:6a4db94011d3 | 507 | /* Update Option Byte */ |
sahilmgandhi | 18:6a4db94011d3 | 508 | *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp); |
sahilmgandhi | 18:6a4db94011d3 | 509 | |
sahilmgandhi | 18:6a4db94011d3 | 510 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 511 | } |
sahilmgandhi | 18:6a4db94011d3 | 512 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\ |
sahilmgandhi | 18:6a4db94011d3 | 513 | STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ |
sahilmgandhi | 18:6a4db94011d3 | 514 | |
sahilmgandhi | 18:6a4db94011d3 | 515 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
sahilmgandhi | 18:6a4db94011d3 | 516 | /** |
sahilmgandhi | 18:6a4db94011d3 | 517 | * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2 |
sahilmgandhi | 18:6a4db94011d3 | 518 | * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices. |
sahilmgandhi | 18:6a4db94011d3 | 519 | * @retval The FLASH Write Protection Option Bytes value |
sahilmgandhi | 18:6a4db94011d3 | 520 | */ |
sahilmgandhi | 18:6a4db94011d3 | 521 | uint16_t HAL_FLASHEx_OB_GetBank2WRP(void) |
sahilmgandhi | 18:6a4db94011d3 | 522 | { |
sahilmgandhi | 18:6a4db94011d3 | 523 | /* Return the FLASH write protection Register value */ |
sahilmgandhi | 18:6a4db94011d3 | 524 | return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS)); |
sahilmgandhi | 18:6a4db94011d3 | 525 | } |
sahilmgandhi | 18:6a4db94011d3 | 526 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
sahilmgandhi | 18:6a4db94011d3 | 527 | |
sahilmgandhi | 18:6a4db94011d3 | 528 | /** |
sahilmgandhi | 18:6a4db94011d3 | 529 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 530 | */ |
sahilmgandhi | 18:6a4db94011d3 | 531 | |
sahilmgandhi | 18:6a4db94011d3 | 532 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
sahilmgandhi | 18:6a4db94011d3 | 533 | /** |
sahilmgandhi | 18:6a4db94011d3 | 534 | * @brief Full erase of FLASH memory sectors |
sahilmgandhi | 18:6a4db94011d3 | 535 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
sahilmgandhi | 18:6a4db94011d3 | 536 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 537 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
sahilmgandhi | 18:6a4db94011d3 | 538 | * the operation will be done by byte (8-bit) |
sahilmgandhi | 18:6a4db94011d3 | 539 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
sahilmgandhi | 18:6a4db94011d3 | 540 | * the operation will be done by half word (16-bit) |
sahilmgandhi | 18:6a4db94011d3 | 541 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
sahilmgandhi | 18:6a4db94011d3 | 542 | * the operation will be done by word (32-bit) |
sahilmgandhi | 18:6a4db94011d3 | 543 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
sahilmgandhi | 18:6a4db94011d3 | 544 | * the operation will be done by double word (64-bit) |
sahilmgandhi | 18:6a4db94011d3 | 545 | * |
sahilmgandhi | 18:6a4db94011d3 | 546 | * @param Banks: Banks to be erased |
sahilmgandhi | 18:6a4db94011d3 | 547 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 548 | * @arg FLASH_BANK_1: Bank1 to be erased |
sahilmgandhi | 18:6a4db94011d3 | 549 | * @arg FLASH_BANK_2: Bank2 to be erased |
sahilmgandhi | 18:6a4db94011d3 | 550 | * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased |
sahilmgandhi | 18:6a4db94011d3 | 551 | * |
sahilmgandhi | 18:6a4db94011d3 | 552 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 553 | */ |
sahilmgandhi | 18:6a4db94011d3 | 554 | static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks) |
sahilmgandhi | 18:6a4db94011d3 | 555 | { |
sahilmgandhi | 18:6a4db94011d3 | 556 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 557 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
sahilmgandhi | 18:6a4db94011d3 | 558 | assert_param(IS_FLASH_BANK(Banks)); |
sahilmgandhi | 18:6a4db94011d3 | 559 | |
sahilmgandhi | 18:6a4db94011d3 | 560 | /* if the previous operation is completed, proceed to erase all sectors */ |
sahilmgandhi | 18:6a4db94011d3 | 561 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
sahilmgandhi | 18:6a4db94011d3 | 562 | |
sahilmgandhi | 18:6a4db94011d3 | 563 | if(Banks == FLASH_BANK_BOTH) |
sahilmgandhi | 18:6a4db94011d3 | 564 | { |
sahilmgandhi | 18:6a4db94011d3 | 565 | /* bank1 & bank2 will be erased*/ |
sahilmgandhi | 18:6a4db94011d3 | 566 | FLASH->CR |= FLASH_MER_BIT; |
sahilmgandhi | 18:6a4db94011d3 | 567 | } |
sahilmgandhi | 18:6a4db94011d3 | 568 | else if(Banks == FLASH_BANK_1) |
sahilmgandhi | 18:6a4db94011d3 | 569 | { |
sahilmgandhi | 18:6a4db94011d3 | 570 | /*Only bank1 will be erased*/ |
sahilmgandhi | 18:6a4db94011d3 | 571 | FLASH->CR |= FLASH_CR_MER1; |
sahilmgandhi | 18:6a4db94011d3 | 572 | } |
sahilmgandhi | 18:6a4db94011d3 | 573 | else |
sahilmgandhi | 18:6a4db94011d3 | 574 | { |
sahilmgandhi | 18:6a4db94011d3 | 575 | /*Only bank2 will be erased*/ |
sahilmgandhi | 18:6a4db94011d3 | 576 | FLASH->CR |= FLASH_CR_MER2; |
sahilmgandhi | 18:6a4db94011d3 | 577 | } |
sahilmgandhi | 18:6a4db94011d3 | 578 | FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U); |
sahilmgandhi | 18:6a4db94011d3 | 579 | } |
sahilmgandhi | 18:6a4db94011d3 | 580 | |
sahilmgandhi | 18:6a4db94011d3 | 581 | /** |
sahilmgandhi | 18:6a4db94011d3 | 582 | * @brief Erase the specified FLASH memory sector |
sahilmgandhi | 18:6a4db94011d3 | 583 | * @param Sector: FLASH sector to erase |
sahilmgandhi | 18:6a4db94011d3 | 584 | * The value of this parameter depend on device used within the same series |
sahilmgandhi | 18:6a4db94011d3 | 585 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
sahilmgandhi | 18:6a4db94011d3 | 586 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 587 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
sahilmgandhi | 18:6a4db94011d3 | 588 | * the operation will be done by byte (8-bit) |
sahilmgandhi | 18:6a4db94011d3 | 589 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
sahilmgandhi | 18:6a4db94011d3 | 590 | * the operation will be done by half word (16-bit) |
sahilmgandhi | 18:6a4db94011d3 | 591 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
sahilmgandhi | 18:6a4db94011d3 | 592 | * the operation will be done by word (32-bit) |
sahilmgandhi | 18:6a4db94011d3 | 593 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
sahilmgandhi | 18:6a4db94011d3 | 594 | * the operation will be done by double word (64-bit) |
sahilmgandhi | 18:6a4db94011d3 | 595 | * |
sahilmgandhi | 18:6a4db94011d3 | 596 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 597 | */ |
sahilmgandhi | 18:6a4db94011d3 | 598 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange) |
sahilmgandhi | 18:6a4db94011d3 | 599 | { |
sahilmgandhi | 18:6a4db94011d3 | 600 | uint32_t tmp_psize = 0U; |
sahilmgandhi | 18:6a4db94011d3 | 601 | |
sahilmgandhi | 18:6a4db94011d3 | 602 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 603 | assert_param(IS_FLASH_SECTOR(Sector)); |
sahilmgandhi | 18:6a4db94011d3 | 604 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
sahilmgandhi | 18:6a4db94011d3 | 605 | |
sahilmgandhi | 18:6a4db94011d3 | 606 | if(VoltageRange == FLASH_VOLTAGE_RANGE_1) |
sahilmgandhi | 18:6a4db94011d3 | 607 | { |
sahilmgandhi | 18:6a4db94011d3 | 608 | tmp_psize = FLASH_PSIZE_BYTE; |
sahilmgandhi | 18:6a4db94011d3 | 609 | } |
sahilmgandhi | 18:6a4db94011d3 | 610 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_2) |
sahilmgandhi | 18:6a4db94011d3 | 611 | { |
sahilmgandhi | 18:6a4db94011d3 | 612 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
sahilmgandhi | 18:6a4db94011d3 | 613 | } |
sahilmgandhi | 18:6a4db94011d3 | 614 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_3) |
sahilmgandhi | 18:6a4db94011d3 | 615 | { |
sahilmgandhi | 18:6a4db94011d3 | 616 | tmp_psize = FLASH_PSIZE_WORD; |
sahilmgandhi | 18:6a4db94011d3 | 617 | } |
sahilmgandhi | 18:6a4db94011d3 | 618 | else |
sahilmgandhi | 18:6a4db94011d3 | 619 | { |
sahilmgandhi | 18:6a4db94011d3 | 620 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
sahilmgandhi | 18:6a4db94011d3 | 621 | } |
sahilmgandhi | 18:6a4db94011d3 | 622 | |
sahilmgandhi | 18:6a4db94011d3 | 623 | /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */ |
sahilmgandhi | 18:6a4db94011d3 | 624 | if(Sector > FLASH_SECTOR_11) |
sahilmgandhi | 18:6a4db94011d3 | 625 | { |
sahilmgandhi | 18:6a4db94011d3 | 626 | Sector += 4U; |
sahilmgandhi | 18:6a4db94011d3 | 627 | } |
sahilmgandhi | 18:6a4db94011d3 | 628 | /* If the previous operation is completed, proceed to erase the sector */ |
sahilmgandhi | 18:6a4db94011d3 | 629 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
sahilmgandhi | 18:6a4db94011d3 | 630 | FLASH->CR |= tmp_psize; |
sahilmgandhi | 18:6a4db94011d3 | 631 | CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); |
sahilmgandhi | 18:6a4db94011d3 | 632 | FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB)); |
sahilmgandhi | 18:6a4db94011d3 | 633 | FLASH->CR |= FLASH_CR_STRT; |
sahilmgandhi | 18:6a4db94011d3 | 634 | } |
sahilmgandhi | 18:6a4db94011d3 | 635 | |
sahilmgandhi | 18:6a4db94011d3 | 636 | /** |
sahilmgandhi | 18:6a4db94011d3 | 637 | * @brief Enable the write protection of the desired bank1 or bank 2 sectors |
sahilmgandhi | 18:6a4db94011d3 | 638 | * |
sahilmgandhi | 18:6a4db94011d3 | 639 | * @note When the memory read protection level is selected (RDP level = 1), |
sahilmgandhi | 18:6a4db94011d3 | 640 | * it is not possible to program or erase the flash sector i if CortexM4 |
sahilmgandhi | 18:6a4db94011d3 | 641 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
sahilmgandhi | 18:6a4db94011d3 | 642 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
sahilmgandhi | 18:6a4db94011d3 | 643 | * |
sahilmgandhi | 18:6a4db94011d3 | 644 | * @param WRPSector: specifies the sector(s) to be write protected. |
sahilmgandhi | 18:6a4db94011d3 | 645 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 646 | * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23 |
sahilmgandhi | 18:6a4db94011d3 | 647 | * @arg OB_WRP_SECTOR_All |
sahilmgandhi | 18:6a4db94011d3 | 648 | * @note BANK2 starts from OB_WRP_SECTOR_12 |
sahilmgandhi | 18:6a4db94011d3 | 649 | * |
sahilmgandhi | 18:6a4db94011d3 | 650 | * @param Banks: Enable write protection on all the sectors for the specific bank |
sahilmgandhi | 18:6a4db94011d3 | 651 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 652 | * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
sahilmgandhi | 18:6a4db94011d3 | 653 | * @arg FLASH_BANK_2: WRP on all sectors of bank2 |
sahilmgandhi | 18:6a4db94011d3 | 654 | * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2 |
sahilmgandhi | 18:6a4db94011d3 | 655 | * |
sahilmgandhi | 18:6a4db94011d3 | 656 | * @retval HAL FLASH State |
sahilmgandhi | 18:6a4db94011d3 | 657 | */ |
sahilmgandhi | 18:6a4db94011d3 | 658 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks) |
sahilmgandhi | 18:6a4db94011d3 | 659 | { |
sahilmgandhi | 18:6a4db94011d3 | 660 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 661 | |
sahilmgandhi | 18:6a4db94011d3 | 662 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 663 | assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
sahilmgandhi | 18:6a4db94011d3 | 664 | assert_param(IS_FLASH_BANK(Banks)); |
sahilmgandhi | 18:6a4db94011d3 | 665 | |
sahilmgandhi | 18:6a4db94011d3 | 666 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 667 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 668 | |
sahilmgandhi | 18:6a4db94011d3 | 669 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 670 | { |
sahilmgandhi | 18:6a4db94011d3 | 671 | if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) || |
sahilmgandhi | 18:6a4db94011d3 | 672 | (WRPSector < OB_WRP_SECTOR_12)) |
sahilmgandhi | 18:6a4db94011d3 | 673 | { |
sahilmgandhi | 18:6a4db94011d3 | 674 | if(WRPSector == OB_WRP_SECTOR_All) |
sahilmgandhi | 18:6a4db94011d3 | 675 | { |
sahilmgandhi | 18:6a4db94011d3 | 676 | /*Write protection on all sector of BANK1*/ |
sahilmgandhi | 18:6a4db94011d3 | 677 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12U)); |
sahilmgandhi | 18:6a4db94011d3 | 678 | } |
sahilmgandhi | 18:6a4db94011d3 | 679 | else |
sahilmgandhi | 18:6a4db94011d3 | 680 | { |
sahilmgandhi | 18:6a4db94011d3 | 681 | /*Write protection done on sectors of BANK1*/ |
sahilmgandhi | 18:6a4db94011d3 | 682 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector); |
sahilmgandhi | 18:6a4db94011d3 | 683 | } |
sahilmgandhi | 18:6a4db94011d3 | 684 | } |
sahilmgandhi | 18:6a4db94011d3 | 685 | else |
sahilmgandhi | 18:6a4db94011d3 | 686 | { |
sahilmgandhi | 18:6a4db94011d3 | 687 | /*Write protection done on sectors of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 688 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12U)); |
sahilmgandhi | 18:6a4db94011d3 | 689 | } |
sahilmgandhi | 18:6a4db94011d3 | 690 | |
sahilmgandhi | 18:6a4db94011d3 | 691 | /*Write protection on all sector of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 692 | if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH)) |
sahilmgandhi | 18:6a4db94011d3 | 693 | { |
sahilmgandhi | 18:6a4db94011d3 | 694 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 695 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 696 | |
sahilmgandhi | 18:6a4db94011d3 | 697 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 698 | { |
sahilmgandhi | 18:6a4db94011d3 | 699 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12U)); |
sahilmgandhi | 18:6a4db94011d3 | 700 | } |
sahilmgandhi | 18:6a4db94011d3 | 701 | } |
sahilmgandhi | 18:6a4db94011d3 | 702 | |
sahilmgandhi | 18:6a4db94011d3 | 703 | } |
sahilmgandhi | 18:6a4db94011d3 | 704 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 705 | } |
sahilmgandhi | 18:6a4db94011d3 | 706 | |
sahilmgandhi | 18:6a4db94011d3 | 707 | /** |
sahilmgandhi | 18:6a4db94011d3 | 708 | * @brief Disable the write protection of the desired bank1 or bank 2 sectors |
sahilmgandhi | 18:6a4db94011d3 | 709 | * |
sahilmgandhi | 18:6a4db94011d3 | 710 | * @note When the memory read protection level is selected (RDP level = 1), |
sahilmgandhi | 18:6a4db94011d3 | 711 | * it is not possible to program or erase the flash sector i if CortexM4 |
sahilmgandhi | 18:6a4db94011d3 | 712 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
sahilmgandhi | 18:6a4db94011d3 | 713 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
sahilmgandhi | 18:6a4db94011d3 | 714 | * |
sahilmgandhi | 18:6a4db94011d3 | 715 | * @param WRPSector: specifies the sector(s) to be write protected. |
sahilmgandhi | 18:6a4db94011d3 | 716 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 717 | * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23 |
sahilmgandhi | 18:6a4db94011d3 | 718 | * @arg OB_WRP_Sector_All |
sahilmgandhi | 18:6a4db94011d3 | 719 | * @note BANK2 starts from OB_WRP_SECTOR_12 |
sahilmgandhi | 18:6a4db94011d3 | 720 | * |
sahilmgandhi | 18:6a4db94011d3 | 721 | * @param Banks: Disable write protection on all the sectors for the specific bank |
sahilmgandhi | 18:6a4db94011d3 | 722 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 723 | * @arg FLASH_BANK_1: Bank1 to be erased |
sahilmgandhi | 18:6a4db94011d3 | 724 | * @arg FLASH_BANK_2: Bank2 to be erased |
sahilmgandhi | 18:6a4db94011d3 | 725 | * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased |
sahilmgandhi | 18:6a4db94011d3 | 726 | * |
sahilmgandhi | 18:6a4db94011d3 | 727 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 728 | */ |
sahilmgandhi | 18:6a4db94011d3 | 729 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks) |
sahilmgandhi | 18:6a4db94011d3 | 730 | { |
sahilmgandhi | 18:6a4db94011d3 | 731 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 732 | |
sahilmgandhi | 18:6a4db94011d3 | 733 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 734 | assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
sahilmgandhi | 18:6a4db94011d3 | 735 | assert_param(IS_FLASH_BANK(Banks)); |
sahilmgandhi | 18:6a4db94011d3 | 736 | |
sahilmgandhi | 18:6a4db94011d3 | 737 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 738 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 739 | |
sahilmgandhi | 18:6a4db94011d3 | 740 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 741 | { |
sahilmgandhi | 18:6a4db94011d3 | 742 | if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) || |
sahilmgandhi | 18:6a4db94011d3 | 743 | (WRPSector < OB_WRP_SECTOR_12)) |
sahilmgandhi | 18:6a4db94011d3 | 744 | { |
sahilmgandhi | 18:6a4db94011d3 | 745 | if(WRPSector == OB_WRP_SECTOR_All) |
sahilmgandhi | 18:6a4db94011d3 | 746 | { |
sahilmgandhi | 18:6a4db94011d3 | 747 | /*Write protection on all sector of BANK1*/ |
sahilmgandhi | 18:6a4db94011d3 | 748 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12U); |
sahilmgandhi | 18:6a4db94011d3 | 749 | } |
sahilmgandhi | 18:6a4db94011d3 | 750 | else |
sahilmgandhi | 18:6a4db94011d3 | 751 | { |
sahilmgandhi | 18:6a4db94011d3 | 752 | /*Write protection done on sectors of BANK1*/ |
sahilmgandhi | 18:6a4db94011d3 | 753 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector; |
sahilmgandhi | 18:6a4db94011d3 | 754 | } |
sahilmgandhi | 18:6a4db94011d3 | 755 | } |
sahilmgandhi | 18:6a4db94011d3 | 756 | else |
sahilmgandhi | 18:6a4db94011d3 | 757 | { |
sahilmgandhi | 18:6a4db94011d3 | 758 | /*Write protection done on sectors of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 759 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12U); |
sahilmgandhi | 18:6a4db94011d3 | 760 | } |
sahilmgandhi | 18:6a4db94011d3 | 761 | |
sahilmgandhi | 18:6a4db94011d3 | 762 | /*Write protection on all sector of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 763 | if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH)) |
sahilmgandhi | 18:6a4db94011d3 | 764 | { |
sahilmgandhi | 18:6a4db94011d3 | 765 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 766 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 767 | |
sahilmgandhi | 18:6a4db94011d3 | 768 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 769 | { |
sahilmgandhi | 18:6a4db94011d3 | 770 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12U); |
sahilmgandhi | 18:6a4db94011d3 | 771 | } |
sahilmgandhi | 18:6a4db94011d3 | 772 | } |
sahilmgandhi | 18:6a4db94011d3 | 773 | |
sahilmgandhi | 18:6a4db94011d3 | 774 | } |
sahilmgandhi | 18:6a4db94011d3 | 775 | |
sahilmgandhi | 18:6a4db94011d3 | 776 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 777 | } |
sahilmgandhi | 18:6a4db94011d3 | 778 | |
sahilmgandhi | 18:6a4db94011d3 | 779 | /** |
sahilmgandhi | 18:6a4db94011d3 | 780 | * @brief Configure the Dual Bank Boot. |
sahilmgandhi | 18:6a4db94011d3 | 781 | * |
sahilmgandhi | 18:6a4db94011d3 | 782 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
sahilmgandhi | 18:6a4db94011d3 | 783 | * |
sahilmgandhi | 18:6a4db94011d3 | 784 | * @param BootConfig specifies the Dual Bank Boot Option byte. |
sahilmgandhi | 18:6a4db94011d3 | 785 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 786 | * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable |
sahilmgandhi | 18:6a4db94011d3 | 787 | * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled |
sahilmgandhi | 18:6a4db94011d3 | 788 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 789 | */ |
sahilmgandhi | 18:6a4db94011d3 | 790 | static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig) |
sahilmgandhi | 18:6a4db94011d3 | 791 | { |
sahilmgandhi | 18:6a4db94011d3 | 792 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 793 | |
sahilmgandhi | 18:6a4db94011d3 | 794 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 795 | assert_param(IS_OB_BOOT(BootConfig)); |
sahilmgandhi | 18:6a4db94011d3 | 796 | |
sahilmgandhi | 18:6a4db94011d3 | 797 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 798 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 799 | |
sahilmgandhi | 18:6a4db94011d3 | 800 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 801 | { |
sahilmgandhi | 18:6a4db94011d3 | 802 | /* Set Dual Bank Boot */ |
sahilmgandhi | 18:6a4db94011d3 | 803 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2); |
sahilmgandhi | 18:6a4db94011d3 | 804 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig; |
sahilmgandhi | 18:6a4db94011d3 | 805 | } |
sahilmgandhi | 18:6a4db94011d3 | 806 | |
sahilmgandhi | 18:6a4db94011d3 | 807 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 808 | } |
sahilmgandhi | 18:6a4db94011d3 | 809 | |
sahilmgandhi | 18:6a4db94011d3 | 810 | /** |
sahilmgandhi | 18:6a4db94011d3 | 811 | * @brief Enable the read/write protection (PCROP) of the desired |
sahilmgandhi | 18:6a4db94011d3 | 812 | * sectors of Bank 1 and/or Bank 2. |
sahilmgandhi | 18:6a4db94011d3 | 813 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
sahilmgandhi | 18:6a4db94011d3 | 814 | * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1. |
sahilmgandhi | 18:6a4db94011d3 | 815 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 816 | * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11 |
sahilmgandhi | 18:6a4db94011d3 | 817 | * @arg OB_PCROP_SECTOR__All |
sahilmgandhi | 18:6a4db94011d3 | 818 | * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2. |
sahilmgandhi | 18:6a4db94011d3 | 819 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 820 | * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23 |
sahilmgandhi | 18:6a4db94011d3 | 821 | * @arg OB_PCROP_SECTOR__All |
sahilmgandhi | 18:6a4db94011d3 | 822 | * @param Banks Enable PCROP protection on all the sectors for the specific bank |
sahilmgandhi | 18:6a4db94011d3 | 823 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 824 | * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
sahilmgandhi | 18:6a4db94011d3 | 825 | * @arg FLASH_BANK_2: WRP on all sectors of bank2 |
sahilmgandhi | 18:6a4db94011d3 | 826 | * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2 |
sahilmgandhi | 18:6a4db94011d3 | 827 | * |
sahilmgandhi | 18:6a4db94011d3 | 828 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 829 | */ |
sahilmgandhi | 18:6a4db94011d3 | 830 | static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks) |
sahilmgandhi | 18:6a4db94011d3 | 831 | { |
sahilmgandhi | 18:6a4db94011d3 | 832 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 833 | |
sahilmgandhi | 18:6a4db94011d3 | 834 | assert_param(IS_FLASH_BANK(Banks)); |
sahilmgandhi | 18:6a4db94011d3 | 835 | |
sahilmgandhi | 18:6a4db94011d3 | 836 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 837 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 838 | |
sahilmgandhi | 18:6a4db94011d3 | 839 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 840 | { |
sahilmgandhi | 18:6a4db94011d3 | 841 | if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH)) |
sahilmgandhi | 18:6a4db94011d3 | 842 | { |
sahilmgandhi | 18:6a4db94011d3 | 843 | assert_param(IS_OB_PCROP(SectorBank1)); |
sahilmgandhi | 18:6a4db94011d3 | 844 | /*Write protection done on sectors of BANK1*/ |
sahilmgandhi | 18:6a4db94011d3 | 845 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1; |
sahilmgandhi | 18:6a4db94011d3 | 846 | } |
sahilmgandhi | 18:6a4db94011d3 | 847 | else |
sahilmgandhi | 18:6a4db94011d3 | 848 | { |
sahilmgandhi | 18:6a4db94011d3 | 849 | assert_param(IS_OB_PCROP(SectorBank2)); |
sahilmgandhi | 18:6a4db94011d3 | 850 | /*Write protection done on sectors of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 851 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2; |
sahilmgandhi | 18:6a4db94011d3 | 852 | } |
sahilmgandhi | 18:6a4db94011d3 | 853 | |
sahilmgandhi | 18:6a4db94011d3 | 854 | /*Write protection on all sector of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 855 | if(Banks == FLASH_BANK_BOTH) |
sahilmgandhi | 18:6a4db94011d3 | 856 | { |
sahilmgandhi | 18:6a4db94011d3 | 857 | assert_param(IS_OB_PCROP(SectorBank2)); |
sahilmgandhi | 18:6a4db94011d3 | 858 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 859 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 860 | |
sahilmgandhi | 18:6a4db94011d3 | 861 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 862 | { |
sahilmgandhi | 18:6a4db94011d3 | 863 | /*Write protection done on sectors of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 864 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2; |
sahilmgandhi | 18:6a4db94011d3 | 865 | } |
sahilmgandhi | 18:6a4db94011d3 | 866 | } |
sahilmgandhi | 18:6a4db94011d3 | 867 | |
sahilmgandhi | 18:6a4db94011d3 | 868 | } |
sahilmgandhi | 18:6a4db94011d3 | 869 | |
sahilmgandhi | 18:6a4db94011d3 | 870 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 871 | } |
sahilmgandhi | 18:6a4db94011d3 | 872 | |
sahilmgandhi | 18:6a4db94011d3 | 873 | |
sahilmgandhi | 18:6a4db94011d3 | 874 | /** |
sahilmgandhi | 18:6a4db94011d3 | 875 | * @brief Disable the read/write protection (PCROP) of the desired |
sahilmgandhi | 18:6a4db94011d3 | 876 | * sectors of Bank 1 and/or Bank 2. |
sahilmgandhi | 18:6a4db94011d3 | 877 | * @note This function can be used only for STM32F42xxx/43xxx devices. |
sahilmgandhi | 18:6a4db94011d3 | 878 | * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1. |
sahilmgandhi | 18:6a4db94011d3 | 879 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 880 | * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11 |
sahilmgandhi | 18:6a4db94011d3 | 881 | * @arg OB_PCROP_SECTOR__All |
sahilmgandhi | 18:6a4db94011d3 | 882 | * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2. |
sahilmgandhi | 18:6a4db94011d3 | 883 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 884 | * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23 |
sahilmgandhi | 18:6a4db94011d3 | 885 | * @arg OB_PCROP_SECTOR__All |
sahilmgandhi | 18:6a4db94011d3 | 886 | * @param Banks Disable PCROP protection on all the sectors for the specific bank |
sahilmgandhi | 18:6a4db94011d3 | 887 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 888 | * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
sahilmgandhi | 18:6a4db94011d3 | 889 | * @arg FLASH_BANK_2: WRP on all sectors of bank2 |
sahilmgandhi | 18:6a4db94011d3 | 890 | * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2 |
sahilmgandhi | 18:6a4db94011d3 | 891 | * |
sahilmgandhi | 18:6a4db94011d3 | 892 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 893 | */ |
sahilmgandhi | 18:6a4db94011d3 | 894 | static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks) |
sahilmgandhi | 18:6a4db94011d3 | 895 | { |
sahilmgandhi | 18:6a4db94011d3 | 896 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 897 | |
sahilmgandhi | 18:6a4db94011d3 | 898 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 899 | assert_param(IS_FLASH_BANK(Banks)); |
sahilmgandhi | 18:6a4db94011d3 | 900 | |
sahilmgandhi | 18:6a4db94011d3 | 901 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 902 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 903 | |
sahilmgandhi | 18:6a4db94011d3 | 904 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 905 | { |
sahilmgandhi | 18:6a4db94011d3 | 906 | if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH)) |
sahilmgandhi | 18:6a4db94011d3 | 907 | { |
sahilmgandhi | 18:6a4db94011d3 | 908 | assert_param(IS_OB_PCROP(SectorBank1)); |
sahilmgandhi | 18:6a4db94011d3 | 909 | /*Write protection done on sectors of BANK1*/ |
sahilmgandhi | 18:6a4db94011d3 | 910 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1); |
sahilmgandhi | 18:6a4db94011d3 | 911 | } |
sahilmgandhi | 18:6a4db94011d3 | 912 | else |
sahilmgandhi | 18:6a4db94011d3 | 913 | { |
sahilmgandhi | 18:6a4db94011d3 | 914 | /*Write protection done on sectors of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 915 | assert_param(IS_OB_PCROP(SectorBank2)); |
sahilmgandhi | 18:6a4db94011d3 | 916 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2); |
sahilmgandhi | 18:6a4db94011d3 | 917 | } |
sahilmgandhi | 18:6a4db94011d3 | 918 | |
sahilmgandhi | 18:6a4db94011d3 | 919 | /*Write protection on all sector of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 920 | if(Banks == FLASH_BANK_BOTH) |
sahilmgandhi | 18:6a4db94011d3 | 921 | { |
sahilmgandhi | 18:6a4db94011d3 | 922 | assert_param(IS_OB_PCROP(SectorBank2)); |
sahilmgandhi | 18:6a4db94011d3 | 923 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 924 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 925 | |
sahilmgandhi | 18:6a4db94011d3 | 926 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 927 | { |
sahilmgandhi | 18:6a4db94011d3 | 928 | /*Write protection done on sectors of BANK2*/ |
sahilmgandhi | 18:6a4db94011d3 | 929 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2); |
sahilmgandhi | 18:6a4db94011d3 | 930 | } |
sahilmgandhi | 18:6a4db94011d3 | 931 | } |
sahilmgandhi | 18:6a4db94011d3 | 932 | |
sahilmgandhi | 18:6a4db94011d3 | 933 | } |
sahilmgandhi | 18:6a4db94011d3 | 934 | |
sahilmgandhi | 18:6a4db94011d3 | 935 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 936 | |
sahilmgandhi | 18:6a4db94011d3 | 937 | } |
sahilmgandhi | 18:6a4db94011d3 | 938 | |
sahilmgandhi | 18:6a4db94011d3 | 939 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
sahilmgandhi | 18:6a4db94011d3 | 940 | |
sahilmgandhi | 18:6a4db94011d3 | 941 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 942 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 943 | defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 944 | defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) |
sahilmgandhi | 18:6a4db94011d3 | 945 | /** |
sahilmgandhi | 18:6a4db94011d3 | 946 | * @brief Mass erase of FLASH memory |
sahilmgandhi | 18:6a4db94011d3 | 947 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
sahilmgandhi | 18:6a4db94011d3 | 948 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 949 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
sahilmgandhi | 18:6a4db94011d3 | 950 | * the operation will be done by byte (8-bit) |
sahilmgandhi | 18:6a4db94011d3 | 951 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
sahilmgandhi | 18:6a4db94011d3 | 952 | * the operation will be done by half word (16-bit) |
sahilmgandhi | 18:6a4db94011d3 | 953 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
sahilmgandhi | 18:6a4db94011d3 | 954 | * the operation will be done by word (32-bit) |
sahilmgandhi | 18:6a4db94011d3 | 955 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
sahilmgandhi | 18:6a4db94011d3 | 956 | * the operation will be done by double word (64-bit) |
sahilmgandhi | 18:6a4db94011d3 | 957 | * |
sahilmgandhi | 18:6a4db94011d3 | 958 | * @param Banks: Banks to be erased |
sahilmgandhi | 18:6a4db94011d3 | 959 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 960 | * @arg FLASH_BANK_1: Bank1 to be erased |
sahilmgandhi | 18:6a4db94011d3 | 961 | * |
sahilmgandhi | 18:6a4db94011d3 | 962 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 963 | */ |
sahilmgandhi | 18:6a4db94011d3 | 964 | static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks) |
sahilmgandhi | 18:6a4db94011d3 | 965 | { |
sahilmgandhi | 18:6a4db94011d3 | 966 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 967 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
sahilmgandhi | 18:6a4db94011d3 | 968 | assert_param(IS_FLASH_BANK(Banks)); |
sahilmgandhi | 18:6a4db94011d3 | 969 | |
sahilmgandhi | 18:6a4db94011d3 | 970 | /* If the previous operation is completed, proceed to erase all sectors */ |
sahilmgandhi | 18:6a4db94011d3 | 971 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
sahilmgandhi | 18:6a4db94011d3 | 972 | FLASH->CR |= FLASH_CR_MER; |
sahilmgandhi | 18:6a4db94011d3 | 973 | FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U); |
sahilmgandhi | 18:6a4db94011d3 | 974 | } |
sahilmgandhi | 18:6a4db94011d3 | 975 | |
sahilmgandhi | 18:6a4db94011d3 | 976 | /** |
sahilmgandhi | 18:6a4db94011d3 | 977 | * @brief Erase the specified FLASH memory sector |
sahilmgandhi | 18:6a4db94011d3 | 978 | * @param Sector: FLASH sector to erase |
sahilmgandhi | 18:6a4db94011d3 | 979 | * The value of this parameter depend on device used within the same series |
sahilmgandhi | 18:6a4db94011d3 | 980 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
sahilmgandhi | 18:6a4db94011d3 | 981 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 982 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
sahilmgandhi | 18:6a4db94011d3 | 983 | * the operation will be done by byte (8-bit) |
sahilmgandhi | 18:6a4db94011d3 | 984 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
sahilmgandhi | 18:6a4db94011d3 | 985 | * the operation will be done by half word (16-bit) |
sahilmgandhi | 18:6a4db94011d3 | 986 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
sahilmgandhi | 18:6a4db94011d3 | 987 | * the operation will be done by word (32-bit) |
sahilmgandhi | 18:6a4db94011d3 | 988 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
sahilmgandhi | 18:6a4db94011d3 | 989 | * the operation will be done by double word (64-bit) |
sahilmgandhi | 18:6a4db94011d3 | 990 | * |
sahilmgandhi | 18:6a4db94011d3 | 991 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 992 | */ |
sahilmgandhi | 18:6a4db94011d3 | 993 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange) |
sahilmgandhi | 18:6a4db94011d3 | 994 | { |
sahilmgandhi | 18:6a4db94011d3 | 995 | uint32_t tmp_psize = 0U; |
sahilmgandhi | 18:6a4db94011d3 | 996 | |
sahilmgandhi | 18:6a4db94011d3 | 997 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 998 | assert_param(IS_FLASH_SECTOR(Sector)); |
sahilmgandhi | 18:6a4db94011d3 | 999 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
sahilmgandhi | 18:6a4db94011d3 | 1000 | |
sahilmgandhi | 18:6a4db94011d3 | 1001 | if(VoltageRange == FLASH_VOLTAGE_RANGE_1) |
sahilmgandhi | 18:6a4db94011d3 | 1002 | { |
sahilmgandhi | 18:6a4db94011d3 | 1003 | tmp_psize = FLASH_PSIZE_BYTE; |
sahilmgandhi | 18:6a4db94011d3 | 1004 | } |
sahilmgandhi | 18:6a4db94011d3 | 1005 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_2) |
sahilmgandhi | 18:6a4db94011d3 | 1006 | { |
sahilmgandhi | 18:6a4db94011d3 | 1007 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
sahilmgandhi | 18:6a4db94011d3 | 1008 | } |
sahilmgandhi | 18:6a4db94011d3 | 1009 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_3) |
sahilmgandhi | 18:6a4db94011d3 | 1010 | { |
sahilmgandhi | 18:6a4db94011d3 | 1011 | tmp_psize = FLASH_PSIZE_WORD; |
sahilmgandhi | 18:6a4db94011d3 | 1012 | } |
sahilmgandhi | 18:6a4db94011d3 | 1013 | else |
sahilmgandhi | 18:6a4db94011d3 | 1014 | { |
sahilmgandhi | 18:6a4db94011d3 | 1015 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
sahilmgandhi | 18:6a4db94011d3 | 1016 | } |
sahilmgandhi | 18:6a4db94011d3 | 1017 | |
sahilmgandhi | 18:6a4db94011d3 | 1018 | /* If the previous operation is completed, proceed to erase the sector */ |
sahilmgandhi | 18:6a4db94011d3 | 1019 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
sahilmgandhi | 18:6a4db94011d3 | 1020 | FLASH->CR |= tmp_psize; |
sahilmgandhi | 18:6a4db94011d3 | 1021 | CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); |
sahilmgandhi | 18:6a4db94011d3 | 1022 | FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB)); |
sahilmgandhi | 18:6a4db94011d3 | 1023 | FLASH->CR |= FLASH_CR_STRT; |
sahilmgandhi | 18:6a4db94011d3 | 1024 | } |
sahilmgandhi | 18:6a4db94011d3 | 1025 | |
sahilmgandhi | 18:6a4db94011d3 | 1026 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1027 | * @brief Enable the write protection of the desired bank 1 sectors |
sahilmgandhi | 18:6a4db94011d3 | 1028 | * |
sahilmgandhi | 18:6a4db94011d3 | 1029 | * @note When the memory read protection level is selected (RDP level = 1), |
sahilmgandhi | 18:6a4db94011d3 | 1030 | * it is not possible to program or erase the flash sector i if CortexM4 |
sahilmgandhi | 18:6a4db94011d3 | 1031 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
sahilmgandhi | 18:6a4db94011d3 | 1032 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
sahilmgandhi | 18:6a4db94011d3 | 1033 | * |
sahilmgandhi | 18:6a4db94011d3 | 1034 | * @param WRPSector: specifies the sector(s) to be write protected. |
sahilmgandhi | 18:6a4db94011d3 | 1035 | * The value of this parameter depend on device used within the same series |
sahilmgandhi | 18:6a4db94011d3 | 1036 | * |
sahilmgandhi | 18:6a4db94011d3 | 1037 | * @param Banks: Enable write protection on all the sectors for the specific bank |
sahilmgandhi | 18:6a4db94011d3 | 1038 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1039 | * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
sahilmgandhi | 18:6a4db94011d3 | 1040 | * |
sahilmgandhi | 18:6a4db94011d3 | 1041 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 1042 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1043 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks) |
sahilmgandhi | 18:6a4db94011d3 | 1044 | { |
sahilmgandhi | 18:6a4db94011d3 | 1045 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1046 | |
sahilmgandhi | 18:6a4db94011d3 | 1047 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1048 | assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
sahilmgandhi | 18:6a4db94011d3 | 1049 | assert_param(IS_FLASH_BANK(Banks)); |
sahilmgandhi | 18:6a4db94011d3 | 1050 | |
sahilmgandhi | 18:6a4db94011d3 | 1051 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 1052 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 1053 | |
sahilmgandhi | 18:6a4db94011d3 | 1054 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 1055 | { |
sahilmgandhi | 18:6a4db94011d3 | 1056 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector); |
sahilmgandhi | 18:6a4db94011d3 | 1057 | } |
sahilmgandhi | 18:6a4db94011d3 | 1058 | |
sahilmgandhi | 18:6a4db94011d3 | 1059 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 1060 | } |
sahilmgandhi | 18:6a4db94011d3 | 1061 | |
sahilmgandhi | 18:6a4db94011d3 | 1062 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1063 | * @brief Disable the write protection of the desired bank 1 sectors |
sahilmgandhi | 18:6a4db94011d3 | 1064 | * |
sahilmgandhi | 18:6a4db94011d3 | 1065 | * @note When the memory read protection level is selected (RDP level = 1), |
sahilmgandhi | 18:6a4db94011d3 | 1066 | * it is not possible to program or erase the flash sector i if CortexM4 |
sahilmgandhi | 18:6a4db94011d3 | 1067 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
sahilmgandhi | 18:6a4db94011d3 | 1068 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
sahilmgandhi | 18:6a4db94011d3 | 1069 | * |
sahilmgandhi | 18:6a4db94011d3 | 1070 | * @param WRPSector: specifies the sector(s) to be write protected. |
sahilmgandhi | 18:6a4db94011d3 | 1071 | * The value of this parameter depend on device used within the same series |
sahilmgandhi | 18:6a4db94011d3 | 1072 | * |
sahilmgandhi | 18:6a4db94011d3 | 1073 | * @param Banks: Enable write protection on all the sectors for the specific bank |
sahilmgandhi | 18:6a4db94011d3 | 1074 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1075 | * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
sahilmgandhi | 18:6a4db94011d3 | 1076 | * |
sahilmgandhi | 18:6a4db94011d3 | 1077 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 1078 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1079 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks) |
sahilmgandhi | 18:6a4db94011d3 | 1080 | { |
sahilmgandhi | 18:6a4db94011d3 | 1081 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1082 | |
sahilmgandhi | 18:6a4db94011d3 | 1083 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1084 | assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
sahilmgandhi | 18:6a4db94011d3 | 1085 | assert_param(IS_FLASH_BANK(Banks)); |
sahilmgandhi | 18:6a4db94011d3 | 1086 | |
sahilmgandhi | 18:6a4db94011d3 | 1087 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 1088 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 1089 | |
sahilmgandhi | 18:6a4db94011d3 | 1090 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 1091 | { |
sahilmgandhi | 18:6a4db94011d3 | 1092 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector; |
sahilmgandhi | 18:6a4db94011d3 | 1093 | } |
sahilmgandhi | 18:6a4db94011d3 | 1094 | |
sahilmgandhi | 18:6a4db94011d3 | 1095 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 1096 | } |
sahilmgandhi | 18:6a4db94011d3 | 1097 | #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ |
sahilmgandhi | 18:6a4db94011d3 | 1098 | |
sahilmgandhi | 18:6a4db94011d3 | 1099 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 1100 | defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
sahilmgandhi | 18:6a4db94011d3 | 1101 | defined(STM32F412Cx) |
sahilmgandhi | 18:6a4db94011d3 | 1102 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1103 | * @brief Enable the read/write protection (PCROP) of the desired sectors. |
sahilmgandhi | 18:6a4db94011d3 | 1104 | * @note This function can be used only for STM32F401xx devices. |
sahilmgandhi | 18:6a4db94011d3 | 1105 | * @param Sector specifies the sector(s) to be read/write protected or unprotected. |
sahilmgandhi | 18:6a4db94011d3 | 1106 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1107 | * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5 |
sahilmgandhi | 18:6a4db94011d3 | 1108 | * @arg OB_PCROP_Sector_All |
sahilmgandhi | 18:6a4db94011d3 | 1109 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 1110 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1111 | static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector) |
sahilmgandhi | 18:6a4db94011d3 | 1112 | { |
sahilmgandhi | 18:6a4db94011d3 | 1113 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1114 | |
sahilmgandhi | 18:6a4db94011d3 | 1115 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1116 | assert_param(IS_OB_PCROP(Sector)); |
sahilmgandhi | 18:6a4db94011d3 | 1117 | |
sahilmgandhi | 18:6a4db94011d3 | 1118 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 1119 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 1120 | |
sahilmgandhi | 18:6a4db94011d3 | 1121 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 1122 | { |
sahilmgandhi | 18:6a4db94011d3 | 1123 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector; |
sahilmgandhi | 18:6a4db94011d3 | 1124 | } |
sahilmgandhi | 18:6a4db94011d3 | 1125 | |
sahilmgandhi | 18:6a4db94011d3 | 1126 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 1127 | } |
sahilmgandhi | 18:6a4db94011d3 | 1128 | |
sahilmgandhi | 18:6a4db94011d3 | 1129 | |
sahilmgandhi | 18:6a4db94011d3 | 1130 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1131 | * @brief Disable the read/write protection (PCROP) of the desired sectors. |
sahilmgandhi | 18:6a4db94011d3 | 1132 | * @note This function can be used only for STM32F401xx devices. |
sahilmgandhi | 18:6a4db94011d3 | 1133 | * @param Sector specifies the sector(s) to be read/write protected or unprotected. |
sahilmgandhi | 18:6a4db94011d3 | 1134 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1135 | * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5 |
sahilmgandhi | 18:6a4db94011d3 | 1136 | * @arg OB_PCROP_Sector_All |
sahilmgandhi | 18:6a4db94011d3 | 1137 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 1138 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1139 | static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector) |
sahilmgandhi | 18:6a4db94011d3 | 1140 | { |
sahilmgandhi | 18:6a4db94011d3 | 1141 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1142 | |
sahilmgandhi | 18:6a4db94011d3 | 1143 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1144 | assert_param(IS_OB_PCROP(Sector)); |
sahilmgandhi | 18:6a4db94011d3 | 1145 | |
sahilmgandhi | 18:6a4db94011d3 | 1146 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 1147 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 1148 | |
sahilmgandhi | 18:6a4db94011d3 | 1149 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 1150 | { |
sahilmgandhi | 18:6a4db94011d3 | 1151 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector); |
sahilmgandhi | 18:6a4db94011d3 | 1152 | } |
sahilmgandhi | 18:6a4db94011d3 | 1153 | |
sahilmgandhi | 18:6a4db94011d3 | 1154 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 1155 | |
sahilmgandhi | 18:6a4db94011d3 | 1156 | } |
sahilmgandhi | 18:6a4db94011d3 | 1157 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ |
sahilmgandhi | 18:6a4db94011d3 | 1158 | |
sahilmgandhi | 18:6a4db94011d3 | 1159 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1160 | * @brief Set the read protection level. |
sahilmgandhi | 18:6a4db94011d3 | 1161 | * @param Level: specifies the read protection level. |
sahilmgandhi | 18:6a4db94011d3 | 1162 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1163 | * @arg OB_RDP_LEVEL_0: No protection |
sahilmgandhi | 18:6a4db94011d3 | 1164 | * @arg OB_RDP_LEVEL_1: Read protection of the memory |
sahilmgandhi | 18:6a4db94011d3 | 1165 | * @arg OB_RDP_LEVEL_2: Full chip protection |
sahilmgandhi | 18:6a4db94011d3 | 1166 | * |
sahilmgandhi | 18:6a4db94011d3 | 1167 | * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 |
sahilmgandhi | 18:6a4db94011d3 | 1168 | * |
sahilmgandhi | 18:6a4db94011d3 | 1169 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 1170 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1171 | static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level) |
sahilmgandhi | 18:6a4db94011d3 | 1172 | { |
sahilmgandhi | 18:6a4db94011d3 | 1173 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1174 | |
sahilmgandhi | 18:6a4db94011d3 | 1175 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1176 | assert_param(IS_OB_RDP_LEVEL(Level)); |
sahilmgandhi | 18:6a4db94011d3 | 1177 | |
sahilmgandhi | 18:6a4db94011d3 | 1178 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 1179 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 1180 | |
sahilmgandhi | 18:6a4db94011d3 | 1181 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 1182 | { |
sahilmgandhi | 18:6a4db94011d3 | 1183 | *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level; |
sahilmgandhi | 18:6a4db94011d3 | 1184 | } |
sahilmgandhi | 18:6a4db94011d3 | 1185 | |
sahilmgandhi | 18:6a4db94011d3 | 1186 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 1187 | } |
sahilmgandhi | 18:6a4db94011d3 | 1188 | |
sahilmgandhi | 18:6a4db94011d3 | 1189 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1190 | * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
sahilmgandhi | 18:6a4db94011d3 | 1191 | * @param Iwdg: Selects the IWDG mode |
sahilmgandhi | 18:6a4db94011d3 | 1192 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1193 | * @arg OB_IWDG_SW: Software IWDG selected |
sahilmgandhi | 18:6a4db94011d3 | 1194 | * @arg OB_IWDG_HW: Hardware IWDG selected |
sahilmgandhi | 18:6a4db94011d3 | 1195 | * @param Stop: Reset event when entering STOP mode. |
sahilmgandhi | 18:6a4db94011d3 | 1196 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1197 | * @arg OB_STOP_NO_RST: No reset generated when entering in STOP |
sahilmgandhi | 18:6a4db94011d3 | 1198 | * @arg OB_STOP_RST: Reset generated when entering in STOP |
sahilmgandhi | 18:6a4db94011d3 | 1199 | * @param Stdby: Reset event when entering Standby mode. |
sahilmgandhi | 18:6a4db94011d3 | 1200 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1201 | * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY |
sahilmgandhi | 18:6a4db94011d3 | 1202 | * @arg OB_STDBY_RST: Reset generated when entering in STANDBY |
sahilmgandhi | 18:6a4db94011d3 | 1203 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 1204 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1205 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby) |
sahilmgandhi | 18:6a4db94011d3 | 1206 | { |
sahilmgandhi | 18:6a4db94011d3 | 1207 | uint8_t optiontmp = 0xFFU; |
sahilmgandhi | 18:6a4db94011d3 | 1208 | HAL_StatusTypeDef status = HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1209 | |
sahilmgandhi | 18:6a4db94011d3 | 1210 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1211 | assert_param(IS_OB_IWDG_SOURCE(Iwdg)); |
sahilmgandhi | 18:6a4db94011d3 | 1212 | assert_param(IS_OB_STOP_SOURCE(Stop)); |
sahilmgandhi | 18:6a4db94011d3 | 1213 | assert_param(IS_OB_STDBY_SOURCE(Stdby)); |
sahilmgandhi | 18:6a4db94011d3 | 1214 | |
sahilmgandhi | 18:6a4db94011d3 | 1215 | /* Wait for last operation to be completed */ |
sahilmgandhi | 18:6a4db94011d3 | 1216 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
sahilmgandhi | 18:6a4db94011d3 | 1217 | |
sahilmgandhi | 18:6a4db94011d3 | 1218 | if(status == HAL_OK) |
sahilmgandhi | 18:6a4db94011d3 | 1219 | { |
sahilmgandhi | 18:6a4db94011d3 | 1220 | /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */ |
sahilmgandhi | 18:6a4db94011d3 | 1221 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1FU); |
sahilmgandhi | 18:6a4db94011d3 | 1222 | |
sahilmgandhi | 18:6a4db94011d3 | 1223 | /* Update User Option Byte */ |
sahilmgandhi | 18:6a4db94011d3 | 1224 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp))); |
sahilmgandhi | 18:6a4db94011d3 | 1225 | } |
sahilmgandhi | 18:6a4db94011d3 | 1226 | |
sahilmgandhi | 18:6a4db94011d3 | 1227 | return status; |
sahilmgandhi | 18:6a4db94011d3 | 1228 | } |
sahilmgandhi | 18:6a4db94011d3 | 1229 | |
sahilmgandhi | 18:6a4db94011d3 | 1230 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1231 | * @brief Set the BOR Level. |
sahilmgandhi | 18:6a4db94011d3 | 1232 | * @param Level: specifies the Option Bytes BOR Reset Level. |
sahilmgandhi | 18:6a4db94011d3 | 1233 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1234 | * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
sahilmgandhi | 18:6a4db94011d3 | 1235 | * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
sahilmgandhi | 18:6a4db94011d3 | 1236 | * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
sahilmgandhi | 18:6a4db94011d3 | 1237 | * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V |
sahilmgandhi | 18:6a4db94011d3 | 1238 | * @retval HAL Status |
sahilmgandhi | 18:6a4db94011d3 | 1239 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1240 | static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level) |
sahilmgandhi | 18:6a4db94011d3 | 1241 | { |
sahilmgandhi | 18:6a4db94011d3 | 1242 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1243 | assert_param(IS_OB_BOR_LEVEL(Level)); |
sahilmgandhi | 18:6a4db94011d3 | 1244 | |
sahilmgandhi | 18:6a4db94011d3 | 1245 | /* Set the BOR Level */ |
sahilmgandhi | 18:6a4db94011d3 | 1246 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV); |
sahilmgandhi | 18:6a4db94011d3 | 1247 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level; |
sahilmgandhi | 18:6a4db94011d3 | 1248 | |
sahilmgandhi | 18:6a4db94011d3 | 1249 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1250 | |
sahilmgandhi | 18:6a4db94011d3 | 1251 | } |
sahilmgandhi | 18:6a4db94011d3 | 1252 | |
sahilmgandhi | 18:6a4db94011d3 | 1253 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1254 | * @brief Return the FLASH User Option Byte value. |
sahilmgandhi | 18:6a4db94011d3 | 1255 | * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1) |
sahilmgandhi | 18:6a4db94011d3 | 1256 | * and RST_STDBY(Bit2). |
sahilmgandhi | 18:6a4db94011d3 | 1257 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1258 | static uint8_t FLASH_OB_GetUser(void) |
sahilmgandhi | 18:6a4db94011d3 | 1259 | { |
sahilmgandhi | 18:6a4db94011d3 | 1260 | /* Return the User Option Byte */ |
sahilmgandhi | 18:6a4db94011d3 | 1261 | return ((uint8_t)(FLASH->OPTCR & 0xE0U)); |
sahilmgandhi | 18:6a4db94011d3 | 1262 | } |
sahilmgandhi | 18:6a4db94011d3 | 1263 | |
sahilmgandhi | 18:6a4db94011d3 | 1264 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1265 | * @brief Return the FLASH Write Protection Option Bytes value. |
sahilmgandhi | 18:6a4db94011d3 | 1266 | * @retval uint16_t FLASH Write Protection Option Bytes value |
sahilmgandhi | 18:6a4db94011d3 | 1267 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1268 | static uint16_t FLASH_OB_GetWRP(void) |
sahilmgandhi | 18:6a4db94011d3 | 1269 | { |
sahilmgandhi | 18:6a4db94011d3 | 1270 | /* Return the FLASH write protection Register value */ |
sahilmgandhi | 18:6a4db94011d3 | 1271 | return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS)); |
sahilmgandhi | 18:6a4db94011d3 | 1272 | } |
sahilmgandhi | 18:6a4db94011d3 | 1273 | |
sahilmgandhi | 18:6a4db94011d3 | 1274 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1275 | * @brief Returns the FLASH Read Protection level. |
sahilmgandhi | 18:6a4db94011d3 | 1276 | * @retval FLASH ReadOut Protection Status: |
sahilmgandhi | 18:6a4db94011d3 | 1277 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1278 | * @arg OB_RDP_LEVEL_0: No protection |
sahilmgandhi | 18:6a4db94011d3 | 1279 | * @arg OB_RDP_LEVEL_1: Read protection of the memory |
sahilmgandhi | 18:6a4db94011d3 | 1280 | * @arg OB_RDP_LEVEL_2: Full chip protection |
sahilmgandhi | 18:6a4db94011d3 | 1281 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1282 | static uint8_t FLASH_OB_GetRDP(void) |
sahilmgandhi | 18:6a4db94011d3 | 1283 | { |
sahilmgandhi | 18:6a4db94011d3 | 1284 | uint8_t readstatus = OB_RDP_LEVEL_0; |
sahilmgandhi | 18:6a4db94011d3 | 1285 | |
sahilmgandhi | 18:6a4db94011d3 | 1286 | if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)) |
sahilmgandhi | 18:6a4db94011d3 | 1287 | { |
sahilmgandhi | 18:6a4db94011d3 | 1288 | readstatus = OB_RDP_LEVEL_2; |
sahilmgandhi | 18:6a4db94011d3 | 1289 | } |
sahilmgandhi | 18:6a4db94011d3 | 1290 | else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)) |
sahilmgandhi | 18:6a4db94011d3 | 1291 | { |
sahilmgandhi | 18:6a4db94011d3 | 1292 | readstatus = OB_RDP_LEVEL_1; |
sahilmgandhi | 18:6a4db94011d3 | 1293 | } |
sahilmgandhi | 18:6a4db94011d3 | 1294 | else |
sahilmgandhi | 18:6a4db94011d3 | 1295 | { |
sahilmgandhi | 18:6a4db94011d3 | 1296 | readstatus = OB_RDP_LEVEL_0; |
sahilmgandhi | 18:6a4db94011d3 | 1297 | } |
sahilmgandhi | 18:6a4db94011d3 | 1298 | |
sahilmgandhi | 18:6a4db94011d3 | 1299 | return readstatus; |
sahilmgandhi | 18:6a4db94011d3 | 1300 | } |
sahilmgandhi | 18:6a4db94011d3 | 1301 | |
sahilmgandhi | 18:6a4db94011d3 | 1302 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1303 | * @brief Returns the FLASH BOR level. |
sahilmgandhi | 18:6a4db94011d3 | 1304 | * @retval uint8_t The FLASH BOR level: |
sahilmgandhi | 18:6a4db94011d3 | 1305 | * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
sahilmgandhi | 18:6a4db94011d3 | 1306 | * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
sahilmgandhi | 18:6a4db94011d3 | 1307 | * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
sahilmgandhi | 18:6a4db94011d3 | 1308 | * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V |
sahilmgandhi | 18:6a4db94011d3 | 1309 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1310 | static uint8_t FLASH_OB_GetBOR(void) |
sahilmgandhi | 18:6a4db94011d3 | 1311 | { |
sahilmgandhi | 18:6a4db94011d3 | 1312 | /* Return the FLASH BOR level */ |
sahilmgandhi | 18:6a4db94011d3 | 1313 | return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0CU); |
sahilmgandhi | 18:6a4db94011d3 | 1314 | } |
sahilmgandhi | 18:6a4db94011d3 | 1315 | |
sahilmgandhi | 18:6a4db94011d3 | 1316 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1317 | * @brief Flush the instruction and data caches |
sahilmgandhi | 18:6a4db94011d3 | 1318 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 1319 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1320 | void FLASH_FlushCaches(void) |
sahilmgandhi | 18:6a4db94011d3 | 1321 | { |
sahilmgandhi | 18:6a4db94011d3 | 1322 | /* Flush instruction cache */ |
sahilmgandhi | 18:6a4db94011d3 | 1323 | if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN)!= RESET) |
sahilmgandhi | 18:6a4db94011d3 | 1324 | { |
sahilmgandhi | 18:6a4db94011d3 | 1325 | /* Disable instruction cache */ |
sahilmgandhi | 18:6a4db94011d3 | 1326 | __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); |
sahilmgandhi | 18:6a4db94011d3 | 1327 | /* Reset instruction cache */ |
sahilmgandhi | 18:6a4db94011d3 | 1328 | __HAL_FLASH_INSTRUCTION_CACHE_RESET(); |
sahilmgandhi | 18:6a4db94011d3 | 1329 | /* Enable instruction cache */ |
sahilmgandhi | 18:6a4db94011d3 | 1330 | __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); |
sahilmgandhi | 18:6a4db94011d3 | 1331 | } |
sahilmgandhi | 18:6a4db94011d3 | 1332 | |
sahilmgandhi | 18:6a4db94011d3 | 1333 | /* Flush data cache */ |
sahilmgandhi | 18:6a4db94011d3 | 1334 | if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) |
sahilmgandhi | 18:6a4db94011d3 | 1335 | { |
sahilmgandhi | 18:6a4db94011d3 | 1336 | /* Disable data cache */ |
sahilmgandhi | 18:6a4db94011d3 | 1337 | __HAL_FLASH_DATA_CACHE_DISABLE(); |
sahilmgandhi | 18:6a4db94011d3 | 1338 | /* Reset data cache */ |
sahilmgandhi | 18:6a4db94011d3 | 1339 | __HAL_FLASH_DATA_CACHE_RESET(); |
sahilmgandhi | 18:6a4db94011d3 | 1340 | /* Enable data cache */ |
sahilmgandhi | 18:6a4db94011d3 | 1341 | __HAL_FLASH_DATA_CACHE_ENABLE(); |
sahilmgandhi | 18:6a4db94011d3 | 1342 | } |
sahilmgandhi | 18:6a4db94011d3 | 1343 | } |
sahilmgandhi | 18:6a4db94011d3 | 1344 | |
sahilmgandhi | 18:6a4db94011d3 | 1345 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1346 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1347 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1348 | |
sahilmgandhi | 18:6a4db94011d3 | 1349 | #endif /* HAL_FLASH_MODULE_ENABLED */ |
sahilmgandhi | 18:6a4db94011d3 | 1350 | |
sahilmgandhi | 18:6a4db94011d3 | 1351 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1352 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1353 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1354 | |
sahilmgandhi | 18:6a4db94011d3 | 1355 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1356 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1357 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1358 | |
sahilmgandhi | 18:6a4db94011d3 | 1359 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |