MacroRat / MouseCode

Mouse code for the MacroRat

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mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dac.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_dac.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of DAC HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_HAL_DAC_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_HAL_DAC_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
sahilmgandhi 18:6a4db94011d3 47 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 48 defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) ||\
sahilmgandhi 18:6a4db94011d3 49 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 52 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 53
sahilmgandhi 18:6a4db94011d3 54 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 55 * @{
sahilmgandhi 18:6a4db94011d3 56 */
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 /** @addtogroup DAC
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 63 /** @defgroup DAC_Exported_Types DAC Exported Types
sahilmgandhi 18:6a4db94011d3 64 * @{
sahilmgandhi 18:6a4db94011d3 65 */
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 /**
sahilmgandhi 18:6a4db94011d3 68 * @brief HAL State structures definition
sahilmgandhi 18:6a4db94011d3 69 */
sahilmgandhi 18:6a4db94011d3 70 typedef enum
sahilmgandhi 18:6a4db94011d3 71 {
sahilmgandhi 18:6a4db94011d3 72 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */
sahilmgandhi 18:6a4db94011d3 73 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
sahilmgandhi 18:6a4db94011d3 74 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
sahilmgandhi 18:6a4db94011d3 75 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
sahilmgandhi 18:6a4db94011d3 76 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
sahilmgandhi 18:6a4db94011d3 77 }HAL_DAC_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 /**
sahilmgandhi 18:6a4db94011d3 80 * @brief DAC handle Structure definition
sahilmgandhi 18:6a4db94011d3 81 */
sahilmgandhi 18:6a4db94011d3 82 typedef struct
sahilmgandhi 18:6a4db94011d3 83 {
sahilmgandhi 18:6a4db94011d3 84 DAC_TypeDef *Instance; /*!< Register base address */
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 HAL_LockTypeDef Lock; /*!< DAC locking object */
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
sahilmgandhi 18:6a4db94011d3 93
sahilmgandhi 18:6a4db94011d3 94 __IO uint32_t ErrorCode; /*!< DAC Error code */
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 }DAC_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 /**
sahilmgandhi 18:6a4db94011d3 99 * @brief DAC Configuration regular Channel structure definition
sahilmgandhi 18:6a4db94011d3 100 */
sahilmgandhi 18:6a4db94011d3 101 typedef struct
sahilmgandhi 18:6a4db94011d3 102 {
sahilmgandhi 18:6a4db94011d3 103 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
sahilmgandhi 18:6a4db94011d3 104 This parameter can be a value of @ref DAC_trigger_selection */
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
sahilmgandhi 18:6a4db94011d3 107 This parameter can be a value of @ref DAC_output_buffer */
sahilmgandhi 18:6a4db94011d3 108 }DAC_ChannelConfTypeDef;
sahilmgandhi 18:6a4db94011d3 109 /**
sahilmgandhi 18:6a4db94011d3 110 * @}
sahilmgandhi 18:6a4db94011d3 111 */
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 114 /** @defgroup DAC_Exported_Constants DAC Exported Constants
sahilmgandhi 18:6a4db94011d3 115 * @{
sahilmgandhi 18:6a4db94011d3 116 */
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 /** @defgroup DAC_Error_Code DAC Error Code
sahilmgandhi 18:6a4db94011d3 119 * @{
sahilmgandhi 18:6a4db94011d3 120 */
sahilmgandhi 18:6a4db94011d3 121 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */
sahilmgandhi 18:6a4db94011d3 122 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DAM underrun error */
sahilmgandhi 18:6a4db94011d3 123 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DAM underrun error */
sahilmgandhi 18:6a4db94011d3 124 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */
sahilmgandhi 18:6a4db94011d3 125 /**
sahilmgandhi 18:6a4db94011d3 126 * @}
sahilmgandhi 18:6a4db94011d3 127 */
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 /** @defgroup DAC_trigger_selection DAC Trigger Selection
sahilmgandhi 18:6a4db94011d3 130 * @{
sahilmgandhi 18:6a4db94011d3 131 */
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000U) /*!< Conversion is automatic once the DAC1_DHRxxxx register
sahilmgandhi 18:6a4db94011d3 134 has been loaded, and not by external trigger */
sahilmgandhi 18:6a4db94011d3 135 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 136 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 137 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 138 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 139 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 140 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 143 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 144 /**
sahilmgandhi 18:6a4db94011d3 145 * @}
sahilmgandhi 18:6a4db94011d3 146 */
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 /** @defgroup DAC_output_buffer DAC Output Buffer
sahilmgandhi 18:6a4db94011d3 149 * @{
sahilmgandhi 18:6a4db94011d3 150 */
sahilmgandhi 18:6a4db94011d3 151 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 152 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
sahilmgandhi 18:6a4db94011d3 153 /**
sahilmgandhi 18:6a4db94011d3 154 * @}
sahilmgandhi 18:6a4db94011d3 155 */
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 /** @defgroup DAC_Channel_selection DAC Channel Selection
sahilmgandhi 18:6a4db94011d3 158 * @{
sahilmgandhi 18:6a4db94011d3 159 */
sahilmgandhi 18:6a4db94011d3 160 #define DAC_CHANNEL_1 ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 161 #define DAC_CHANNEL_2 ((uint32_t)0x00000010U)
sahilmgandhi 18:6a4db94011d3 162 /**
sahilmgandhi 18:6a4db94011d3 163 * @}
sahilmgandhi 18:6a4db94011d3 164 */
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 /** @defgroup DAC_data_alignment DAC Data Alignment
sahilmgandhi 18:6a4db94011d3 167 * @{
sahilmgandhi 18:6a4db94011d3 168 */
sahilmgandhi 18:6a4db94011d3 169 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 170 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004U)
sahilmgandhi 18:6a4db94011d3 171 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008U)
sahilmgandhi 18:6a4db94011d3 172 /**
sahilmgandhi 18:6a4db94011d3 173 * @}
sahilmgandhi 18:6a4db94011d3 174 */
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 /** @defgroup DAC_flags_definition DAC Flags Definition
sahilmgandhi 18:6a4db94011d3 177 * @{
sahilmgandhi 18:6a4db94011d3 178 */
sahilmgandhi 18:6a4db94011d3 179 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
sahilmgandhi 18:6a4db94011d3 180 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
sahilmgandhi 18:6a4db94011d3 181 /**
sahilmgandhi 18:6a4db94011d3 182 * @}
sahilmgandhi 18:6a4db94011d3 183 */
sahilmgandhi 18:6a4db94011d3 184
sahilmgandhi 18:6a4db94011d3 185 /** @defgroup DAC_IT_definition DAC IT Definition
sahilmgandhi 18:6a4db94011d3 186 * @{
sahilmgandhi 18:6a4db94011d3 187 */
sahilmgandhi 18:6a4db94011d3 188 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
sahilmgandhi 18:6a4db94011d3 189 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
sahilmgandhi 18:6a4db94011d3 190 /**
sahilmgandhi 18:6a4db94011d3 191 * @}
sahilmgandhi 18:6a4db94011d3 192 */
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /**
sahilmgandhi 18:6a4db94011d3 195 * @}
sahilmgandhi 18:6a4db94011d3 196 */
sahilmgandhi 18:6a4db94011d3 197
sahilmgandhi 18:6a4db94011d3 198 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 199 /** @defgroup DAC_Exported_Macros DAC Exported Macros
sahilmgandhi 18:6a4db94011d3 200 * @{
sahilmgandhi 18:6a4db94011d3 201 */
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 /** @brief Reset DAC handle state
sahilmgandhi 18:6a4db94011d3 204 * @param __HANDLE__: specifies the DAC handle.
sahilmgandhi 18:6a4db94011d3 205 * @retval None
sahilmgandhi 18:6a4db94011d3 206 */
sahilmgandhi 18:6a4db94011d3 207 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 /** @brief Enable the DAC channel
sahilmgandhi 18:6a4db94011d3 210 * @param __HANDLE__: specifies the DAC handle.
sahilmgandhi 18:6a4db94011d3 211 * @param __DAC_Channel__: specifies the DAC channel
sahilmgandhi 18:6a4db94011d3 212 * @retval None
sahilmgandhi 18:6a4db94011d3 213 */
sahilmgandhi 18:6a4db94011d3 214 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
sahilmgandhi 18:6a4db94011d3 215
sahilmgandhi 18:6a4db94011d3 216 /** @brief Disable the DAC channel
sahilmgandhi 18:6a4db94011d3 217 * @param __HANDLE__: specifies the DAC handle
sahilmgandhi 18:6a4db94011d3 218 * @param __DAC_Channel__: specifies the DAC channel.
sahilmgandhi 18:6a4db94011d3 219 * @retval None
sahilmgandhi 18:6a4db94011d3 220 */
sahilmgandhi 18:6a4db94011d3 221 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
sahilmgandhi 18:6a4db94011d3 222
sahilmgandhi 18:6a4db94011d3 223 /** @brief Enable the DAC interrupt
sahilmgandhi 18:6a4db94011d3 224 * @param __HANDLE__: specifies the DAC handle
sahilmgandhi 18:6a4db94011d3 225 * @param __INTERRUPT__: specifies the DAC interrupt.
sahilmgandhi 18:6a4db94011d3 226 * @retval None
sahilmgandhi 18:6a4db94011d3 227 */
sahilmgandhi 18:6a4db94011d3 228 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 229
sahilmgandhi 18:6a4db94011d3 230 /** @brief Disable the DAC interrupt
sahilmgandhi 18:6a4db94011d3 231 * @param __HANDLE__: specifies the DAC handle
sahilmgandhi 18:6a4db94011d3 232 * @param __INTERRUPT__: specifies the DAC interrupt.
sahilmgandhi 18:6a4db94011d3 233 * @retval None
sahilmgandhi 18:6a4db94011d3 234 */
sahilmgandhi 18:6a4db94011d3 235 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 /** @brief Checks if the specified DAC interrupt source is enabled or disabled.
sahilmgandhi 18:6a4db94011d3 238 * @param __HANDLE__: DAC handle
sahilmgandhi 18:6a4db94011d3 239 * @param __INTERRUPT__: DAC interrupt source to check
sahilmgandhi 18:6a4db94011d3 240 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 241 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
sahilmgandhi 18:6a4db94011d3 242 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
sahilmgandhi 18:6a4db94011d3 243 * @retval State of interruption (SET or RESET)
sahilmgandhi 18:6a4db94011d3 244 */
sahilmgandhi 18:6a4db94011d3 245 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 246
sahilmgandhi 18:6a4db94011d3 247 /** @brief Get the selected DAC's flag status.
sahilmgandhi 18:6a4db94011d3 248 * @param __HANDLE__: specifies the DAC handle.
sahilmgandhi 18:6a4db94011d3 249 * @param __FLAG__: specifies the flag to clear.
sahilmgandhi 18:6a4db94011d3 250 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 251 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
sahilmgandhi 18:6a4db94011d3 252 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
sahilmgandhi 18:6a4db94011d3 253 * @retval None
sahilmgandhi 18:6a4db94011d3 254 */
sahilmgandhi 18:6a4db94011d3 255 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
sahilmgandhi 18:6a4db94011d3 256
sahilmgandhi 18:6a4db94011d3 257 /** @brief Clear the DAC's flag.
sahilmgandhi 18:6a4db94011d3 258 * @param __HANDLE__: specifies the DAC handle.
sahilmgandhi 18:6a4db94011d3 259 * @param __FLAG__: specifies the flag to clear.
sahilmgandhi 18:6a4db94011d3 260 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 261 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
sahilmgandhi 18:6a4db94011d3 262 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
sahilmgandhi 18:6a4db94011d3 263 * @retval None
sahilmgandhi 18:6a4db94011d3 264 */
sahilmgandhi 18:6a4db94011d3 265 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
sahilmgandhi 18:6a4db94011d3 266 /**
sahilmgandhi 18:6a4db94011d3 267 * @}
sahilmgandhi 18:6a4db94011d3 268 */
sahilmgandhi 18:6a4db94011d3 269
sahilmgandhi 18:6a4db94011d3 270 /* Include DAC HAL Extension module */
sahilmgandhi 18:6a4db94011d3 271 #include "stm32f4xx_hal_dac_ex.h"
sahilmgandhi 18:6a4db94011d3 272
sahilmgandhi 18:6a4db94011d3 273 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 274 /** @addtogroup DAC_Exported_Functions
sahilmgandhi 18:6a4db94011d3 275 * @{
sahilmgandhi 18:6a4db94011d3 276 */
sahilmgandhi 18:6a4db94011d3 277
sahilmgandhi 18:6a4db94011d3 278 /** @addtogroup DAC_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 279 * @{
sahilmgandhi 18:6a4db94011d3 280 */
sahilmgandhi 18:6a4db94011d3 281 /* Initialization/de-initialization functions *********************************/
sahilmgandhi 18:6a4db94011d3 282 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 283 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 284 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 285 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 286 /**
sahilmgandhi 18:6a4db94011d3 287 * @}
sahilmgandhi 18:6a4db94011d3 288 */
sahilmgandhi 18:6a4db94011d3 289
sahilmgandhi 18:6a4db94011d3 290 /** @addtogroup DAC_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 291 * @{
sahilmgandhi 18:6a4db94011d3 292 */
sahilmgandhi 18:6a4db94011d3 293 /* I/O operation functions ****************************************************/
sahilmgandhi 18:6a4db94011d3 294 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 295 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 296 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
sahilmgandhi 18:6a4db94011d3 297 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 298 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 299 /**
sahilmgandhi 18:6a4db94011d3 300 * @}
sahilmgandhi 18:6a4db94011d3 301 */
sahilmgandhi 18:6a4db94011d3 302
sahilmgandhi 18:6a4db94011d3 303 /** @addtogroup DAC_Exported_Functions_Group3
sahilmgandhi 18:6a4db94011d3 304 * @{
sahilmgandhi 18:6a4db94011d3 305 */
sahilmgandhi 18:6a4db94011d3 306 /* Peripheral Control functions ***********************************************/
sahilmgandhi 18:6a4db94011d3 307 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 308 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
sahilmgandhi 18:6a4db94011d3 309 /**
sahilmgandhi 18:6a4db94011d3 310 * @}
sahilmgandhi 18:6a4db94011d3 311 */
sahilmgandhi 18:6a4db94011d3 312
sahilmgandhi 18:6a4db94011d3 313 /** @addtogroup DAC_Exported_Functions_Group4
sahilmgandhi 18:6a4db94011d3 314 * @{
sahilmgandhi 18:6a4db94011d3 315 */
sahilmgandhi 18:6a4db94011d3 316 /* Peripheral State functions *************************************************/
sahilmgandhi 18:6a4db94011d3 317 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 318 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 319 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
sahilmgandhi 18:6a4db94011d3 320
sahilmgandhi 18:6a4db94011d3 321 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 322 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 323 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
sahilmgandhi 18:6a4db94011d3 324 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
sahilmgandhi 18:6a4db94011d3 325 /**
sahilmgandhi 18:6a4db94011d3 326 * @}
sahilmgandhi 18:6a4db94011d3 327 */
sahilmgandhi 18:6a4db94011d3 328
sahilmgandhi 18:6a4db94011d3 329 /**
sahilmgandhi 18:6a4db94011d3 330 * @}
sahilmgandhi 18:6a4db94011d3 331 */
sahilmgandhi 18:6a4db94011d3 332 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 333 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 334 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 335 /** @defgroup DAC_Private_Constants DAC Private Constants
sahilmgandhi 18:6a4db94011d3 336 * @{
sahilmgandhi 18:6a4db94011d3 337 */
sahilmgandhi 18:6a4db94011d3 338
sahilmgandhi 18:6a4db94011d3 339 /**
sahilmgandhi 18:6a4db94011d3 340 * @}
sahilmgandhi 18:6a4db94011d3 341 */
sahilmgandhi 18:6a4db94011d3 342
sahilmgandhi 18:6a4db94011d3 343 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 344 /** @defgroup DAC_Private_Macros DAC Private Macros
sahilmgandhi 18:6a4db94011d3 345 * @{
sahilmgandhi 18:6a4db94011d3 346 */
sahilmgandhi 18:6a4db94011d3 347 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
sahilmgandhi 18:6a4db94011d3 348 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
sahilmgandhi 18:6a4db94011d3 349 ((ALIGN) == DAC_ALIGN_12B_L) || \
sahilmgandhi 18:6a4db94011d3 350 ((ALIGN) == DAC_ALIGN_8B_R))
sahilmgandhi 18:6a4db94011d3 351 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
sahilmgandhi 18:6a4db94011d3 352 ((CHANNEL) == DAC_CHANNEL_2))
sahilmgandhi 18:6a4db94011d3 353 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
sahilmgandhi 18:6a4db94011d3 354 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
sahilmgandhi 18:6a4db94011d3 355
sahilmgandhi 18:6a4db94011d3 356 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
sahilmgandhi 18:6a4db94011d3 357 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
sahilmgandhi 18:6a4db94011d3 358 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
sahilmgandhi 18:6a4db94011d3 359 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
sahilmgandhi 18:6a4db94011d3 360 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
sahilmgandhi 18:6a4db94011d3 361 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
sahilmgandhi 18:6a4db94011d3 362 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
sahilmgandhi 18:6a4db94011d3 363 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
sahilmgandhi 18:6a4db94011d3 364 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
sahilmgandhi 18:6a4db94011d3 365
sahilmgandhi 18:6a4db94011d3 366 /** @brief Set DHR12R1 alignment
sahilmgandhi 18:6a4db94011d3 367 * @param __ALIGNMENT__: specifies the DAC alignment
sahilmgandhi 18:6a4db94011d3 368 * @retval None
sahilmgandhi 18:6a4db94011d3 369 */
sahilmgandhi 18:6a4db94011d3 370 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008U) + (__ALIGNMENT__))
sahilmgandhi 18:6a4db94011d3 371
sahilmgandhi 18:6a4db94011d3 372 /** @brief Set DHR12R2 alignment
sahilmgandhi 18:6a4db94011d3 373 * @param __ALIGNMENT__: specifies the DAC alignment
sahilmgandhi 18:6a4db94011d3 374 * @retval None
sahilmgandhi 18:6a4db94011d3 375 */
sahilmgandhi 18:6a4db94011d3 376 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014U) + (__ALIGNMENT__))
sahilmgandhi 18:6a4db94011d3 377
sahilmgandhi 18:6a4db94011d3 378 /** @brief Set DHR12RD alignment
sahilmgandhi 18:6a4db94011d3 379 * @param __ALIGNMENT__: specifies the DAC alignment
sahilmgandhi 18:6a4db94011d3 380 * @retval None
sahilmgandhi 18:6a4db94011d3 381 */
sahilmgandhi 18:6a4db94011d3 382 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020U) + (__ALIGNMENT__))
sahilmgandhi 18:6a4db94011d3 383
sahilmgandhi 18:6a4db94011d3 384 /**
sahilmgandhi 18:6a4db94011d3 385 * @}
sahilmgandhi 18:6a4db94011d3 386 */
sahilmgandhi 18:6a4db94011d3 387
sahilmgandhi 18:6a4db94011d3 388 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 389 /** @defgroup DAC_Private_Functions DAC Private Functions
sahilmgandhi 18:6a4db94011d3 390 * @{
sahilmgandhi 18:6a4db94011d3 391 */
sahilmgandhi 18:6a4db94011d3 392 /**
sahilmgandhi 18:6a4db94011d3 393 * @}
sahilmgandhi 18:6a4db94011d3 394 */
sahilmgandhi 18:6a4db94011d3 395 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
sahilmgandhi 18:6a4db94011d3 396 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
sahilmgandhi 18:6a4db94011d3 397 STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 398
sahilmgandhi 18:6a4db94011d3 399 /**
sahilmgandhi 18:6a4db94011d3 400 * @}
sahilmgandhi 18:6a4db94011d3 401 */
sahilmgandhi 18:6a4db94011d3 402
sahilmgandhi 18:6a4db94011d3 403 /**
sahilmgandhi 18:6a4db94011d3 404 * @}
sahilmgandhi 18:6a4db94011d3 405 */
sahilmgandhi 18:6a4db94011d3 406
sahilmgandhi 18:6a4db94011d3 407 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 408 }
sahilmgandhi 18:6a4db94011d3 409 #endif
sahilmgandhi 18:6a4db94011d3 410
sahilmgandhi 18:6a4db94011d3 411 #endif /*__STM32F4xx_HAL_DAC_H */
sahilmgandhi 18:6a4db94011d3 412
sahilmgandhi 18:6a4db94011d3 413 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/