Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * Copyright (c) 2014, STMicroelectronics
sahilmgandhi 18:6a4db94011d3 4 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 5 *
sahilmgandhi 18:6a4db94011d3 6 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 7 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 8 *
sahilmgandhi 18:6a4db94011d3 9 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 10 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 12 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 13 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 15 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 16 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 28 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 29 */
sahilmgandhi 18:6a4db94011d3 30 #ifndef MBED_PERIPHERALNAMES_H
sahilmgandhi 18:6a4db94011d3 31 #define MBED_PERIPHERALNAMES_H
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 36 extern "C" {
sahilmgandhi 18:6a4db94011d3 37 #endif
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 typedef enum {
sahilmgandhi 18:6a4db94011d3 40 ADC_1 = (int)ADC1_BASE,
sahilmgandhi 18:6a4db94011d3 41 ADC_2 = (int)ADC2_BASE,
sahilmgandhi 18:6a4db94011d3 42 ADC_3 = (int)ADC3_BASE
sahilmgandhi 18:6a4db94011d3 43 } ADCName;
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 typedef enum {
sahilmgandhi 18:6a4db94011d3 46 DAC_0 = 0,
sahilmgandhi 18:6a4db94011d3 47 DAC_1
sahilmgandhi 18:6a4db94011d3 48 } DACName;
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 typedef enum {
sahilmgandhi 18:6a4db94011d3 51 UART_1 = (int)USART1_BASE,
sahilmgandhi 18:6a4db94011d3 52 UART_2 = (int)USART2_BASE,
sahilmgandhi 18:6a4db94011d3 53 UART_3 = (int)USART3_BASE,
sahilmgandhi 18:6a4db94011d3 54 UART_4 = (int)UART4_BASE,
sahilmgandhi 18:6a4db94011d3 55 UART_5 = (int)UART5_BASE,
sahilmgandhi 18:6a4db94011d3 56 UART_6 = (int)USART6_BASE,
sahilmgandhi 18:6a4db94011d3 57 } UARTName;
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 #define STDIO_UART_TX PC_6
sahilmgandhi 18:6a4db94011d3 60 #define STDIO_UART_RX PC_7
sahilmgandhi 18:6a4db94011d3 61 #define STDIO_UART UART_6
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 typedef enum {
sahilmgandhi 18:6a4db94011d3 64 SPI_1 = (int)SPI1_BASE,
sahilmgandhi 18:6a4db94011d3 65 SPI_2 = (int)SPI2_BASE,
sahilmgandhi 18:6a4db94011d3 66 SPI_3 = (int)SPI3_BASE
sahilmgandhi 18:6a4db94011d3 67 } SPIName;
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 typedef enum {
sahilmgandhi 18:6a4db94011d3 70 I2C_1 = (int)I2C1_BASE,
sahilmgandhi 18:6a4db94011d3 71 I2C_2 = (int)I2C2_BASE,
sahilmgandhi 18:6a4db94011d3 72 I2C_3 = (int)I2C3_BASE
sahilmgandhi 18:6a4db94011d3 73 } I2CName;
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 typedef enum {
sahilmgandhi 18:6a4db94011d3 76 PWM_1 = (int)TIM1_BASE,
sahilmgandhi 18:6a4db94011d3 77 PWM_2 = (int)TIM2_BASE,
sahilmgandhi 18:6a4db94011d3 78 PWM_3 = (int)TIM3_BASE,
sahilmgandhi 18:6a4db94011d3 79 PWM_4 = (int)TIM4_BASE,
sahilmgandhi 18:6a4db94011d3 80 PWM_5 = (int)TIM5_BASE,
sahilmgandhi 18:6a4db94011d3 81 PWM_8 = (int)TIM8_BASE,
sahilmgandhi 18:6a4db94011d3 82 PWM_9 = (int)TIM9_BASE,
sahilmgandhi 18:6a4db94011d3 83 PWM_10 = (int)TIM10_BASE,
sahilmgandhi 18:6a4db94011d3 84 PWM_11 = (int)TIM11_BASE,
sahilmgandhi 18:6a4db94011d3 85 PWM_12 = (int)TIM12_BASE,
sahilmgandhi 18:6a4db94011d3 86 PWM_13 = (int)TIM13_BASE,
sahilmgandhi 18:6a4db94011d3 87 PWM_14 = (int)TIM14_BASE
sahilmgandhi 18:6a4db94011d3 88 } PWMName;
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 91 }
sahilmgandhi 18:6a4db94011d3 92 #endif
sahilmgandhi 18:6a4db94011d3 93
sahilmgandhi 18:6a4db94011d3 94 #endif