MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/objects.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * Copyright (c) 2016, STMicroelectronics
sahilmgandhi 18:6a4db94011d3 4 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 5 *
sahilmgandhi 18:6a4db94011d3 6 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 7 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 8 *
sahilmgandhi 18:6a4db94011d3 9 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 10 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 12 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 13 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 15 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 16 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 28 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 29 */
sahilmgandhi 18:6a4db94011d3 30 #ifndef MBED_OBJECTS_H
sahilmgandhi 18:6a4db94011d3 31 #define MBED_OBJECTS_H
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 34 #include "PortNames.h"
sahilmgandhi 18:6a4db94011d3 35 #include "PeripheralNames.h"
sahilmgandhi 18:6a4db94011d3 36 #include "PinNames.h"
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 39 extern "C" {
sahilmgandhi 18:6a4db94011d3 40 #endif
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 struct gpio_irq_s {
sahilmgandhi 18:6a4db94011d3 43 IRQn_Type irq_n;
sahilmgandhi 18:6a4db94011d3 44 uint32_t irq_index;
sahilmgandhi 18:6a4db94011d3 45 uint32_t event;
sahilmgandhi 18:6a4db94011d3 46 PinName pin;
sahilmgandhi 18:6a4db94011d3 47 };
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 struct port_s {
sahilmgandhi 18:6a4db94011d3 50 PortName port;
sahilmgandhi 18:6a4db94011d3 51 uint32_t mask;
sahilmgandhi 18:6a4db94011d3 52 PinDirection direction;
sahilmgandhi 18:6a4db94011d3 53 __IO uint32_t *reg_in;
sahilmgandhi 18:6a4db94011d3 54 __IO uint32_t *reg_out;
sahilmgandhi 18:6a4db94011d3 55 };
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 struct analogin_s {
sahilmgandhi 18:6a4db94011d3 58 ADCName adc;
sahilmgandhi 18:6a4db94011d3 59 PinName pin;
sahilmgandhi 18:6a4db94011d3 60 uint8_t channel;
sahilmgandhi 18:6a4db94011d3 61 };
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 struct dac_s {
sahilmgandhi 18:6a4db94011d3 64 DACName dac;
sahilmgandhi 18:6a4db94011d3 65 uint8_t channel;
sahilmgandhi 18:6a4db94011d3 66 };
sahilmgandhi 18:6a4db94011d3 67
sahilmgandhi 18:6a4db94011d3 68 struct serial_s {
sahilmgandhi 18:6a4db94011d3 69 UARTName uart;
sahilmgandhi 18:6a4db94011d3 70 int index; // Used by irq
sahilmgandhi 18:6a4db94011d3 71 uint32_t baudrate;
sahilmgandhi 18:6a4db94011d3 72 uint32_t databits;
sahilmgandhi 18:6a4db94011d3 73 uint32_t stopbits;
sahilmgandhi 18:6a4db94011d3 74 uint32_t parity;
sahilmgandhi 18:6a4db94011d3 75 PinName pin_tx;
sahilmgandhi 18:6a4db94011d3 76 PinName pin_rx;
sahilmgandhi 18:6a4db94011d3 77 #if DEVICE_SERIAL_ASYNCH
sahilmgandhi 18:6a4db94011d3 78 uint32_t events;
sahilmgandhi 18:6a4db94011d3 79 #endif
sahilmgandhi 18:6a4db94011d3 80 #if DEVICE_SERIAL_FC
sahilmgandhi 18:6a4db94011d3 81 uint32_t hw_flow_ctl;
sahilmgandhi 18:6a4db94011d3 82 PinName pin_rts;
sahilmgandhi 18:6a4db94011d3 83 PinName pin_cts;
sahilmgandhi 18:6a4db94011d3 84 #endif
sahilmgandhi 18:6a4db94011d3 85 };
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 struct spi_s {
sahilmgandhi 18:6a4db94011d3 88 SPI_HandleTypeDef handle;
sahilmgandhi 18:6a4db94011d3 89 IRQn_Type spiIRQ;
sahilmgandhi 18:6a4db94011d3 90 SPIName spi;
sahilmgandhi 18:6a4db94011d3 91 PinName pin_miso;
sahilmgandhi 18:6a4db94011d3 92 PinName pin_mosi;
sahilmgandhi 18:6a4db94011d3 93 PinName pin_sclk;
sahilmgandhi 18:6a4db94011d3 94 PinName pin_ssel;
sahilmgandhi 18:6a4db94011d3 95 #ifdef DEVICE_SPI_ASYNCH
sahilmgandhi 18:6a4db94011d3 96 uint32_t event;
sahilmgandhi 18:6a4db94011d3 97 uint8_t transfer_type;
sahilmgandhi 18:6a4db94011d3 98 #endif
sahilmgandhi 18:6a4db94011d3 99 };
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 struct i2c_s {
sahilmgandhi 18:6a4db94011d3 102 /* The 1st 2 members I2CName i2c
sahilmgandhi 18:6a4db94011d3 103 * and I2C_HandleTypeDef handle should
sahilmgandhi 18:6a4db94011d3 104 * be kept as the first members of this struct
sahilmgandhi 18:6a4db94011d3 105 */
sahilmgandhi 18:6a4db94011d3 106 I2CName i2c;
sahilmgandhi 18:6a4db94011d3 107 I2C_HandleTypeDef handle;
sahilmgandhi 18:6a4db94011d3 108 uint8_t index;
sahilmgandhi 18:6a4db94011d3 109 int hz;
sahilmgandhi 18:6a4db94011d3 110 PinName sda;
sahilmgandhi 18:6a4db94011d3 111 PinName scl;
sahilmgandhi 18:6a4db94011d3 112 IRQn_Type event_i2cIRQ;
sahilmgandhi 18:6a4db94011d3 113 IRQn_Type error_i2cIRQ;
sahilmgandhi 18:6a4db94011d3 114 uint8_t XferOperation;
sahilmgandhi 18:6a4db94011d3 115 volatile uint8_t event;
sahilmgandhi 18:6a4db94011d3 116 #if DEVICE_I2CSLAVE
sahilmgandhi 18:6a4db94011d3 117 uint8_t slave;
sahilmgandhi 18:6a4db94011d3 118 volatile uint8_t pending_slave_tx_master_rx;
sahilmgandhi 18:6a4db94011d3 119 volatile uint8_t pending_slave_rx_maxter_tx;
sahilmgandhi 18:6a4db94011d3 120 #endif
sahilmgandhi 18:6a4db94011d3 121 #if DEVICE_I2C_ASYNCH
sahilmgandhi 18:6a4db94011d3 122 uint32_t address;
sahilmgandhi 18:6a4db94011d3 123 uint8_t stop;
sahilmgandhi 18:6a4db94011d3 124 uint8_t available_events;
sahilmgandhi 18:6a4db94011d3 125 #endif
sahilmgandhi 18:6a4db94011d3 126 };
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 struct pwmout_s {
sahilmgandhi 18:6a4db94011d3 129 PWMName pwm;
sahilmgandhi 18:6a4db94011d3 130 PinName pin;
sahilmgandhi 18:6a4db94011d3 131 uint32_t prescaler;
sahilmgandhi 18:6a4db94011d3 132 uint32_t period;
sahilmgandhi 18:6a4db94011d3 133 uint32_t pulse;
sahilmgandhi 18:6a4db94011d3 134 uint8_t channel;
sahilmgandhi 18:6a4db94011d3 135 uint8_t inverted;
sahilmgandhi 18:6a4db94011d3 136 };
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 struct can_s {
sahilmgandhi 18:6a4db94011d3 139 CANName can;
sahilmgandhi 18:6a4db94011d3 140 int index;
sahilmgandhi 18:6a4db94011d3 141 };
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 #define GPIO_IP_WITHOUT_BRR
sahilmgandhi 18:6a4db94011d3 144 #include "gpio_object.h"
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 147 }
sahilmgandhi 18:6a4db94011d3 148 #endif
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 #endif