MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_usart.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_usart.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of USART HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F2xx_HAL_USART_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F2xx_HAL_USART_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f2xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup USART
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup USART_Exported_Types USART Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief USART Init Structure definition
sahilmgandhi 18:6a4db94011d3 64 */
sahilmgandhi 18:6a4db94011d3 65 typedef struct
sahilmgandhi 18:6a4db94011d3 66 {
sahilmgandhi 18:6a4db94011d3 67 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
sahilmgandhi 18:6a4db94011d3 68 The baud rate is computed using the following formula:
sahilmgandhi 18:6a4db94011d3 69 - IntegerDivider = ((PCLKx) / (8 * (husart->Init.BaudRate)))
sahilmgandhi 18:6a4db94011d3 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
sahilmgandhi 18:6a4db94011d3 73 This parameter can be a value of @ref USART_Word_Length */
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
sahilmgandhi 18:6a4db94011d3 76 This parameter can be a value of @ref USART_Stop_Bits */
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 uint32_t Parity; /*!< Specifies the parity mode.
sahilmgandhi 18:6a4db94011d3 79 This parameter can be a value of @ref USART_Parity
sahilmgandhi 18:6a4db94011d3 80 @note When parity is enabled, the computed parity is inserted
sahilmgandhi 18:6a4db94011d3 81 at the MSB position of the transmitted data (9th bit when
sahilmgandhi 18:6a4db94011d3 82 the word length is set to 9 data bits; 8th bit when the
sahilmgandhi 18:6a4db94011d3 83 word length is set to 8 data bits). */
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
sahilmgandhi 18:6a4db94011d3 86 This parameter can be a value of @ref USART_Mode */
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
sahilmgandhi 18:6a4db94011d3 89 This parameter can be a value of @ref USART_Clock_Polarity */
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
sahilmgandhi 18:6a4db94011d3 92 This parameter can be a value of @ref USART_Clock_Phase */
sahilmgandhi 18:6a4db94011d3 93
sahilmgandhi 18:6a4db94011d3 94 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
sahilmgandhi 18:6a4db94011d3 95 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
sahilmgandhi 18:6a4db94011d3 96 This parameter can be a value of @ref USART_Last_Bit */
sahilmgandhi 18:6a4db94011d3 97 }USART_InitTypeDef;
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 /**
sahilmgandhi 18:6a4db94011d3 100 * @brief HAL State structures definition
sahilmgandhi 18:6a4db94011d3 101 */
sahilmgandhi 18:6a4db94011d3 102 typedef enum
sahilmgandhi 18:6a4db94011d3 103 {
sahilmgandhi 18:6a4db94011d3 104 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
sahilmgandhi 18:6a4db94011d3 105 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
sahilmgandhi 18:6a4db94011d3 106 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
sahilmgandhi 18:6a4db94011d3 107 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
sahilmgandhi 18:6a4db94011d3 108 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
sahilmgandhi 18:6a4db94011d3 109 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
sahilmgandhi 18:6a4db94011d3 110 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
sahilmgandhi 18:6a4db94011d3 111 HAL_USART_STATE_ERROR = 0x04U /*!< Error */
sahilmgandhi 18:6a4db94011d3 112 }HAL_USART_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 113
sahilmgandhi 18:6a4db94011d3 114 /**
sahilmgandhi 18:6a4db94011d3 115 * @brief USART handle Structure definition
sahilmgandhi 18:6a4db94011d3 116 */
sahilmgandhi 18:6a4db94011d3 117 typedef struct
sahilmgandhi 18:6a4db94011d3 118 {
sahilmgandhi 18:6a4db94011d3 119 USART_TypeDef *Instance; /* USART registers base address */
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 USART_InitTypeDef Init; /* Usart communication parameters */
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 uint8_t *pTxBuffPtr; /* Pointer to Usart Tx transfer Buffer */
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 uint16_t TxXferSize; /* Usart Tx Transfer size */
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 __IO uint16_t TxXferCount; /* Usart Tx Transfer Counter */
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 uint8_t *pRxBuffPtr; /* Pointer to Usart Rx transfer Buffer */
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 uint16_t RxXferSize; /* Usart Rx Transfer size */
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 __IO uint16_t RxXferCount; /* Usart Rx Transfer Counter */
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 DMA_HandleTypeDef *hdmatx; /* Usart Tx DMA Handle parameters */
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 DMA_HandleTypeDef *hdmarx; /* Usart Rx DMA Handle parameters */
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 HAL_LockTypeDef Lock; /* Locking object */
sahilmgandhi 18:6a4db94011d3 140
sahilmgandhi 18:6a4db94011d3 141 __IO HAL_USART_StateTypeDef State; /* Usart communication state */
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 __IO uint32_t ErrorCode; /* USART Error code */
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 }USART_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 146 /**
sahilmgandhi 18:6a4db94011d3 147 * @}
sahilmgandhi 18:6a4db94011d3 148 */
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 151 /** @defgroup USART_Exported_Constants USART Exported Constants
sahilmgandhi 18:6a4db94011d3 152 * @{
sahilmgandhi 18:6a4db94011d3 153 */
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 /** @defgroup USART_Error_Code USART Error Code
sahilmgandhi 18:6a4db94011d3 156 * @brief USART Error Code
sahilmgandhi 18:6a4db94011d3 157 * @{
sahilmgandhi 18:6a4db94011d3 158 */
sahilmgandhi 18:6a4db94011d3 159 #define HAL_USART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
sahilmgandhi 18:6a4db94011d3 160 #define HAL_USART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
sahilmgandhi 18:6a4db94011d3 161 #define HAL_USART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
sahilmgandhi 18:6a4db94011d3 162 #define HAL_USART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
sahilmgandhi 18:6a4db94011d3 163 #define HAL_USART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
sahilmgandhi 18:6a4db94011d3 164 #define HAL_USART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
sahilmgandhi 18:6a4db94011d3 165 /**
sahilmgandhi 18:6a4db94011d3 166 * @}
sahilmgandhi 18:6a4db94011d3 167 */
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 /** @defgroup USART_Word_Length USART Word Length
sahilmgandhi 18:6a4db94011d3 170 * @{
sahilmgandhi 18:6a4db94011d3 171 */
sahilmgandhi 18:6a4db94011d3 172 #define USART_WORDLENGTH_8B ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 173 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
sahilmgandhi 18:6a4db94011d3 174 /**
sahilmgandhi 18:6a4db94011d3 175 * @}
sahilmgandhi 18:6a4db94011d3 176 */
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
sahilmgandhi 18:6a4db94011d3 179 * @{
sahilmgandhi 18:6a4db94011d3 180 */
sahilmgandhi 18:6a4db94011d3 181 #define USART_STOPBITS_1 ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 182 #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0)
sahilmgandhi 18:6a4db94011d3 183 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
sahilmgandhi 18:6a4db94011d3 184 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
sahilmgandhi 18:6a4db94011d3 185 /**
sahilmgandhi 18:6a4db94011d3 186 * @}
sahilmgandhi 18:6a4db94011d3 187 */
sahilmgandhi 18:6a4db94011d3 188
sahilmgandhi 18:6a4db94011d3 189 /** @defgroup USART_Parity USART Parity
sahilmgandhi 18:6a4db94011d3 190 * @{
sahilmgandhi 18:6a4db94011d3 191 */
sahilmgandhi 18:6a4db94011d3 192 #define USART_PARITY_NONE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 193 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
sahilmgandhi 18:6a4db94011d3 194 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
sahilmgandhi 18:6a4db94011d3 195 /**
sahilmgandhi 18:6a4db94011d3 196 * @}
sahilmgandhi 18:6a4db94011d3 197 */
sahilmgandhi 18:6a4db94011d3 198
sahilmgandhi 18:6a4db94011d3 199 /** @defgroup USART_Mode USART Mode
sahilmgandhi 18:6a4db94011d3 200 * @{
sahilmgandhi 18:6a4db94011d3 201 */
sahilmgandhi 18:6a4db94011d3 202 #define USART_MODE_RX ((uint32_t)USART_CR1_RE)
sahilmgandhi 18:6a4db94011d3 203 #define USART_MODE_TX ((uint32_t)USART_CR1_TE)
sahilmgandhi 18:6a4db94011d3 204 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
sahilmgandhi 18:6a4db94011d3 205 /**
sahilmgandhi 18:6a4db94011d3 206 * @}
sahilmgandhi 18:6a4db94011d3 207 */
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 /** @defgroup USART_Clock USART Clock
sahilmgandhi 18:6a4db94011d3 210 * @{
sahilmgandhi 18:6a4db94011d3 211 */
sahilmgandhi 18:6a4db94011d3 212 #define USART_CLOCK_DISABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 213 #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN)
sahilmgandhi 18:6a4db94011d3 214 /**
sahilmgandhi 18:6a4db94011d3 215 * @}
sahilmgandhi 18:6a4db94011d3 216 */
sahilmgandhi 18:6a4db94011d3 217
sahilmgandhi 18:6a4db94011d3 218 /** @defgroup USART_Clock_Polarity USART Clock Polarity
sahilmgandhi 18:6a4db94011d3 219 * @{
sahilmgandhi 18:6a4db94011d3 220 */
sahilmgandhi 18:6a4db94011d3 221 #define USART_POLARITY_LOW ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 222 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
sahilmgandhi 18:6a4db94011d3 223 /**
sahilmgandhi 18:6a4db94011d3 224 * @}
sahilmgandhi 18:6a4db94011d3 225 */
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 /** @defgroup USART_Clock_Phase USART Clock Phase
sahilmgandhi 18:6a4db94011d3 228 * @{
sahilmgandhi 18:6a4db94011d3 229 */
sahilmgandhi 18:6a4db94011d3 230 #define USART_PHASE_1EDGE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 231 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
sahilmgandhi 18:6a4db94011d3 232 /**
sahilmgandhi 18:6a4db94011d3 233 * @}
sahilmgandhi 18:6a4db94011d3 234 */
sahilmgandhi 18:6a4db94011d3 235
sahilmgandhi 18:6a4db94011d3 236 /** @defgroup USART_Last_Bit USART Last Bit
sahilmgandhi 18:6a4db94011d3 237 * @{
sahilmgandhi 18:6a4db94011d3 238 */
sahilmgandhi 18:6a4db94011d3 239 #define USART_LASTBIT_DISABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 240 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
sahilmgandhi 18:6a4db94011d3 241 /**
sahilmgandhi 18:6a4db94011d3 242 * @}
sahilmgandhi 18:6a4db94011d3 243 */
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 /** @defgroup USART_NACK_State USART NACK State
sahilmgandhi 18:6a4db94011d3 246 * @{
sahilmgandhi 18:6a4db94011d3 247 */
sahilmgandhi 18:6a4db94011d3 248 #define USART_NACK_ENABLE ((uint32_t)USART_CR3_NACK)
sahilmgandhi 18:6a4db94011d3 249 #define USART_NACK_DISABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 250 /**
sahilmgandhi 18:6a4db94011d3 251 * @}
sahilmgandhi 18:6a4db94011d3 252 */
sahilmgandhi 18:6a4db94011d3 253
sahilmgandhi 18:6a4db94011d3 254 /** @defgroup USART_Flags USART Flags
sahilmgandhi 18:6a4db94011d3 255 * Elements values convention: 0xXXXX
sahilmgandhi 18:6a4db94011d3 256 * - 0xXXXX : Flag mask in the SR register
sahilmgandhi 18:6a4db94011d3 257 * @{
sahilmgandhi 18:6a4db94011d3 258 */
sahilmgandhi 18:6a4db94011d3 259 #define USART_FLAG_TXE ((uint32_t)0x00000080U)
sahilmgandhi 18:6a4db94011d3 260 #define USART_FLAG_TC ((uint32_t)0x00000040U)
sahilmgandhi 18:6a4db94011d3 261 #define USART_FLAG_RXNE ((uint32_t)0x00000020U)
sahilmgandhi 18:6a4db94011d3 262 #define USART_FLAG_IDLE ((uint32_t)0x00000010U)
sahilmgandhi 18:6a4db94011d3 263 #define USART_FLAG_ORE ((uint32_t)0x00000008U)
sahilmgandhi 18:6a4db94011d3 264 #define USART_FLAG_NE ((uint32_t)0x00000004U)
sahilmgandhi 18:6a4db94011d3 265 #define USART_FLAG_FE ((uint32_t)0x00000002U)
sahilmgandhi 18:6a4db94011d3 266 #define USART_FLAG_PE ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 267 /**
sahilmgandhi 18:6a4db94011d3 268 * @}
sahilmgandhi 18:6a4db94011d3 269 */
sahilmgandhi 18:6a4db94011d3 270
sahilmgandhi 18:6a4db94011d3 271 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
sahilmgandhi 18:6a4db94011d3 272 * Elements values convention: 0xY000XXXX
sahilmgandhi 18:6a4db94011d3 273 * - XXXX : Interrupt mask in the XX register
sahilmgandhi 18:6a4db94011d3 274 * - Y : Interrupt source register (2bits)
sahilmgandhi 18:6a4db94011d3 275 * - 01: CR1 register
sahilmgandhi 18:6a4db94011d3 276 * - 10: CR2 register
sahilmgandhi 18:6a4db94011d3 277 * - 11: CR3 register
sahilmgandhi 18:6a4db94011d3 278 *
sahilmgandhi 18:6a4db94011d3 279 * @{
sahilmgandhi 18:6a4db94011d3 280 */
sahilmgandhi 18:6a4db94011d3 281 #define USART_IT_PE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
sahilmgandhi 18:6a4db94011d3 282 #define USART_IT_TXE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
sahilmgandhi 18:6a4db94011d3 283 #define USART_IT_TC ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
sahilmgandhi 18:6a4db94011d3 284 #define USART_IT_RXNE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
sahilmgandhi 18:6a4db94011d3 285 #define USART_IT_IDLE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
sahilmgandhi 18:6a4db94011d3 286
sahilmgandhi 18:6a4db94011d3 287 #define USART_IT_LBD ((uint32_t)(USART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
sahilmgandhi 18:6a4db94011d3 288
sahilmgandhi 18:6a4db94011d3 289 #define USART_IT_CTS ((uint32_t)(USART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
sahilmgandhi 18:6a4db94011d3 290 #define USART_IT_ERR ((uint32_t)(USART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
sahilmgandhi 18:6a4db94011d3 291 /**
sahilmgandhi 18:6a4db94011d3 292 * @}
sahilmgandhi 18:6a4db94011d3 293 */
sahilmgandhi 18:6a4db94011d3 294
sahilmgandhi 18:6a4db94011d3 295 /**
sahilmgandhi 18:6a4db94011d3 296 * @}
sahilmgandhi 18:6a4db94011d3 297 */
sahilmgandhi 18:6a4db94011d3 298
sahilmgandhi 18:6a4db94011d3 299 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 300 /** @defgroup USART_Exported_Macros USART Exported Macros
sahilmgandhi 18:6a4db94011d3 301 * @{
sahilmgandhi 18:6a4db94011d3 302 */
sahilmgandhi 18:6a4db94011d3 303
sahilmgandhi 18:6a4db94011d3 304 /** @brief Reset USART handle state
sahilmgandhi 18:6a4db94011d3 305 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 306 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 307 * @retval None
sahilmgandhi 18:6a4db94011d3 308 */
sahilmgandhi 18:6a4db94011d3 309 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
sahilmgandhi 18:6a4db94011d3 310
sahilmgandhi 18:6a4db94011d3 311 /** @brief Checks whether the specified Smartcard flag is set or not.
sahilmgandhi 18:6a4db94011d3 312 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 313 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 314 * @param __FLAG__: specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 315 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 316 * @arg USART_FLAG_TXE: Transmit data register empty flag
sahilmgandhi 18:6a4db94011d3 317 * @arg USART_FLAG_TC: Transmission Complete flag
sahilmgandhi 18:6a4db94011d3 318 * @arg USART_FLAG_RXNE: Receive data register not empty flag
sahilmgandhi 18:6a4db94011d3 319 * @arg USART_FLAG_IDLE: Idle Line detection flag
sahilmgandhi 18:6a4db94011d3 320 * @arg USART_FLAG_ORE: Overrun Error flag
sahilmgandhi 18:6a4db94011d3 321 * @arg USART_FLAG_NE: Noise Error flag
sahilmgandhi 18:6a4db94011d3 322 * @arg USART_FLAG_FE: Framing Error flag
sahilmgandhi 18:6a4db94011d3 323 * @arg USART_FLAG_PE: Parity Error flag
sahilmgandhi 18:6a4db94011d3 324 * @retval The new state of __FLAG__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 325 */
sahilmgandhi 18:6a4db94011d3 326 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
sahilmgandhi 18:6a4db94011d3 327
sahilmgandhi 18:6a4db94011d3 328 /** @brief Clears the specified Smartcard pending flags.
sahilmgandhi 18:6a4db94011d3 329 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 330 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 331 * @param __FLAG__: specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 332 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 333 * @arg USART_FLAG_TC: Transmission Complete flag.
sahilmgandhi 18:6a4db94011d3 334 * @arg USART_FLAG_RXNE: Receive data register not empty flag.
sahilmgandhi 18:6a4db94011d3 335 *
sahilmgandhi 18:6a4db94011d3 336 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
sahilmgandhi 18:6a4db94011d3 337 * error) and IDLE (Idle line detected) flags are cleared by software
sahilmgandhi 18:6a4db94011d3 338 * sequence: a read operation to USART_SR register followed by a read
sahilmgandhi 18:6a4db94011d3 339 * operation to USART_DR register.
sahilmgandhi 18:6a4db94011d3 340 * @note RXNE flag can be also cleared by a read to the USART_DR register.
sahilmgandhi 18:6a4db94011d3 341 * @note TC flag can be also cleared by software sequence: a read operation to
sahilmgandhi 18:6a4db94011d3 342 * USART_SR register followed by a write operation to USART_DR register.
sahilmgandhi 18:6a4db94011d3 343 * @note TXE flag is cleared only by a write to the USART_DR register.
sahilmgandhi 18:6a4db94011d3 344 *
sahilmgandhi 18:6a4db94011d3 345 * @retval None
sahilmgandhi 18:6a4db94011d3 346 */
sahilmgandhi 18:6a4db94011d3 347 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
sahilmgandhi 18:6a4db94011d3 348
sahilmgandhi 18:6a4db94011d3 349 /** @brief Clear the USART PE pending flag.
sahilmgandhi 18:6a4db94011d3 350 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 351 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 352 * @retval None
sahilmgandhi 18:6a4db94011d3 353 */
sahilmgandhi 18:6a4db94011d3 354 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 355 do{ \
sahilmgandhi 18:6a4db94011d3 356 __IO uint32_t tmpreg_pe = 0x00U; \
sahilmgandhi 18:6a4db94011d3 357 tmpreg_pe = (__HANDLE__)->Instance->SR; \
sahilmgandhi 18:6a4db94011d3 358 tmpreg_pe = (__HANDLE__)->Instance->DR; \
sahilmgandhi 18:6a4db94011d3 359 UNUSED(tmpreg_pe); \
sahilmgandhi 18:6a4db94011d3 360 } while(0)
sahilmgandhi 18:6a4db94011d3 361
sahilmgandhi 18:6a4db94011d3 362 /** @brief Clear the USART FE pending flag.
sahilmgandhi 18:6a4db94011d3 363 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 364 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 365 * @retval None
sahilmgandhi 18:6a4db94011d3 366 */
sahilmgandhi 18:6a4db94011d3 367 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 368
sahilmgandhi 18:6a4db94011d3 369 /** @brief Clear the USART NE pending flag.
sahilmgandhi 18:6a4db94011d3 370 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 371 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 372 * @retval None
sahilmgandhi 18:6a4db94011d3 373 */
sahilmgandhi 18:6a4db94011d3 374 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 375
sahilmgandhi 18:6a4db94011d3 376 /** @brief Clear the UART ORE pending flag.
sahilmgandhi 18:6a4db94011d3 377 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 378 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 379 * @retval None
sahilmgandhi 18:6a4db94011d3 380 */
sahilmgandhi 18:6a4db94011d3 381 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 382
sahilmgandhi 18:6a4db94011d3 383 /** @brief Clear the USART IDLE pending flag.
sahilmgandhi 18:6a4db94011d3 384 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 385 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 386 * @retval None
sahilmgandhi 18:6a4db94011d3 387 */
sahilmgandhi 18:6a4db94011d3 388 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 389
sahilmgandhi 18:6a4db94011d3 390 /** @brief Enables or disables the specified USART interrupts.
sahilmgandhi 18:6a4db94011d3 391 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 392 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 393 * @param __INTERRUPT__: specifies the USART interrupt source to check.
sahilmgandhi 18:6a4db94011d3 394 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 395 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
sahilmgandhi 18:6a4db94011d3 396 * @arg USART_IT_TC: Transmission complete interrupt
sahilmgandhi 18:6a4db94011d3 397 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
sahilmgandhi 18:6a4db94011d3 398 * @arg USART_IT_IDLE: Idle line detection interrupt
sahilmgandhi 18:6a4db94011d3 399 * @arg USART_IT_PE: Parity Error interrupt
sahilmgandhi 18:6a4db94011d3 400 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
sahilmgandhi 18:6a4db94011d3 401 * This parameter can be: ENABLE or DISABLE.
sahilmgandhi 18:6a4db94011d3 402 * @retval None
sahilmgandhi 18:6a4db94011d3 403 */
sahilmgandhi 18:6a4db94011d3 404 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 405 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 406 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK)))
sahilmgandhi 18:6a4db94011d3 407 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 408 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 409 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK)))
sahilmgandhi 18:6a4db94011d3 410
sahilmgandhi 18:6a4db94011d3 411 /** @brief Checks whether the specified USART interrupt has occurred or not.
sahilmgandhi 18:6a4db94011d3 412 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 413 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
sahilmgandhi 18:6a4db94011d3 414 * @param __IT__: specifies the USART interrupt source to check.
sahilmgandhi 18:6a4db94011d3 415 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 416 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
sahilmgandhi 18:6a4db94011d3 417 * @arg USART_IT_TC: Transmission complete interrupt
sahilmgandhi 18:6a4db94011d3 418 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
sahilmgandhi 18:6a4db94011d3 419 * @arg USART_IT_IDLE: Idle line detection interrupt
sahilmgandhi 18:6a4db94011d3 420 * @arg USART_IT_ERR: Error interrupt
sahilmgandhi 18:6a4db94011d3 421 * @arg USART_IT_PE: Parity Error interrupt
sahilmgandhi 18:6a4db94011d3 422 * @retval The new state of __IT__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 423 */
sahilmgandhi 18:6a4db94011d3 424 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \
sahilmgandhi 18:6a4db94011d3 425 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK))
sahilmgandhi 18:6a4db94011d3 426
sahilmgandhi 18:6a4db94011d3 427 /** @brief Macro to enable the USART's one bit sample method
sahilmgandhi 18:6a4db94011d3 428 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 429 * @retval None
sahilmgandhi 18:6a4db94011d3 430 */
sahilmgandhi 18:6a4db94011d3 431 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
sahilmgandhi 18:6a4db94011d3 432
sahilmgandhi 18:6a4db94011d3 433 /** @brief Macro to disable the USART's one bit sample method
sahilmgandhi 18:6a4db94011d3 434 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 435 * @retval None
sahilmgandhi 18:6a4db94011d3 436 */
sahilmgandhi 18:6a4db94011d3 437 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
sahilmgandhi 18:6a4db94011d3 438
sahilmgandhi 18:6a4db94011d3 439 /** @brief Enable USART
sahilmgandhi 18:6a4db94011d3 440 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 441 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
sahilmgandhi 18:6a4db94011d3 442 * @retval None
sahilmgandhi 18:6a4db94011d3 443 */
sahilmgandhi 18:6a4db94011d3 444 #define __HAL_USART_ENABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446 /** @brief Disable USART
sahilmgandhi 18:6a4db94011d3 447 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 448 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
sahilmgandhi 18:6a4db94011d3 449 * @retval None
sahilmgandhi 18:6a4db94011d3 450 */
sahilmgandhi 18:6a4db94011d3 451 #define __HAL_USART_DISABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
sahilmgandhi 18:6a4db94011d3 452
sahilmgandhi 18:6a4db94011d3 453 /**
sahilmgandhi 18:6a4db94011d3 454 * @}
sahilmgandhi 18:6a4db94011d3 455 */
sahilmgandhi 18:6a4db94011d3 456 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 457 /** @addtogroup USART_Exported_Functions
sahilmgandhi 18:6a4db94011d3 458 * @{
sahilmgandhi 18:6a4db94011d3 459 */
sahilmgandhi 18:6a4db94011d3 460
sahilmgandhi 18:6a4db94011d3 461 /** @addtogroup USART_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 462 * @{
sahilmgandhi 18:6a4db94011d3 463 */
sahilmgandhi 18:6a4db94011d3 464 /* Initialization/de-initialization functions **********************************/
sahilmgandhi 18:6a4db94011d3 465 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 466 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 467 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 468 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 469 /**
sahilmgandhi 18:6a4db94011d3 470 * @}
sahilmgandhi 18:6a4db94011d3 471 */
sahilmgandhi 18:6a4db94011d3 472
sahilmgandhi 18:6a4db94011d3 473 /** @addtogroup USART_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 474 * @{
sahilmgandhi 18:6a4db94011d3 475 */
sahilmgandhi 18:6a4db94011d3 476 /* IO operation functions *******************************************************/
sahilmgandhi 18:6a4db94011d3 477 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 478 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 479 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 480 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 481 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 482 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 483 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 484 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 485 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 486 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 487 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 488 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 489
sahilmgandhi 18:6a4db94011d3 490 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 491 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 492 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 493 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 494 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 495 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 496 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 497 /**
sahilmgandhi 18:6a4db94011d3 498 * @}
sahilmgandhi 18:6a4db94011d3 499 */
sahilmgandhi 18:6a4db94011d3 500
sahilmgandhi 18:6a4db94011d3 501 /** @addtogroup USART_Exported_Functions_Group3
sahilmgandhi 18:6a4db94011d3 502 * @{
sahilmgandhi 18:6a4db94011d3 503 */
sahilmgandhi 18:6a4db94011d3 504 /* Peripheral State functions ************************************************/
sahilmgandhi 18:6a4db94011d3 505 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 506 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
sahilmgandhi 18:6a4db94011d3 507 /**
sahilmgandhi 18:6a4db94011d3 508 * @}
sahilmgandhi 18:6a4db94011d3 509 */
sahilmgandhi 18:6a4db94011d3 510
sahilmgandhi 18:6a4db94011d3 511 /**
sahilmgandhi 18:6a4db94011d3 512 * @}
sahilmgandhi 18:6a4db94011d3 513 */
sahilmgandhi 18:6a4db94011d3 514 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 515 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 516 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 517 /** @defgroup USART_Private_Constants USART Private Constants
sahilmgandhi 18:6a4db94011d3 518 * @{
sahilmgandhi 18:6a4db94011d3 519 */
sahilmgandhi 18:6a4db94011d3 520 /** @brief USART interruptions flag mask
sahilmgandhi 18:6a4db94011d3 521 *
sahilmgandhi 18:6a4db94011d3 522 */
sahilmgandhi 18:6a4db94011d3 523 #define USART_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
sahilmgandhi 18:6a4db94011d3 524 USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
sahilmgandhi 18:6a4db94011d3 525
sahilmgandhi 18:6a4db94011d3 526 #define USART_CR1_REG_INDEX 1U
sahilmgandhi 18:6a4db94011d3 527 #define USART_CR2_REG_INDEX 2U
sahilmgandhi 18:6a4db94011d3 528 #define USART_CR3_REG_INDEX 3U
sahilmgandhi 18:6a4db94011d3 529 /**
sahilmgandhi 18:6a4db94011d3 530 * @}
sahilmgandhi 18:6a4db94011d3 531 */
sahilmgandhi 18:6a4db94011d3 532
sahilmgandhi 18:6a4db94011d3 533 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 534 /** @defgroup USART_Private_Macros USART Private Macros
sahilmgandhi 18:6a4db94011d3 535 * @{
sahilmgandhi 18:6a4db94011d3 536 */
sahilmgandhi 18:6a4db94011d3 537 #define IS_USART_NACK_STATE(NACK) (((NACK) == USART_NACK_ENABLE) || \
sahilmgandhi 18:6a4db94011d3 538 ((NACK) == USART_NACK_DISABLE))
sahilmgandhi 18:6a4db94011d3 539 #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 540 ((LASTBIT) == USART_LASTBIT_ENABLE))
sahilmgandhi 18:6a4db94011d3 541 #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE))
sahilmgandhi 18:6a4db94011d3 542 #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH))
sahilmgandhi 18:6a4db94011d3 543 #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 544 ((CLOCK) == USART_CLOCK_ENABLE))
sahilmgandhi 18:6a4db94011d3 545 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \
sahilmgandhi 18:6a4db94011d3 546 ((LENGTH) == USART_WORDLENGTH_9B))
sahilmgandhi 18:6a4db94011d3 547 #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \
sahilmgandhi 18:6a4db94011d3 548 ((STOPBITS) == USART_STOPBITS_0_5) || \
sahilmgandhi 18:6a4db94011d3 549 ((STOPBITS) == USART_STOPBITS_1_5) || \
sahilmgandhi 18:6a4db94011d3 550 ((STOPBITS) == USART_STOPBITS_2))
sahilmgandhi 18:6a4db94011d3 551 #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \
sahilmgandhi 18:6a4db94011d3 552 ((PARITY) == USART_PARITY_EVEN) || \
sahilmgandhi 18:6a4db94011d3 553 ((PARITY) == USART_PARITY_ODD))
sahilmgandhi 18:6a4db94011d3 554 #define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFF3) == 0x00U) && ((MODE) != (uint32_t)0x00U))
sahilmgandhi 18:6a4db94011d3 555 #define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 7500001U)
sahilmgandhi 18:6a4db94011d3 556
sahilmgandhi 18:6a4db94011d3 557 #define USART_DIV(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
sahilmgandhi 18:6a4db94011d3 558 #define USART_DIVMANT(_PCLK_, _BAUD_) (USART_DIV((_PCLK_), (_BAUD_))/100U)
sahilmgandhi 18:6a4db94011d3 559 #define USART_DIVFRAQ(_PCLK_, _BAUD_) (((USART_DIV((_PCLK_), (_BAUD_)) - (USART_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
sahilmgandhi 18:6a4db94011d3 560 #define USART_BRR(_PCLK_, _BAUD_) ((USART_DIVMANT((_PCLK_), (_BAUD_)) << 4U)|(USART_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0FU))
sahilmgandhi 18:6a4db94011d3 561 /**
sahilmgandhi 18:6a4db94011d3 562 * @}
sahilmgandhi 18:6a4db94011d3 563 */
sahilmgandhi 18:6a4db94011d3 564
sahilmgandhi 18:6a4db94011d3 565 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 566 /** @defgroup USART_Private_Functions USART Private Functions
sahilmgandhi 18:6a4db94011d3 567 * @{
sahilmgandhi 18:6a4db94011d3 568 */
sahilmgandhi 18:6a4db94011d3 569
sahilmgandhi 18:6a4db94011d3 570 /**
sahilmgandhi 18:6a4db94011d3 571 * @}
sahilmgandhi 18:6a4db94011d3 572 */
sahilmgandhi 18:6a4db94011d3 573
sahilmgandhi 18:6a4db94011d3 574 /**
sahilmgandhi 18:6a4db94011d3 575 * @}
sahilmgandhi 18:6a4db94011d3 576 */
sahilmgandhi 18:6a4db94011d3 577
sahilmgandhi 18:6a4db94011d3 578 /**
sahilmgandhi 18:6a4db94011d3 579 * @}
sahilmgandhi 18:6a4db94011d3 580 */
sahilmgandhi 18:6a4db94011d3 581
sahilmgandhi 18:6a4db94011d3 582 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 583 }
sahilmgandhi 18:6a4db94011d3 584 #endif
sahilmgandhi 18:6a4db94011d3 585
sahilmgandhi 18:6a4db94011d3 586 #endif /* __STM32F2xx_HAL_USART_H */
sahilmgandhi 18:6a4db94011d3 587
sahilmgandhi 18:6a4db94011d3 588 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/