MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pwr.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_pwr.c
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief PWR HAL module driver.
sahilmgandhi 18:6a4db94011d3 8 * This file provides firmware functions to manage the following
sahilmgandhi 18:6a4db94011d3 9 * functionalities of the Power Controller (PWR) peripheral:
sahilmgandhi 18:6a4db94011d3 10 * + Initialization and de-initialization functions
sahilmgandhi 18:6a4db94011d3 11 * + Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 14 * @attention
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 19 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 20 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 21 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 22 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 23 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 24 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 25 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 26 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 27 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 28 *
sahilmgandhi 18:6a4db94011d3 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 32 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 39 *
sahilmgandhi 18:6a4db94011d3 40 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 41 */
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 44 #include "stm32f2xx_hal.h"
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 47 * @{
sahilmgandhi 18:6a4db94011d3 48 */
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 /** @defgroup PWR PWR
sahilmgandhi 18:6a4db94011d3 51 * @brief PWR HAL module driver
sahilmgandhi 18:6a4db94011d3 52 * @{
sahilmgandhi 18:6a4db94011d3 53 */
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 #ifdef HAL_PWR_MODULE_ENABLED
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Private typedef -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /* Private define ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 59 /** @addtogroup PWR_Private_Constants
sahilmgandhi 18:6a4db94011d3 60 * @{
sahilmgandhi 18:6a4db94011d3 61 */
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
sahilmgandhi 18:6a4db94011d3 64 * @{
sahilmgandhi 18:6a4db94011d3 65 */
sahilmgandhi 18:6a4db94011d3 66 #define PVD_MODE_IT ((uint32_t)0x00010000U)
sahilmgandhi 18:6a4db94011d3 67 #define PVD_MODE_EVT ((uint32_t)0x00020000U)
sahilmgandhi 18:6a4db94011d3 68 #define PVD_RISING_EDGE ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 69 #define PVD_FALLING_EDGE ((uint32_t)0x00000002U)
sahilmgandhi 18:6a4db94011d3 70 /**
sahilmgandhi 18:6a4db94011d3 71 * @}
sahilmgandhi 18:6a4db94011d3 72 */
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74 /**
sahilmgandhi 18:6a4db94011d3 75 * @}
sahilmgandhi 18:6a4db94011d3 76 */
sahilmgandhi 18:6a4db94011d3 77 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 78 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 79 /* Private function prototypes -----------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 80 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 /** @defgroup PWR_Exported_Functions PWR Exported Functions
sahilmgandhi 18:6a4db94011d3 83 * @{
sahilmgandhi 18:6a4db94011d3 84 */
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
sahilmgandhi 18:6a4db94011d3 87 * @brief Initialization and de-initialization functions
sahilmgandhi 18:6a4db94011d3 88 *
sahilmgandhi 18:6a4db94011d3 89 @verbatim
sahilmgandhi 18:6a4db94011d3 90 ===============================================================================
sahilmgandhi 18:6a4db94011d3 91 ##### Initialization and de-initialization functions #####
sahilmgandhi 18:6a4db94011d3 92 ===============================================================================
sahilmgandhi 18:6a4db94011d3 93 [..]
sahilmgandhi 18:6a4db94011d3 94 After reset, the backup domain (RTC registers, RTC backup data
sahilmgandhi 18:6a4db94011d3 95 registers and backup SRAM) is protected against possible unwanted
sahilmgandhi 18:6a4db94011d3 96 write accesses.
sahilmgandhi 18:6a4db94011d3 97 To enable access to the RTC Domain and RTC registers, proceed as follows:
sahilmgandhi 18:6a4db94011d3 98 (+) Enable the Power Controller (PWR) APB1 interface clock using the
sahilmgandhi 18:6a4db94011d3 99 __HAL_RCC_PWR_CLK_ENABLE() macro.
sahilmgandhi 18:6a4db94011d3 100 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 @endverbatim
sahilmgandhi 18:6a4db94011d3 103 * @{
sahilmgandhi 18:6a4db94011d3 104 */
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 /**
sahilmgandhi 18:6a4db94011d3 107 * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
sahilmgandhi 18:6a4db94011d3 108 * @retval None
sahilmgandhi 18:6a4db94011d3 109 */
sahilmgandhi 18:6a4db94011d3 110 void HAL_PWR_DeInit(void)
sahilmgandhi 18:6a4db94011d3 111 {
sahilmgandhi 18:6a4db94011d3 112 __HAL_RCC_PWR_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 113 __HAL_RCC_PWR_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 114 }
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 /**
sahilmgandhi 18:6a4db94011d3 117 * @brief Enables access to the backup domain (RTC registers, RTC
sahilmgandhi 18:6a4db94011d3 118 * backup data registers and backup SRAM).
sahilmgandhi 18:6a4db94011d3 119 * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
sahilmgandhi 18:6a4db94011d3 120 * Backup Domain Access should be kept enabled.
sahilmgandhi 18:6a4db94011d3 121 * @retval None
sahilmgandhi 18:6a4db94011d3 122 */
sahilmgandhi 18:6a4db94011d3 123 void HAL_PWR_EnableBkUpAccess(void)
sahilmgandhi 18:6a4db94011d3 124 {
sahilmgandhi 18:6a4db94011d3 125 *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
sahilmgandhi 18:6a4db94011d3 126 }
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 /**
sahilmgandhi 18:6a4db94011d3 129 * @brief Disables access to the backup domain (RTC registers, RTC
sahilmgandhi 18:6a4db94011d3 130 * backup data registers and backup SRAM).
sahilmgandhi 18:6a4db94011d3 131 * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
sahilmgandhi 18:6a4db94011d3 132 * Backup Domain Access should be kept enabled.
sahilmgandhi 18:6a4db94011d3 133 * @retval None
sahilmgandhi 18:6a4db94011d3 134 */
sahilmgandhi 18:6a4db94011d3 135 void HAL_PWR_DisableBkUpAccess(void)
sahilmgandhi 18:6a4db94011d3 136 {
sahilmgandhi 18:6a4db94011d3 137 *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE;
sahilmgandhi 18:6a4db94011d3 138 }
sahilmgandhi 18:6a4db94011d3 139
sahilmgandhi 18:6a4db94011d3 140 /**
sahilmgandhi 18:6a4db94011d3 141 * @}
sahilmgandhi 18:6a4db94011d3 142 */
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 145 * @brief Low Power modes configuration functions
sahilmgandhi 18:6a4db94011d3 146 *
sahilmgandhi 18:6a4db94011d3 147 @verbatim
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 ===============================================================================
sahilmgandhi 18:6a4db94011d3 150 ##### Peripheral Control functions #####
sahilmgandhi 18:6a4db94011d3 151 ===============================================================================
sahilmgandhi 18:6a4db94011d3 152
sahilmgandhi 18:6a4db94011d3 153 *** PVD configuration ***
sahilmgandhi 18:6a4db94011d3 154 =========================
sahilmgandhi 18:6a4db94011d3 155 [..]
sahilmgandhi 18:6a4db94011d3 156 (+) The PVD is used to monitor the VDD power supply by comparing it to a
sahilmgandhi 18:6a4db94011d3 157 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
sahilmgandhi 18:6a4db94011d3 158 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
sahilmgandhi 18:6a4db94011d3 159 than the PVD threshold. This event is internally connected to the EXTI
sahilmgandhi 18:6a4db94011d3 160 line16 and can generate an interrupt if enabled. This is done through
sahilmgandhi 18:6a4db94011d3 161 __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
sahilmgandhi 18:6a4db94011d3 162 (+) The PVD is stopped in Standby mode.
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 *** Wake-up pin configuration ***
sahilmgandhi 18:6a4db94011d3 165 ================================
sahilmgandhi 18:6a4db94011d3 166 [..]
sahilmgandhi 18:6a4db94011d3 167 (+) Wake-up pin is used to wake up the system from Standby mode. This pin is
sahilmgandhi 18:6a4db94011d3 168 forced in input pull-down configuration and is active on rising edges.
sahilmgandhi 18:6a4db94011d3 169 (+) There is one Wake-up pin: Wake-up Pin 1 on PA.00.
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 *** Low Power modes configuration ***
sahilmgandhi 18:6a4db94011d3 172 =====================================
sahilmgandhi 18:6a4db94011d3 173 [..]
sahilmgandhi 18:6a4db94011d3 174 The devices feature 3 low-power modes:
sahilmgandhi 18:6a4db94011d3 175 (+) Sleep mode: Cortex-M3 core stopped, peripherals kept running.
sahilmgandhi 18:6a4db94011d3 176 (+) Stop mode: all clocks are stopped, regulator running, regulator
sahilmgandhi 18:6a4db94011d3 177 in low power mode
sahilmgandhi 18:6a4db94011d3 178 (+) Standby mode: 1.2V domain powered off.
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 *** Sleep mode ***
sahilmgandhi 18:6a4db94011d3 181 ==================
sahilmgandhi 18:6a4db94011d3 182 [..]
sahilmgandhi 18:6a4db94011d3 183 (+) Entry:
sahilmgandhi 18:6a4db94011d3 184 The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI)
sahilmgandhi 18:6a4db94011d3 185 functions with
sahilmgandhi 18:6a4db94011d3 186 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
sahilmgandhi 18:6a4db94011d3 187 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
sahilmgandhi 18:6a4db94011d3 188
sahilmgandhi 18:6a4db94011d3 189 -@@- The Regulator parameter is not used for the STM32F2 family
sahilmgandhi 18:6a4db94011d3 190 and is kept as parameter just to maintain compatibility with the
sahilmgandhi 18:6a4db94011d3 191 lower power families (STM32L).
sahilmgandhi 18:6a4db94011d3 192 (+) Exit:
sahilmgandhi 18:6a4db94011d3 193 Any peripheral interrupt acknowledged by the nested vectored interrupt
sahilmgandhi 18:6a4db94011d3 194 controller (NVIC) can wake up the device from Sleep mode.
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196 *** Stop mode ***
sahilmgandhi 18:6a4db94011d3 197 =================
sahilmgandhi 18:6a4db94011d3 198 [..]
sahilmgandhi 18:6a4db94011d3 199 In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI,
sahilmgandhi 18:6a4db94011d3 200 and the HSE RC oscillators are disabled. Internal SRAM and register contents
sahilmgandhi 18:6a4db94011d3 201 are preserved.
sahilmgandhi 18:6a4db94011d3 202 The voltage regulator can be configured either in normal or low-power mode.
sahilmgandhi 18:6a4db94011d3 203 To minimize the consumption In Stop mode, FLASH can be powered off before
sahilmgandhi 18:6a4db94011d3 204 entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function.
sahilmgandhi 18:6a4db94011d3 205 It can be switched on again by software after exiting the Stop mode using
sahilmgandhi 18:6a4db94011d3 206 the HAL_PWREx_DisableFlashPowerDown() function.
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 (+) Entry:
sahilmgandhi 18:6a4db94011d3 209 The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON)
sahilmgandhi 18:6a4db94011d3 210 function with:
sahilmgandhi 18:6a4db94011d3 211 (++) Main regulator ON.
sahilmgandhi 18:6a4db94011d3 212 (++) Low Power regulator ON.
sahilmgandhi 18:6a4db94011d3 213 (+) Exit:
sahilmgandhi 18:6a4db94011d3 214 Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
sahilmgandhi 18:6a4db94011d3 215
sahilmgandhi 18:6a4db94011d3 216 *** Standby mode ***
sahilmgandhi 18:6a4db94011d3 217 ====================
sahilmgandhi 18:6a4db94011d3 218 [..]
sahilmgandhi 18:6a4db94011d3 219 (+)
sahilmgandhi 18:6a4db94011d3 220 The Standby mode allows to achieve the lowest power consumption. It is based
sahilmgandhi 18:6a4db94011d3 221 on the Cortex-M3 deep sleep mode, with the voltage regulator disabled.
sahilmgandhi 18:6a4db94011d3 222 The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and
sahilmgandhi 18:6a4db94011d3 223 the HSE oscillator are also switched off. SRAM and register contents are lost
sahilmgandhi 18:6a4db94011d3 224 except for the RTC registers, RTC backup registers, backup SRAM and Standby
sahilmgandhi 18:6a4db94011d3 225 circuitry.
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 The voltage regulator is OFF.
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229 (++) Entry:
sahilmgandhi 18:6a4db94011d3 230 (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
sahilmgandhi 18:6a4db94011d3 231 (++) Exit:
sahilmgandhi 18:6a4db94011d3 232 (+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wake-up,
sahilmgandhi 18:6a4db94011d3 233 tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
sahilmgandhi 18:6a4db94011d3 234
sahilmgandhi 18:6a4db94011d3 235 *** Auto-wake-up (AWU) from low-power mode ***
sahilmgandhi 18:6a4db94011d3 236 =============================================
sahilmgandhi 18:6a4db94011d3 237 [..]
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
sahilmgandhi 18:6a4db94011d3 240 Wake-up event, a tamper event or a time-stamp event, without depending on
sahilmgandhi 18:6a4db94011d3 241 an external interrupt (Auto-wake-up mode).
sahilmgandhi 18:6a4db94011d3 242
sahilmgandhi 18:6a4db94011d3 243 (+) RTC auto-wake-up (AWU) from the Stop and Standby modes
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
sahilmgandhi 18:6a4db94011d3 246 configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
sahilmgandhi 18:6a4db94011d3 247
sahilmgandhi 18:6a4db94011d3 248 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
sahilmgandhi 18:6a4db94011d3 249 is necessary to configure the RTC to detect the tamper or time stamp event using the
sahilmgandhi 18:6a4db94011d3 250 HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
sahilmgandhi 18:6a4db94011d3 251
sahilmgandhi 18:6a4db94011d3 252 (++) To wake up from the Stop mode with an RTC Wake-up event, it is necessary to
sahilmgandhi 18:6a4db94011d3 253 configure the RTC to generate the RTC Wake-up event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
sahilmgandhi 18:6a4db94011d3 254
sahilmgandhi 18:6a4db94011d3 255 @endverbatim
sahilmgandhi 18:6a4db94011d3 256 * @{
sahilmgandhi 18:6a4db94011d3 257 */
sahilmgandhi 18:6a4db94011d3 258
sahilmgandhi 18:6a4db94011d3 259 /**
sahilmgandhi 18:6a4db94011d3 260 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
sahilmgandhi 18:6a4db94011d3 261 * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
sahilmgandhi 18:6a4db94011d3 262 * information for the PVD.
sahilmgandhi 18:6a4db94011d3 263 * @note Refer to the electrical characteristics of your device datasheet for
sahilmgandhi 18:6a4db94011d3 264 * more details about the voltage threshold corresponding to each
sahilmgandhi 18:6a4db94011d3 265 * detection level.
sahilmgandhi 18:6a4db94011d3 266 * @retval None
sahilmgandhi 18:6a4db94011d3 267 */
sahilmgandhi 18:6a4db94011d3 268 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
sahilmgandhi 18:6a4db94011d3 269 {
sahilmgandhi 18:6a4db94011d3 270 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 271 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
sahilmgandhi 18:6a4db94011d3 272 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
sahilmgandhi 18:6a4db94011d3 273
sahilmgandhi 18:6a4db94011d3 274 /* Set PLS[7:5] bits according to PVDLevel value */
sahilmgandhi 18:6a4db94011d3 275 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
sahilmgandhi 18:6a4db94011d3 278 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
sahilmgandhi 18:6a4db94011d3 279 __HAL_PWR_PVD_EXTI_DISABLE_IT();
sahilmgandhi 18:6a4db94011d3 280 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
sahilmgandhi 18:6a4db94011d3 281 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
sahilmgandhi 18:6a4db94011d3 282
sahilmgandhi 18:6a4db94011d3 283 /* Configure interrupt mode */
sahilmgandhi 18:6a4db94011d3 284 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
sahilmgandhi 18:6a4db94011d3 285 {
sahilmgandhi 18:6a4db94011d3 286 __HAL_PWR_PVD_EXTI_ENABLE_IT();
sahilmgandhi 18:6a4db94011d3 287 }
sahilmgandhi 18:6a4db94011d3 288
sahilmgandhi 18:6a4db94011d3 289 /* Configure event mode */
sahilmgandhi 18:6a4db94011d3 290 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
sahilmgandhi 18:6a4db94011d3 291 {
sahilmgandhi 18:6a4db94011d3 292 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
sahilmgandhi 18:6a4db94011d3 293 }
sahilmgandhi 18:6a4db94011d3 294
sahilmgandhi 18:6a4db94011d3 295 /* Configure the edge */
sahilmgandhi 18:6a4db94011d3 296 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
sahilmgandhi 18:6a4db94011d3 297 {
sahilmgandhi 18:6a4db94011d3 298 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
sahilmgandhi 18:6a4db94011d3 299 }
sahilmgandhi 18:6a4db94011d3 300
sahilmgandhi 18:6a4db94011d3 301 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
sahilmgandhi 18:6a4db94011d3 302 {
sahilmgandhi 18:6a4db94011d3 303 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
sahilmgandhi 18:6a4db94011d3 304 }
sahilmgandhi 18:6a4db94011d3 305 }
sahilmgandhi 18:6a4db94011d3 306
sahilmgandhi 18:6a4db94011d3 307 /**
sahilmgandhi 18:6a4db94011d3 308 * @brief Enables the Power Voltage Detector(PVD).
sahilmgandhi 18:6a4db94011d3 309 * @retval None
sahilmgandhi 18:6a4db94011d3 310 */
sahilmgandhi 18:6a4db94011d3 311 void HAL_PWR_EnablePVD(void)
sahilmgandhi 18:6a4db94011d3 312 {
sahilmgandhi 18:6a4db94011d3 313 *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE;
sahilmgandhi 18:6a4db94011d3 314 }
sahilmgandhi 18:6a4db94011d3 315
sahilmgandhi 18:6a4db94011d3 316 /**
sahilmgandhi 18:6a4db94011d3 317 * @brief Disables the Power Voltage Detector(PVD).
sahilmgandhi 18:6a4db94011d3 318 * @retval None
sahilmgandhi 18:6a4db94011d3 319 */
sahilmgandhi 18:6a4db94011d3 320 void HAL_PWR_DisablePVD(void)
sahilmgandhi 18:6a4db94011d3 321 {
sahilmgandhi 18:6a4db94011d3 322 *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE;
sahilmgandhi 18:6a4db94011d3 323 }
sahilmgandhi 18:6a4db94011d3 324
sahilmgandhi 18:6a4db94011d3 325 /**
sahilmgandhi 18:6a4db94011d3 326 * @brief Enables the Wake-up PINx functionality.
sahilmgandhi 18:6a4db94011d3 327 * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
sahilmgandhi 18:6a4db94011d3 328 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 329 * @arg PWR_WAKEUP_PIN1
sahilmgandhi 18:6a4db94011d3 330 * @retval None
sahilmgandhi 18:6a4db94011d3 331 */
sahilmgandhi 18:6a4db94011d3 332 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
sahilmgandhi 18:6a4db94011d3 333 {
sahilmgandhi 18:6a4db94011d3 334 /* Check the parameter */
sahilmgandhi 18:6a4db94011d3 335 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
sahilmgandhi 18:6a4db94011d3 336
sahilmgandhi 18:6a4db94011d3 337 /* Enable the wake up pin */
sahilmgandhi 18:6a4db94011d3 338 SET_BIT(PWR->CSR, WakeUpPinx);
sahilmgandhi 18:6a4db94011d3 339 }
sahilmgandhi 18:6a4db94011d3 340
sahilmgandhi 18:6a4db94011d3 341 /**
sahilmgandhi 18:6a4db94011d3 342 * @brief Disables the Wake-up PINx functionality.
sahilmgandhi 18:6a4db94011d3 343 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
sahilmgandhi 18:6a4db94011d3 344 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 345 * @arg PWR_WAKEUP_PIN1
sahilmgandhi 18:6a4db94011d3 346 * @retval None
sahilmgandhi 18:6a4db94011d3 347 */
sahilmgandhi 18:6a4db94011d3 348 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
sahilmgandhi 18:6a4db94011d3 349 {
sahilmgandhi 18:6a4db94011d3 350 /* Check the parameter */
sahilmgandhi 18:6a4db94011d3 351 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
sahilmgandhi 18:6a4db94011d3 352
sahilmgandhi 18:6a4db94011d3 353 /* Disable the wake up pin */
sahilmgandhi 18:6a4db94011d3 354 CLEAR_BIT(PWR->CSR, WakeUpPinx);
sahilmgandhi 18:6a4db94011d3 355 }
sahilmgandhi 18:6a4db94011d3 356
sahilmgandhi 18:6a4db94011d3 357 /**
sahilmgandhi 18:6a4db94011d3 358 * @brief Enters Sleep mode.
sahilmgandhi 18:6a4db94011d3 359 *
sahilmgandhi 18:6a4db94011d3 360 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
sahilmgandhi 18:6a4db94011d3 361 *
sahilmgandhi 18:6a4db94011d3 362 * @note In Sleep mode, the systick is stopped to avoid exit from this mode with
sahilmgandhi 18:6a4db94011d3 363 * systick interrupt when used as time base for Timeout
sahilmgandhi 18:6a4db94011d3 364 *
sahilmgandhi 18:6a4db94011d3 365 * @param Regulator: Specifies the regulator state in SLEEP mode.
sahilmgandhi 18:6a4db94011d3 366 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 367 * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
sahilmgandhi 18:6a4db94011d3 368 * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
sahilmgandhi 18:6a4db94011d3 369 * @note This parameter is not used for the STM32F2 family and is kept as parameter
sahilmgandhi 18:6a4db94011d3 370 * just to maintain compatibility with the lower power families.
sahilmgandhi 18:6a4db94011d3 371 * @param SLEEPEntry: Specifies if SLEEP mode in entered with WFI or WFE instruction.
sahilmgandhi 18:6a4db94011d3 372 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 373 * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
sahilmgandhi 18:6a4db94011d3 374 * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
sahilmgandhi 18:6a4db94011d3 375 * @retval None
sahilmgandhi 18:6a4db94011d3 376 */
sahilmgandhi 18:6a4db94011d3 377 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
sahilmgandhi 18:6a4db94011d3 378 {
sahilmgandhi 18:6a4db94011d3 379 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 380 assert_param(IS_PWR_REGULATOR(Regulator));
sahilmgandhi 18:6a4db94011d3 381 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
sahilmgandhi 18:6a4db94011d3 382
sahilmgandhi 18:6a4db94011d3 383 /* Clear SLEEPDEEP bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 384 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
sahilmgandhi 18:6a4db94011d3 385
sahilmgandhi 18:6a4db94011d3 386 /* Select SLEEP mode entry -------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 387 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
sahilmgandhi 18:6a4db94011d3 388 {
sahilmgandhi 18:6a4db94011d3 389 /* Request Wait For Interrupt */
sahilmgandhi 18:6a4db94011d3 390 __WFI();
sahilmgandhi 18:6a4db94011d3 391 }
sahilmgandhi 18:6a4db94011d3 392 else
sahilmgandhi 18:6a4db94011d3 393 {
sahilmgandhi 18:6a4db94011d3 394 /* Request Wait For Event */
sahilmgandhi 18:6a4db94011d3 395 __SEV();
sahilmgandhi 18:6a4db94011d3 396 __WFE();
sahilmgandhi 18:6a4db94011d3 397 __WFE();
sahilmgandhi 18:6a4db94011d3 398 }
sahilmgandhi 18:6a4db94011d3 399 }
sahilmgandhi 18:6a4db94011d3 400
sahilmgandhi 18:6a4db94011d3 401 /**
sahilmgandhi 18:6a4db94011d3 402 * @brief Enters Stop mode.
sahilmgandhi 18:6a4db94011d3 403 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
sahilmgandhi 18:6a4db94011d3 404 * @note When exiting Stop mode by issuing an interrupt or a wake-up event,
sahilmgandhi 18:6a4db94011d3 405 * the HSI RC oscillator is selected as system clock.
sahilmgandhi 18:6a4db94011d3 406 * @note When the voltage regulator operates in low power mode, an additional
sahilmgandhi 18:6a4db94011d3 407 * startup delay is incurred when waking up from Stop mode.
sahilmgandhi 18:6a4db94011d3 408 * By keeping the internal regulator ON during Stop mode, the consumption
sahilmgandhi 18:6a4db94011d3 409 * is higher although the startup time is reduced.
sahilmgandhi 18:6a4db94011d3 410 * @param Regulator: Specifies the regulator state in Stop mode.
sahilmgandhi 18:6a4db94011d3 411 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 412 * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
sahilmgandhi 18:6a4db94011d3 413 * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
sahilmgandhi 18:6a4db94011d3 414 * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
sahilmgandhi 18:6a4db94011d3 415 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 416 * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
sahilmgandhi 18:6a4db94011d3 417 * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
sahilmgandhi 18:6a4db94011d3 418 * @retval None
sahilmgandhi 18:6a4db94011d3 419 */
sahilmgandhi 18:6a4db94011d3 420 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
sahilmgandhi 18:6a4db94011d3 421 {
sahilmgandhi 18:6a4db94011d3 422 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 423 assert_param(IS_PWR_REGULATOR(Regulator));
sahilmgandhi 18:6a4db94011d3 424 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
sahilmgandhi 18:6a4db94011d3 425
sahilmgandhi 18:6a4db94011d3 426 /* Select the regulator state in Stop mode: Set PDDS and LPDS bits according to PWR_Regulator value */
sahilmgandhi 18:6a4db94011d3 427 MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS), Regulator);
sahilmgandhi 18:6a4db94011d3 428
sahilmgandhi 18:6a4db94011d3 429 /* Set SLEEPDEEP bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 430 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
sahilmgandhi 18:6a4db94011d3 431
sahilmgandhi 18:6a4db94011d3 432 /* Select Stop mode entry --------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 433 if(STOPEntry == PWR_STOPENTRY_WFI)
sahilmgandhi 18:6a4db94011d3 434 {
sahilmgandhi 18:6a4db94011d3 435 /* Request Wait For Interrupt */
sahilmgandhi 18:6a4db94011d3 436 __WFI();
sahilmgandhi 18:6a4db94011d3 437 }
sahilmgandhi 18:6a4db94011d3 438 else
sahilmgandhi 18:6a4db94011d3 439 {
sahilmgandhi 18:6a4db94011d3 440 /* Request Wait For Event */
sahilmgandhi 18:6a4db94011d3 441 __SEV();
sahilmgandhi 18:6a4db94011d3 442 __WFE();
sahilmgandhi 18:6a4db94011d3 443 __WFE();
sahilmgandhi 18:6a4db94011d3 444 }
sahilmgandhi 18:6a4db94011d3 445 /* Reset SLEEPDEEP bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 446 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
sahilmgandhi 18:6a4db94011d3 447 }
sahilmgandhi 18:6a4db94011d3 448
sahilmgandhi 18:6a4db94011d3 449 /**
sahilmgandhi 18:6a4db94011d3 450 * @brief Enters Standby mode.
sahilmgandhi 18:6a4db94011d3 451 * @note In Standby mode, all I/O pins are high impedance except for:
sahilmgandhi 18:6a4db94011d3 452 * - Reset pad (still available)
sahilmgandhi 18:6a4db94011d3 453 * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
sahilmgandhi 18:6a4db94011d3 454 * Alarm out, or RTC clock calibration out.
sahilmgandhi 18:6a4db94011d3 455 * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp.
sahilmgandhi 18:6a4db94011d3 456 * - WKUP pin 1 (PA0) if enabled.
sahilmgandhi 18:6a4db94011d3 457 * @retval None
sahilmgandhi 18:6a4db94011d3 458 */
sahilmgandhi 18:6a4db94011d3 459 void HAL_PWR_EnterSTANDBYMode(void)
sahilmgandhi 18:6a4db94011d3 460 {
sahilmgandhi 18:6a4db94011d3 461 /* Select Standby mode */
sahilmgandhi 18:6a4db94011d3 462 SET_BIT(PWR->CR, PWR_CR_PDDS);
sahilmgandhi 18:6a4db94011d3 463
sahilmgandhi 18:6a4db94011d3 464 /* Set SLEEPDEEP bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 465 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
sahilmgandhi 18:6a4db94011d3 466
sahilmgandhi 18:6a4db94011d3 467 /* This option is used to ensure that store operations are completed */
sahilmgandhi 18:6a4db94011d3 468 #if defined ( __CC_ARM)
sahilmgandhi 18:6a4db94011d3 469 __force_stores();
sahilmgandhi 18:6a4db94011d3 470 #endif
sahilmgandhi 18:6a4db94011d3 471 /* Request Wait For Interrupt */
sahilmgandhi 18:6a4db94011d3 472 __WFI();
sahilmgandhi 18:6a4db94011d3 473 }
sahilmgandhi 18:6a4db94011d3 474
sahilmgandhi 18:6a4db94011d3 475 /**
sahilmgandhi 18:6a4db94011d3 476 * @brief This function handles the PWR PVD interrupt request.
sahilmgandhi 18:6a4db94011d3 477 * @note This API should be called under the PVD_IRQHandler().
sahilmgandhi 18:6a4db94011d3 478 * @retval None
sahilmgandhi 18:6a4db94011d3 479 */
sahilmgandhi 18:6a4db94011d3 480 void HAL_PWR_PVD_IRQHandler(void)
sahilmgandhi 18:6a4db94011d3 481 {
sahilmgandhi 18:6a4db94011d3 482 /* Check PWR Exti flag */
sahilmgandhi 18:6a4db94011d3 483 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
sahilmgandhi 18:6a4db94011d3 484 {
sahilmgandhi 18:6a4db94011d3 485 /* PWR PVD interrupt user callback */
sahilmgandhi 18:6a4db94011d3 486 HAL_PWR_PVDCallback();
sahilmgandhi 18:6a4db94011d3 487
sahilmgandhi 18:6a4db94011d3 488 /* Clear PWR Exti pending bit */
sahilmgandhi 18:6a4db94011d3 489 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
sahilmgandhi 18:6a4db94011d3 490 }
sahilmgandhi 18:6a4db94011d3 491 }
sahilmgandhi 18:6a4db94011d3 492
sahilmgandhi 18:6a4db94011d3 493 /**
sahilmgandhi 18:6a4db94011d3 494 * @brief PWR PVD interrupt callback
sahilmgandhi 18:6a4db94011d3 495 * @retval None
sahilmgandhi 18:6a4db94011d3 496 */
sahilmgandhi 18:6a4db94011d3 497 __weak void HAL_PWR_PVDCallback(void)
sahilmgandhi 18:6a4db94011d3 498 {
sahilmgandhi 18:6a4db94011d3 499 /* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi 18:6a4db94011d3 500 the HAL_PWR_PVDCallback could be implemented in the user file
sahilmgandhi 18:6a4db94011d3 501 */
sahilmgandhi 18:6a4db94011d3 502 }
sahilmgandhi 18:6a4db94011d3 503
sahilmgandhi 18:6a4db94011d3 504 /**
sahilmgandhi 18:6a4db94011d3 505 * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
sahilmgandhi 18:6a4db94011d3 506 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
sahilmgandhi 18:6a4db94011d3 507 * re-enters SLEEP mode when an interruption handling is over.
sahilmgandhi 18:6a4db94011d3 508 * Setting this bit is useful when the processor is expected to run only on
sahilmgandhi 18:6a4db94011d3 509 * interruptions handling.
sahilmgandhi 18:6a4db94011d3 510 * @retval None
sahilmgandhi 18:6a4db94011d3 511 */
sahilmgandhi 18:6a4db94011d3 512 void HAL_PWR_EnableSleepOnExit(void)
sahilmgandhi 18:6a4db94011d3 513 {
sahilmgandhi 18:6a4db94011d3 514 /* Set SLEEPONEXIT bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 515 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
sahilmgandhi 18:6a4db94011d3 516 }
sahilmgandhi 18:6a4db94011d3 517
sahilmgandhi 18:6a4db94011d3 518 /**
sahilmgandhi 18:6a4db94011d3 519 * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
sahilmgandhi 18:6a4db94011d3 520 * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
sahilmgandhi 18:6a4db94011d3 521 * re-enters SLEEP mode when an interruption handling is over.
sahilmgandhi 18:6a4db94011d3 522 * @retval None
sahilmgandhi 18:6a4db94011d3 523 */
sahilmgandhi 18:6a4db94011d3 524 void HAL_PWR_DisableSleepOnExit(void)
sahilmgandhi 18:6a4db94011d3 525 {
sahilmgandhi 18:6a4db94011d3 526 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 527 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
sahilmgandhi 18:6a4db94011d3 528 }
sahilmgandhi 18:6a4db94011d3 529
sahilmgandhi 18:6a4db94011d3 530 /**
sahilmgandhi 18:6a4db94011d3 531 * @brief Enables CORTEX M3 SEVONPEND bit.
sahilmgandhi 18:6a4db94011d3 532 * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
sahilmgandhi 18:6a4db94011d3 533 * WFE to wake up when an interrupt moves from inactive to pended.
sahilmgandhi 18:6a4db94011d3 534 * @retval None
sahilmgandhi 18:6a4db94011d3 535 */
sahilmgandhi 18:6a4db94011d3 536 void HAL_PWR_EnableSEVOnPend(void)
sahilmgandhi 18:6a4db94011d3 537 {
sahilmgandhi 18:6a4db94011d3 538 /* Set SEVONPEND bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 539 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
sahilmgandhi 18:6a4db94011d3 540 }
sahilmgandhi 18:6a4db94011d3 541
sahilmgandhi 18:6a4db94011d3 542 /**
sahilmgandhi 18:6a4db94011d3 543 * @brief Disables CORTEX M3 SEVONPEND bit.
sahilmgandhi 18:6a4db94011d3 544 * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
sahilmgandhi 18:6a4db94011d3 545 * WFE to wake up when an interrupt moves from inactive to pended.
sahilmgandhi 18:6a4db94011d3 546 * @retval None
sahilmgandhi 18:6a4db94011d3 547 */
sahilmgandhi 18:6a4db94011d3 548 void HAL_PWR_DisableSEVOnPend(void)
sahilmgandhi 18:6a4db94011d3 549 {
sahilmgandhi 18:6a4db94011d3 550 /* Clear SEVONPEND bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 551 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
sahilmgandhi 18:6a4db94011d3 552 }
sahilmgandhi 18:6a4db94011d3 553
sahilmgandhi 18:6a4db94011d3 554 /**
sahilmgandhi 18:6a4db94011d3 555 * @}
sahilmgandhi 18:6a4db94011d3 556 */
sahilmgandhi 18:6a4db94011d3 557
sahilmgandhi 18:6a4db94011d3 558 /**
sahilmgandhi 18:6a4db94011d3 559 * @}
sahilmgandhi 18:6a4db94011d3 560 */
sahilmgandhi 18:6a4db94011d3 561
sahilmgandhi 18:6a4db94011d3 562 #endif /* HAL_PWR_MODULE_ENABLED */
sahilmgandhi 18:6a4db94011d3 563 /**
sahilmgandhi 18:6a4db94011d3 564 * @}
sahilmgandhi 18:6a4db94011d3 565 */
sahilmgandhi 18:6a4db94011d3 566
sahilmgandhi 18:6a4db94011d3 567 /**
sahilmgandhi 18:6a4db94011d3 568 * @}
sahilmgandhi 18:6a4db94011d3 569 */
sahilmgandhi 18:6a4db94011d3 570
sahilmgandhi 18:6a4db94011d3 571 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/