Mouse code for the MacroRat
mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/timer.h@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @file timer.h |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @brief (API) Public header of Timer driver |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @internal |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @author ON Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 7 | * $Rev: 3725 $ |
sahilmgandhi | 18:6a4db94011d3 | 8 | * $Date: 2015-09-14 14:36:27 +0530 (Mon, 14 Sep 2015) $ |
sahilmgandhi | 18:6a4db94011d3 | 9 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
sahilmgandhi | 18:6a4db94011d3 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
sahilmgandhi | 18:6a4db94011d3 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
sahilmgandhi | 18:6a4db94011d3 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
sahilmgandhi | 18:6a4db94011d3 | 15 | * if applicable the software license agreement. Do not use this software and/or |
sahilmgandhi | 18:6a4db94011d3 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
sahilmgandhi | 18:6a4db94011d3 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
sahilmgandhi | 18:6a4db94011d3 | 18 | * terms and conditions. |
sahilmgandhi | 18:6a4db94011d3 | 19 | * |
sahilmgandhi | 18:6a4db94011d3 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
sahilmgandhi | 18:6a4db94011d3 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
sahilmgandhi | 18:6a4db94011d3 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
sahilmgandhi | 18:6a4db94011d3 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
sahilmgandhi | 18:6a4db94011d3 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
sahilmgandhi | 18:6a4db94011d3 | 25 | * @endinternal |
sahilmgandhi | 18:6a4db94011d3 | 26 | * |
sahilmgandhi | 18:6a4db94011d3 | 27 | * @ingroup timer |
sahilmgandhi | 18:6a4db94011d3 | 28 | * |
sahilmgandhi | 18:6a4db94011d3 | 29 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 30 | * |
sahilmgandhi | 18:6a4db94011d3 | 31 | * <h1> General description </h1> |
sahilmgandhi | 18:6a4db94011d3 | 32 | * <p> |
sahilmgandhi | 18:6a4db94011d3 | 33 | * The APB Timer module is a 16-bit down counter with a selectable <b>prescaler</b>. |
sahilmgandhi | 18:6a4db94011d3 | 34 | * <b>Prescaler</b> values can be selected from 1 to 1024. |
sahilmgandhi | 18:6a4db94011d3 | 35 | * (<b>prescaler</b> extends the range of the timer at the expense of precision) |
sahilmgandhi | 18:6a4db94011d3 | 36 | * The Timer provides two modes of operation being <b>free running</b> and <b>periodic</b>. |
sahilmgandhi | 18:6a4db94011d3 | 37 | * In <b>free running</b> mode, when the counter reaches zero it is decremented to 0xFFFF |
sahilmgandhi | 18:6a4db94011d3 | 38 | * and no interrupt is generated. |
sahilmgandhi | 18:6a4db94011d3 | 39 | * In <b>periodic</b>, when the counter reaches zero it is decremented to load value |
sahilmgandhi | 18:6a4db94011d3 | 40 | * and an interruption is generated. |
sahilmgandhi | 18:6a4db94011d3 | 41 | * </p> |
sahilmgandhi | 18:6a4db94011d3 | 42 | * |
sahilmgandhi | 18:6a4db94011d3 | 43 | */ |
sahilmgandhi | 18:6a4db94011d3 | 44 | |
sahilmgandhi | 18:6a4db94011d3 | 45 | #ifndef TIMER_H_ |
sahilmgandhi | 18:6a4db94011d3 | 46 | #define TIMER_H_ |
sahilmgandhi | 18:6a4db94011d3 | 47 | |
sahilmgandhi | 18:6a4db94011d3 | 48 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 49 | extern "C" { |
sahilmgandhi | 18:6a4db94011d3 | 50 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 51 | |
sahilmgandhi | 18:6a4db94011d3 | 52 | //#include "driver.h" |
sahilmgandhi | 18:6a4db94011d3 | 53 | #include "us_ticker_api.h" |
sahilmgandhi | 18:6a4db94011d3 | 54 | #include "clock.h" |
sahilmgandhi | 18:6a4db94011d3 | 55 | #include "timer_map.h" |
sahilmgandhi | 18:6a4db94011d3 | 56 | #include "types.h" |
sahilmgandhi | 18:6a4db94011d3 | 57 | #include "cmsis_nvic.h" |
sahilmgandhi | 18:6a4db94011d3 | 58 | |
sahilmgandhi | 18:6a4db94011d3 | 59 | /* Miscellaneous I/O and control operations codes */ |
sahilmgandhi | 18:6a4db94011d3 | 60 | #define TIMER_IOCTL_GET_LOAD 1 /**< <b>Ioctl request code</b>: Getting load value. */ |
sahilmgandhi | 18:6a4db94011d3 | 61 | #define TIMER_IOCTL_SET_LOAD 2 /**< <b>Ioctl request code</b>: Seting load value. */ |
sahilmgandhi | 18:6a4db94011d3 | 62 | #define TIMER_IOCTL_GET_VALUE 3 /**< <b>Ioctl request code</b>: Getting current timer value. */ |
sahilmgandhi | 18:6a4db94011d3 | 63 | |
sahilmgandhi | 18:6a4db94011d3 | 64 | /* Timer control bits */ |
sahilmgandhi | 18:6a4db94011d3 | 65 | #define TIMER_ENABLE_BIT 0x1 |
sahilmgandhi | 18:6a4db94011d3 | 66 | #define TIMER_PRESCALE_BIT_POS 0x2 |
sahilmgandhi | 18:6a4db94011d3 | 67 | #define TIMER_MODE_BIT_POS 0x6 |
sahilmgandhi | 18:6a4db94011d3 | 68 | #define TIMER_ENABLE_BIT_POS 0x7 |
sahilmgandhi | 18:6a4db94011d3 | 69 | |
sahilmgandhi | 18:6a4db94011d3 | 70 | /* Options defines */ |
sahilmgandhi | 18:6a4db94011d3 | 71 | // TODO (MIV): put this in an enumerated value |
sahilmgandhi | 18:6a4db94011d3 | 72 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 73 | CLK_DIVIDER_1 = 0, |
sahilmgandhi | 18:6a4db94011d3 | 74 | CLK_DIVIDER_2 = 3, |
sahilmgandhi | 18:6a4db94011d3 | 75 | CLK_DIVIDER_8 = 4, |
sahilmgandhi | 18:6a4db94011d3 | 76 | CLK_DIVIDER_16 = 1, |
sahilmgandhi | 18:6a4db94011d3 | 77 | CLK_DIVIDER_32 = 5, |
sahilmgandhi | 18:6a4db94011d3 | 78 | CLK_DIVIDER_128 = 6, |
sahilmgandhi | 18:6a4db94011d3 | 79 | CLK_DIVIDER_256 = 2, |
sahilmgandhi | 18:6a4db94011d3 | 80 | CLK_DIVIDER_1024 = 7 |
sahilmgandhi | 18:6a4db94011d3 | 81 | } ClockDivider; |
sahilmgandhi | 18:6a4db94011d3 | 82 | |
sahilmgandhi | 18:6a4db94011d3 | 83 | #define TIME_MODE_FREE_RUNNING 0x0 |
sahilmgandhi | 18:6a4db94011d3 | 84 | #define TIME_MODE_PERIODIC 0x1 |
sahilmgandhi | 18:6a4db94011d3 | 85 | |
sahilmgandhi | 18:6a4db94011d3 | 86 | typedef void (*timer_irq_handlers_t)(void) ; |
sahilmgandhi | 18:6a4db94011d3 | 87 | |
sahilmgandhi | 18:6a4db94011d3 | 88 | /** Options to be passed when opening a timer device instance.*/ |
sahilmgandhi | 18:6a4db94011d3 | 89 | typedef struct timer_options { |
sahilmgandhi | 18:6a4db94011d3 | 90 | TimerReg_pt membase; /**< Memory base for the device's registers. */ |
sahilmgandhi | 18:6a4db94011d3 | 91 | uint8_t irq; /**< IRQ number of the IRQ associated to the device. */ |
sahilmgandhi | 18:6a4db94011d3 | 92 | boolean mode; /**< Timer mode: |
sahilmgandhi | 18:6a4db94011d3 | 93 | * - 0 = Free Run mode (no interrupt generation) |
sahilmgandhi | 18:6a4db94011d3 | 94 | * <b> # timer duration = (65535 + 1) * prescaler * peripheral clock (PCLK) period </b> |
sahilmgandhi | 18:6a4db94011d3 | 95 | * - 1 = Periodic mode (interrupt generation) |
sahilmgandhi | 18:6a4db94011d3 | 96 | * <b> # timer duration = (load + 1) * prescaler * peripheral clock (PCLK) period </b> */ |
sahilmgandhi | 18:6a4db94011d3 | 97 | uint8_t prescale; /**< Timer prescaler: from 1 to 1024. |
sahilmgandhi | 18:6a4db94011d3 | 98 | * - CLK_DIVIDER_1 = clock not divided |
sahilmgandhi | 18:6a4db94011d3 | 99 | * - CLK_DIVIDER_2 = clock is divided by 2 |
sahilmgandhi | 18:6a4db94011d3 | 100 | * - CLK_DIVIDER_8 = clock is divided by 8 |
sahilmgandhi | 18:6a4db94011d3 | 101 | * - CLK_DIVIDER_16 = clock is divided by 16 |
sahilmgandhi | 18:6a4db94011d3 | 102 | * - CLK_DIVIDER_32 = clock is divided by 32 |
sahilmgandhi | 18:6a4db94011d3 | 103 | * - CLK_DIVIDER_128 = clock is divided by 128 |
sahilmgandhi | 18:6a4db94011d3 | 104 | * - CLK_DIVIDER_256 = clock is divided by 256 |
sahilmgandhi | 18:6a4db94011d3 | 105 | * - CLK_DIVIDER_1024 = clock is divided by 1024 */ |
sahilmgandhi | 18:6a4db94011d3 | 106 | uint16_t load; /**< Timer load: from 0 to 65535. */ |
sahilmgandhi | 18:6a4db94011d3 | 107 | timer_irq_handlers_t handler; /**< Timer handler or call-back */ |
sahilmgandhi | 18:6a4db94011d3 | 108 | } timer_options_t, *timer_options_pt; |
sahilmgandhi | 18:6a4db94011d3 | 109 | |
sahilmgandhi | 18:6a4db94011d3 | 110 | /** Interrupt handler for timer devices; to be called from an actual ISR. |
sahilmgandhi | 18:6a4db94011d3 | 111 | * @param membase Memory base for the device's registers |
sahilmgandhi | 18:6a4db94011d3 | 112 | */ |
sahilmgandhi | 18:6a4db94011d3 | 113 | void fTimerHandler(TimerReg_pt membase); |
sahilmgandhi | 18:6a4db94011d3 | 114 | |
sahilmgandhi | 18:6a4db94011d3 | 115 | extern void us_timer_isr(void); |
sahilmgandhi | 18:6a4db94011d3 | 116 | extern void us_ticker_isr(void); |
sahilmgandhi | 18:6a4db94011d3 | 117 | |
sahilmgandhi | 18:6a4db94011d3 | 118 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 119 | } |
sahilmgandhi | 18:6a4db94011d3 | 120 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 121 | |
sahilmgandhi | 18:6a4db94011d3 | 122 | #endif /* TIMER_H_ */ |