Mouse code for the MacroRat
mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/i2c.h@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @file i2c.h |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @brief (API) Public header of i2c driver |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @internal |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @author ON Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 7 | * $Rev: $ |
sahilmgandhi | 18:6a4db94011d3 | 8 | * $Date: 2016-04-20 $ |
sahilmgandhi | 18:6a4db94011d3 | 9 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
sahilmgandhi | 18:6a4db94011d3 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
sahilmgandhi | 18:6a4db94011d3 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
sahilmgandhi | 18:6a4db94011d3 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
sahilmgandhi | 18:6a4db94011d3 | 15 | * if applicable the software license agreement. Do not use this software and/or |
sahilmgandhi | 18:6a4db94011d3 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
sahilmgandhi | 18:6a4db94011d3 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
sahilmgandhi | 18:6a4db94011d3 | 18 | * terms and conditions. |
sahilmgandhi | 18:6a4db94011d3 | 19 | * |
sahilmgandhi | 18:6a4db94011d3 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
sahilmgandhi | 18:6a4db94011d3 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
sahilmgandhi | 18:6a4db94011d3 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
sahilmgandhi | 18:6a4db94011d3 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
sahilmgandhi | 18:6a4db94011d3 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
sahilmgandhi | 18:6a4db94011d3 | 25 | * @endinternal |
sahilmgandhi | 18:6a4db94011d3 | 26 | * |
sahilmgandhi | 18:6a4db94011d3 | 27 | * @ingroup i2c |
sahilmgandhi | 18:6a4db94011d3 | 28 | */ |
sahilmgandhi | 18:6a4db94011d3 | 29 | |
sahilmgandhi | 18:6a4db94011d3 | 30 | #include "mbed_assert.h" |
sahilmgandhi | 18:6a4db94011d3 | 31 | #include "i2c_api.h" |
sahilmgandhi | 18:6a4db94011d3 | 32 | #include "clock.h" |
sahilmgandhi | 18:6a4db94011d3 | 33 | #include "i2c_ipc7208_map.h" |
sahilmgandhi | 18:6a4db94011d3 | 34 | #include "memory_map.h" |
sahilmgandhi | 18:6a4db94011d3 | 35 | #include "PeripheralPins.h" |
sahilmgandhi | 18:6a4db94011d3 | 36 | |
sahilmgandhi | 18:6a4db94011d3 | 37 | #ifndef I2C_H_ |
sahilmgandhi | 18:6a4db94011d3 | 38 | #define I2C_H_ |
sahilmgandhi | 18:6a4db94011d3 | 39 | |
sahilmgandhi | 18:6a4db94011d3 | 40 | /* Miscellaneous I/O and control operations codes */ |
sahilmgandhi | 18:6a4db94011d3 | 41 | #define I2C_IPC7208_IOCTL_NOT_ACK 0x03 |
sahilmgandhi | 18:6a4db94011d3 | 42 | #define I2C_IPC7208_IOCTL_NULL_CMD 0x04 |
sahilmgandhi | 18:6a4db94011d3 | 43 | #define I2C_IPC7208_IOCTL_ACK 0x05 |
sahilmgandhi | 18:6a4db94011d3 | 44 | |
sahilmgandhi | 18:6a4db94011d3 | 45 | /* Definitions for the clock speed. */ |
sahilmgandhi | 18:6a4db94011d3 | 46 | #define I2C_SPEED_100K_AT_8MHZ (uint8_t)0x12 |
sahilmgandhi | 18:6a4db94011d3 | 47 | #define I2C_SPEED_100K_AT_16MHZ (uint8_t)0x26 |
sahilmgandhi | 18:6a4db94011d3 | 48 | #define I2C_SPEED_400K_AT_8MHZ (uint8_t)0x03 |
sahilmgandhi | 18:6a4db94011d3 | 49 | #define I2C_SPEED_400K_AT_16MHZ (uint8_t)0x08 |
sahilmgandhi | 18:6a4db94011d3 | 50 | |
sahilmgandhi | 18:6a4db94011d3 | 51 | |
sahilmgandhi | 18:6a4db94011d3 | 52 | /* I2C commands */ |
sahilmgandhi | 18:6a4db94011d3 | 53 | #define I2C_CMD_NULL 0x00 |
sahilmgandhi | 18:6a4db94011d3 | 54 | #define I2C_CMD_WDAT0 0x10 |
sahilmgandhi | 18:6a4db94011d3 | 55 | #define I2C_CMD_WDAT1 0x11 |
sahilmgandhi | 18:6a4db94011d3 | 56 | #define I2C_CMD_WDAT8 0x12 |
sahilmgandhi | 18:6a4db94011d3 | 57 | #define I2C_CMD_RDAT8 0x13 |
sahilmgandhi | 18:6a4db94011d3 | 58 | #define I2C_CMD_STOP 0x14 |
sahilmgandhi | 18:6a4db94011d3 | 59 | #define I2C_CMD_START 0x15 |
sahilmgandhi | 18:6a4db94011d3 | 60 | #define I2C_CMD_VRFY_ACK 0x16 |
sahilmgandhi | 18:6a4db94011d3 | 61 | #define I2C_CMD_VRFY_VACK 0x17 |
sahilmgandhi | 18:6a4db94011d3 | 62 | |
sahilmgandhi | 18:6a4db94011d3 | 63 | /* Status register bits */ |
sahilmgandhi | 18:6a4db94011d3 | 64 | #define I2C_STATUS_CMD_FIFO_MPTY_BIT 0x01 |
sahilmgandhi | 18:6a4db94011d3 | 65 | #define I2C_STATUS_RD_DATA_RDY_BIT 0x02 |
sahilmgandhi | 18:6a4db94011d3 | 66 | #define I2C_STATUS_BUS_ERR_BIT 0x04 |
sahilmgandhi | 18:6a4db94011d3 | 67 | #define I2C_STATUS_RD_DATA_UFL_BIT 0x08 |
sahilmgandhi | 18:6a4db94011d3 | 68 | #define I2C_STATUS_CMD_FIFO_OFL_BIT 0x10 |
sahilmgandhi | 18:6a4db94011d3 | 69 | #define I2C_STATUS_CMD_FIFO_FULL_BIT 0x20 |
sahilmgandhi | 18:6a4db94011d3 | 70 | |
sahilmgandhi | 18:6a4db94011d3 | 71 | /* I2C return status */ |
sahilmgandhi | 18:6a4db94011d3 | 72 | #define I2C_STATUS_INVALID 0xFF |
sahilmgandhi | 18:6a4db94011d3 | 73 | #define I2C_STATUS_SUCCESS 0x00 |
sahilmgandhi | 18:6a4db94011d3 | 74 | #define I2C_STATUS_FAIL 0x01 |
sahilmgandhi | 18:6a4db94011d3 | 75 | #define I2C_STATUS_BUS_ERROR 0x02 |
sahilmgandhi | 18:6a4db94011d3 | 76 | #define I2C_STATUS_RD_DATA_UFL 0x03 |
sahilmgandhi | 18:6a4db94011d3 | 77 | #define I2C_STATUS_CMD_FIFO_OFL 0x04 |
sahilmgandhi | 18:6a4db94011d3 | 78 | #define I2C_STATUS_INTERRUPT_ERROR 0x05 |
sahilmgandhi | 18:6a4db94011d3 | 79 | #define I2C_STATUS_CMD_FIFO_EMPTY 0x06 |
sahilmgandhi | 18:6a4db94011d3 | 80 | |
sahilmgandhi | 18:6a4db94011d3 | 81 | /* I2C clock divider position */ |
sahilmgandhi | 18:6a4db94011d3 | 82 | #define I2C_CLOCKDIVEDER_VAL_MASK 0x1F |
sahilmgandhi | 18:6a4db94011d3 | 83 | #define I2C_APB_CLK_DIVIDER_VAL_MASK 0x1FE0 |
sahilmgandhi | 18:6a4db94011d3 | 84 | |
sahilmgandhi | 18:6a4db94011d3 | 85 | /* Error check */ |
sahilmgandhi | 18:6a4db94011d3 | 86 | #define I2C_UFL_CHECK (obj->membase->STATUS.WORD & 0x80) |
sahilmgandhi | 18:6a4db94011d3 | 87 | #define I2C_FIFO_FULL (obj->membase->STATUS.WORD & 0x20) |
sahilmgandhi | 18:6a4db94011d3 | 88 | #define FIFO_OFL_CHECK (obj->membase->STATUS.WORD & 0x10) |
sahilmgandhi | 18:6a4db94011d3 | 89 | #define I2C_BUS_ERR_CHECK (obj->membase->STATUS.WORD & 0x04) |
sahilmgandhi | 18:6a4db94011d3 | 90 | #define RD_DATA_READY (obj->membase->STATUS.WORD & 0x02) |
sahilmgandhi | 18:6a4db94011d3 | 91 | #define I2C_FIFO_EMPTY (obj->membase->STATUS.WORD & 0x01) |
sahilmgandhi | 18:6a4db94011d3 | 92 | |
sahilmgandhi | 18:6a4db94011d3 | 93 | #define I2C_API_STATUS_SUCCESS 0 |
sahilmgandhi | 18:6a4db94011d3 | 94 | #define PAD_REG_ADRS_BYTE_SIZE 4 |
sahilmgandhi | 18:6a4db94011d3 | 95 | |
sahilmgandhi | 18:6a4db94011d3 | 96 | #define SEND_COMMAND(cmd) while(!I2C_FIFO_EMPTY); wait_us(1); obj->membase->CMD_REG = cmd; |
sahilmgandhi | 18:6a4db94011d3 | 97 | |
sahilmgandhi | 18:6a4db94011d3 | 98 | /** Init I2C device. |
sahilmgandhi | 18:6a4db94011d3 | 99 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 100 | * Sets the necessary registers. The baud rate is set default to 100K |
sahilmgandhi | 18:6a4db94011d3 | 101 | * |
sahilmgandhi | 18:6a4db94011d3 | 102 | * @param obj A I2C device instance. |
sahilmgandhi | 18:6a4db94011d3 | 103 | * @param sda GPIO number for SDA line |
sahilmgandhi | 18:6a4db94011d3 | 104 | * @param scl GPIO number for SCL line |
sahilmgandhi | 18:6a4db94011d3 | 105 | * @return None |
sahilmgandhi | 18:6a4db94011d3 | 106 | */ |
sahilmgandhi | 18:6a4db94011d3 | 107 | extern void fI2cInit(i2c_t *obj,PinName sda,PinName scl); |
sahilmgandhi | 18:6a4db94011d3 | 108 | |
sahilmgandhi | 18:6a4db94011d3 | 109 | /** Set baud rate or frequency |
sahilmgandhi | 18:6a4db94011d3 | 110 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 111 | * Sets user baudrate |
sahilmgandhi | 18:6a4db94011d3 | 112 | * |
sahilmgandhi | 18:6a4db94011d3 | 113 | * @param obj A I2C device instance. |
sahilmgandhi | 18:6a4db94011d3 | 114 | * @param hz User desired baud rate/frequency |
sahilmgandhi | 18:6a4db94011d3 | 115 | * @return None |
sahilmgandhi | 18:6a4db94011d3 | 116 | */ |
sahilmgandhi | 18:6a4db94011d3 | 117 | extern void fI2cFrequency(i2c_t *obj, uint32_t hz); |
sahilmgandhi | 18:6a4db94011d3 | 118 | |
sahilmgandhi | 18:6a4db94011d3 | 119 | /** Sends start bit |
sahilmgandhi | 18:6a4db94011d3 | 120 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 121 | * Sends start bit on i2c pins |
sahilmgandhi | 18:6a4db94011d3 | 122 | * |
sahilmgandhi | 18:6a4db94011d3 | 123 | * @param obj A I2C device instance. |
sahilmgandhi | 18:6a4db94011d3 | 124 | * @return status |
sahilmgandhi | 18:6a4db94011d3 | 125 | */ |
sahilmgandhi | 18:6a4db94011d3 | 126 | extern int32_t fI2cStart(i2c_t *obj); |
sahilmgandhi | 18:6a4db94011d3 | 127 | |
sahilmgandhi | 18:6a4db94011d3 | 128 | /** Sends stop bit |
sahilmgandhi | 18:6a4db94011d3 | 129 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 130 | * Sends stop bit on i2c pins |
sahilmgandhi | 18:6a4db94011d3 | 131 | * |
sahilmgandhi | 18:6a4db94011d3 | 132 | * @param obj A I2C device instance. |
sahilmgandhi | 18:6a4db94011d3 | 133 | * @return status |
sahilmgandhi | 18:6a4db94011d3 | 134 | */ |
sahilmgandhi | 18:6a4db94011d3 | 135 | extern int32_t fI2cStop(i2c_t *obj); |
sahilmgandhi | 18:6a4db94011d3 | 136 | |
sahilmgandhi | 18:6a4db94011d3 | 137 | /** Reads data from a I2C device in blocking fashion. |
sahilmgandhi | 18:6a4db94011d3 | 138 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 139 | * The data is read from the receive queue into the buffer. The receive queue is |
sahilmgandhi | 18:6a4db94011d3 | 140 | * filled by the interrupt handler. If not enough data is available, |
sahilmgandhi | 18:6a4db94011d3 | 141 | * |
sahilmgandhi | 18:6a4db94011d3 | 142 | * @param d The device to read from. |
sahilmgandhi | 18:6a4db94011d3 | 143 | * @param buf The buffer to read into (only the contents of the buffer may be modified, not the buffer itself). |
sahilmgandhi | 18:6a4db94011d3 | 144 | * @param len The maximum number of bytes to read, typically the buffer length. |
sahilmgandhi | 18:6a4db94011d3 | 145 | * @return On Success: The actual number of bytes read. On Failure: Failure code. |
sahilmgandhi | 18:6a4db94011d3 | 146 | */ |
sahilmgandhi | 18:6a4db94011d3 | 147 | extern int32_t fI2cReadB(i2c_t *d, char *buf, int len); |
sahilmgandhi | 18:6a4db94011d3 | 148 | |
sahilmgandhi | 18:6a4db94011d3 | 149 | /** Write data to an I2C device. |
sahilmgandhi | 18:6a4db94011d3 | 150 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 151 | * The commands(I2C instructions) and data arrive at the I2C Engine via the Command FIFO. |
sahilmgandhi | 18:6a4db94011d3 | 152 | * The command to write the data & data to be written is sent to command FIFO by writing it into command register. |
sahilmgandhi | 18:6a4db94011d3 | 153 | * |
sahilmgandhi | 18:6a4db94011d3 | 154 | * @param d The device to write to. |
sahilmgandhi | 18:6a4db94011d3 | 155 | * @param buf The buffer to write from (the contents of the buffer may not be modified). |
sahilmgandhi | 18:6a4db94011d3 | 156 | * @param len The number of bytes to write. |
sahilmgandhi | 18:6a4db94011d3 | 157 | * @return On success: The actual number of bytes written. On Failure: Failure code |
sahilmgandhi | 18:6a4db94011d3 | 158 | */ |
sahilmgandhi | 18:6a4db94011d3 | 159 | extern int32_t fI2cWriteB(i2c_t *d, const char *buf, int len); |
sahilmgandhi | 18:6a4db94011d3 | 160 | |
sahilmgandhi | 18:6a4db94011d3 | 161 | #endif /* I2C_H_ */ |