MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/startup_NCS36510.s@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* File: startup_ncs36510.S
sahilmgandhi 18:6a4db94011d3 2 * Purpose: startup file for Cortex-M3 devices. Should use with
sahilmgandhi 18:6a4db94011d3 3 * GCC for ARM Embedded Processors
sahilmgandhi 18:6a4db94011d3 4 * Version: V2.00
sahilmgandhi 18:6a4db94011d3 5 * Date: 15 Jan 2016
sahilmgandhi 18:6a4db94011d3 6 *
sahilmgandhi 18:6a4db94011d3 7 */
sahilmgandhi 18:6a4db94011d3 8 /* Copyright (c) 2011 - 2014 ARM LIMITED
sahilmgandhi 18:6a4db94011d3 9
sahilmgandhi 18:6a4db94011d3 10 All rights reserved.
sahilmgandhi 18:6a4db94011d3 11 Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 12 modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 13 - Redistributions of source code must retain the above copyright
sahilmgandhi 18:6a4db94011d3 14 notice, this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 15 - Redistributions in binary form must reproduce the above copyright
sahilmgandhi 18:6a4db94011d3 16 notice, this list of conditions and the following disclaimer in the
sahilmgandhi 18:6a4db94011d3 17 documentation and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 18 - Neither the name of ARM nor the names of its contributors may be used
sahilmgandhi 18:6a4db94011d3 19 to endorse or promote products derived from this software without
sahilmgandhi 18:6a4db94011d3 20 specific prior written permission.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
sahilmgandhi 18:6a4db94011d3 25 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
sahilmgandhi 18:6a4db94011d3 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
sahilmgandhi 18:6a4db94011d3 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
sahilmgandhi 18:6a4db94011d3 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
sahilmgandhi 18:6a4db94011d3 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
sahilmgandhi 18:6a4db94011d3 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
sahilmgandhi 18:6a4db94011d3 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
sahilmgandhi 18:6a4db94011d3 32 POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 33 ---------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 .syntax unified
sahilmgandhi 18:6a4db94011d3 37 .arch armv7-m
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 .section .stack
sahilmgandhi 18:6a4db94011d3 40 .align 3
sahilmgandhi 18:6a4db94011d3 41 #ifdef __STACK_SIZE
sahilmgandhi 18:6a4db94011d3 42 .equ Stack_Size, __STACK_SIZE
sahilmgandhi 18:6a4db94011d3 43 #else
sahilmgandhi 18:6a4db94011d3 44 .equ Stack_Size, 0x400
sahilmgandhi 18:6a4db94011d3 45 #endif
sahilmgandhi 18:6a4db94011d3 46 .globl __StackTop
sahilmgandhi 18:6a4db94011d3 47 .globl __StackLimit
sahilmgandhi 18:6a4db94011d3 48 __StackLimit:
sahilmgandhi 18:6a4db94011d3 49 .space Stack_Size
sahilmgandhi 18:6a4db94011d3 50 .size __StackLimit, . - __StackLimit
sahilmgandhi 18:6a4db94011d3 51 __StackTop:
sahilmgandhi 18:6a4db94011d3 52 .size __StackTop, . - __StackTop
sahilmgandhi 18:6a4db94011d3 53
sahilmgandhi 18:6a4db94011d3 54 .section .heap
sahilmgandhi 18:6a4db94011d3 55 .align 3
sahilmgandhi 18:6a4db94011d3 56 #ifdef __HEAP_SIZE
sahilmgandhi 18:6a4db94011d3 57 .equ Heap_Size, __HEAP_SIZE
sahilmgandhi 18:6a4db94011d3 58 #else
sahilmgandhi 18:6a4db94011d3 59 .equ Heap_Size, 0x400
sahilmgandhi 18:6a4db94011d3 60 #endif
sahilmgandhi 18:6a4db94011d3 61 .globl __HeapBase
sahilmgandhi 18:6a4db94011d3 62 .globl __HeapLimit
sahilmgandhi 18:6a4db94011d3 63 __HeapBase:
sahilmgandhi 18:6a4db94011d3 64 .space Heap_Size
sahilmgandhi 18:6a4db94011d3 65 .size __HeapBase, . - __HeapBase
sahilmgandhi 18:6a4db94011d3 66 __HeapLimit:
sahilmgandhi 18:6a4db94011d3 67 .size __HeapLimit, . - __HeapLimit
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 .section .vector_table,"a",%progbits
sahilmgandhi 18:6a4db94011d3 70 .align 2
sahilmgandhi 18:6a4db94011d3 71 .globl __Vectors
sahilmgandhi 18:6a4db94011d3 72 __Vectors:
sahilmgandhi 18:6a4db94011d3 73 .long __StackTop /* Top of Stack */
sahilmgandhi 18:6a4db94011d3 74 .long Reset_Handler /* Reset Handler */
sahilmgandhi 18:6a4db94011d3 75 .long NMI_Handler /* NMI Handler */
sahilmgandhi 18:6a4db94011d3 76 .long HardFault_Handler /* Hard Fault Handler */
sahilmgandhi 18:6a4db94011d3 77 .long MemManage_Handler /* MPU Fault Handler */
sahilmgandhi 18:6a4db94011d3 78 .long BusFault_Handler /* Bus Fault Handler */
sahilmgandhi 18:6a4db94011d3 79 .long UsageFault_Handler /* Usage Fault Handler */
sahilmgandhi 18:6a4db94011d3 80 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 81 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 82 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 83 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 84 .long SVC_Handler /* SVCall Handler */
sahilmgandhi 18:6a4db94011d3 85 .long DebugMon_Handler /* Debug Monitor Handler */
sahilmgandhi 18:6a4db94011d3 86 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 87 .long PendSV_Handler /* PendSV Handler */
sahilmgandhi 18:6a4db94011d3 88 .long SysTick_Handler /* SysTick Handler */
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 /* External Interrupts */
sahilmgandhi 18:6a4db94011d3 91 .long fIrqTim0Handler
sahilmgandhi 18:6a4db94011d3 92 .long fIrqTim1Handler
sahilmgandhi 18:6a4db94011d3 93 .long fIrqTim2Handler
sahilmgandhi 18:6a4db94011d3 94 .long fIrqUart1Handler
sahilmgandhi 18:6a4db94011d3 95 .long fIrqSpiHandler
sahilmgandhi 18:6a4db94011d3 96 .long fIrqI2CHandler
sahilmgandhi 18:6a4db94011d3 97 .long fIrqGpioHandler
sahilmgandhi 18:6a4db94011d3 98 .long fIrqRtcHandler
sahilmgandhi 18:6a4db94011d3 99 .long fIrqFlashHandler
sahilmgandhi 18:6a4db94011d3 100 .long fIrqMacHwHandler
sahilmgandhi 18:6a4db94011d3 101 .long fIrqAesHandler
sahilmgandhi 18:6a4db94011d3 102 .long fIrqAdcHandler
sahilmgandhi 18:6a4db94011d3 103 .long fIrqClockCalHandler
sahilmgandhi 18:6a4db94011d3 104 .long fIrqUart2Handler
sahilmgandhi 18:6a4db94011d3 105 .long fIrqUviHandler
sahilmgandhi 18:6a4db94011d3 106 .long fIrqDmaHandler
sahilmgandhi 18:6a4db94011d3 107 .long fIrqDbgPwrUpHandler
sahilmgandhi 18:6a4db94011d3 108 .long fIrqSpi2Handler
sahilmgandhi 18:6a4db94011d3 109 .long fIrqI2C2Handler
sahilmgandhi 18:6a4db94011d3 110 .long fIrqFVDDHCompHandler
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 .size __Vectors, . - __Vectors
sahilmgandhi 18:6a4db94011d3 113
sahilmgandhi 18:6a4db94011d3 114 .section .text.Reset_Handler
sahilmgandhi 18:6a4db94011d3 115 .thumb
sahilmgandhi 18:6a4db94011d3 116 .thumb_func
sahilmgandhi 18:6a4db94011d3 117 .align 2
sahilmgandhi 18:6a4db94011d3 118 .globl Reset_Handler
sahilmgandhi 18:6a4db94011d3 119 .type Reset_Handler, %function
sahilmgandhi 18:6a4db94011d3 120 Reset_Handler:
sahilmgandhi 18:6a4db94011d3 121 /* Loop to copy data from read only memory to RAM. The ranges
sahilmgandhi 18:6a4db94011d3 122 * of copy from/to are specified by following symbols evaluated in
sahilmgandhi 18:6a4db94011d3 123 * linker script.
sahilmgandhi 18:6a4db94011d3 124 * __etext: End of code section, i.e., begin of data sections to copy from.
sahilmgandhi 18:6a4db94011d3 125 * __data_start__/__data_end__: RAM address range that data should be
sahilmgandhi 18:6a4db94011d3 126 * copied to. Both must be aligned to 4 bytes boundary. */
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 disable_watchdog:
sahilmgandhi 18:6a4db94011d3 129 /*MPL - Need to implement?! */
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 ldr r1, =__etext
sahilmgandhi 18:6a4db94011d3 132 ldr r2, =__data_start__
sahilmgandhi 18:6a4db94011d3 133 ldr r3, =__data_end__
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 subs r3, r2
sahilmgandhi 18:6a4db94011d3 136 ble .Lflash_to_ram_loop_end
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 movs r4, 0
sahilmgandhi 18:6a4db94011d3 139 .Lflash_to_ram_loop:
sahilmgandhi 18:6a4db94011d3 140 ldr r0, [r1,r4]
sahilmgandhi 18:6a4db94011d3 141 str r0, [r2,r4]
sahilmgandhi 18:6a4db94011d3 142 adds r4, 4
sahilmgandhi 18:6a4db94011d3 143 cmp r4, r3
sahilmgandhi 18:6a4db94011d3 144 blt .Lflash_to_ram_loop
sahilmgandhi 18:6a4db94011d3 145 .Lflash_to_ram_loop_end:
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 ldr r0, =SystemInit
sahilmgandhi 18:6a4db94011d3 148 blx r0
sahilmgandhi 18:6a4db94011d3 149 /* TODO - Uncomment when uvisor support is added */
sahilmgandhi 18:6a4db94011d3 150 /*
sahilmgandhi 18:6a4db94011d3 151 ldr r0, =uvisor_init
sahilmgandhi 18:6a4db94011d3 152 blx r0
sahilmgandhi 18:6a4db94011d3 153 */
sahilmgandhi 18:6a4db94011d3 154 ldr r0, =_start
sahilmgandhi 18:6a4db94011d3 155 bx r0
sahilmgandhi 18:6a4db94011d3 156 .pool
sahilmgandhi 18:6a4db94011d3 157 .size Reset_Handler, . - Reset_Handler
sahilmgandhi 18:6a4db94011d3 158
sahilmgandhi 18:6a4db94011d3 159 .text
sahilmgandhi 18:6a4db94011d3 160 /* Macro to define default handlers. Default handler
sahilmgandhi 18:6a4db94011d3 161 * will be weak symbol and just dead loops. They can be
sahilmgandhi 18:6a4db94011d3 162 * overwritten by other handlers */
sahilmgandhi 18:6a4db94011d3 163 .macro def_default_handler handler_name
sahilmgandhi 18:6a4db94011d3 164 .align 1
sahilmgandhi 18:6a4db94011d3 165 .thumb_func
sahilmgandhi 18:6a4db94011d3 166 .weak \handler_name
sahilmgandhi 18:6a4db94011d3 167 .type \handler_name, %function
sahilmgandhi 18:6a4db94011d3 168 \handler_name :
sahilmgandhi 18:6a4db94011d3 169 b .
sahilmgandhi 18:6a4db94011d3 170 .size \handler_name, . - \handler_name
sahilmgandhi 18:6a4db94011d3 171 .endm
sahilmgandhi 18:6a4db94011d3 172
sahilmgandhi 18:6a4db94011d3 173 /* Exception Handlers */
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 def_default_handler NMI_Handler
sahilmgandhi 18:6a4db94011d3 176 def_default_handler HardFault_Handler
sahilmgandhi 18:6a4db94011d3 177 def_default_handler MemManage_Handler
sahilmgandhi 18:6a4db94011d3 178 def_default_handler BusFault_Handler
sahilmgandhi 18:6a4db94011d3 179 def_default_handler UsageFault_Handler
sahilmgandhi 18:6a4db94011d3 180 def_default_handler SVC_Handler
sahilmgandhi 18:6a4db94011d3 181 def_default_handler DebugMon_Handler
sahilmgandhi 18:6a4db94011d3 182 def_default_handler PendSV_Handler
sahilmgandhi 18:6a4db94011d3 183 def_default_handler SysTick_Handler
sahilmgandhi 18:6a4db94011d3 184 def_default_handler Default_Handler
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 .macro def_irq_default_handler handler_name
sahilmgandhi 18:6a4db94011d3 187 .weak \handler_name
sahilmgandhi 18:6a4db94011d3 188 .set \handler_name, Default_Handler
sahilmgandhi 18:6a4db94011d3 189 .endm
sahilmgandhi 18:6a4db94011d3 190
sahilmgandhi 18:6a4db94011d3 191 /* IRQ Handlers */
sahilmgandhi 18:6a4db94011d3 192 def_irq_default_handler fIrqTim0Handler
sahilmgandhi 18:6a4db94011d3 193 def_irq_default_handler fIrqTim1Handler
sahilmgandhi 18:6a4db94011d3 194 def_irq_default_handler fIrqTim2Handler
sahilmgandhi 18:6a4db94011d3 195 def_irq_default_handler fIrqUart1Handler
sahilmgandhi 18:6a4db94011d3 196 def_irq_default_handler fIrqSpiHandler
sahilmgandhi 18:6a4db94011d3 197 def_irq_default_handler fIrqI2CHandler
sahilmgandhi 18:6a4db94011d3 198 def_irq_default_handler fIrqGpioHandler
sahilmgandhi 18:6a4db94011d3 199 def_irq_default_handler fIrqRtcHandler
sahilmgandhi 18:6a4db94011d3 200 def_irq_default_handler fIrqFlashHandler
sahilmgandhi 18:6a4db94011d3 201 def_irq_default_handler fIrqMacHwHandler
sahilmgandhi 18:6a4db94011d3 202 def_irq_default_handler fIrqAesHandler
sahilmgandhi 18:6a4db94011d3 203 def_irq_default_handler fIrqAdcHandler
sahilmgandhi 18:6a4db94011d3 204 def_irq_default_handler fIrqClockCalHandler
sahilmgandhi 18:6a4db94011d3 205 def_irq_default_handler fIrqUart2Handler
sahilmgandhi 18:6a4db94011d3 206 def_irq_default_handler fIrqUviHandler
sahilmgandhi 18:6a4db94011d3 207 def_irq_default_handler fIrqDmaHandler
sahilmgandhi 18:6a4db94011d3 208 def_irq_default_handler fIrqDbgPwrUpHandler
sahilmgandhi 18:6a4db94011d3 209 def_irq_default_handler fIrqSpi2Handler
sahilmgandhi 18:6a4db94011d3 210 def_irq_default_handler fIrqI2C2Handler
sahilmgandhi 18:6a4db94011d3 211 def_irq_default_handler fIrqFVDDHCompHandler
sahilmgandhi 18:6a4db94011d3 212 def_irq_default_handler DefaultISR
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 .end