MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/architecture.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file architecture.h
sahilmgandhi 18:6a4db94011d3 4 * @brief CM3 architecture specific inclusions and defines.
sahilmgandhi 18:6a4db94011d3 5 * @internal
sahilmgandhi 18:6a4db94011d3 6 * @author ON Semiconductor
sahilmgandhi 18:6a4db94011d3 7 * $Rev: $
sahilmgandhi 18:6a4db94011d3 8 * $Date: $
sahilmgandhi 18:6a4db94011d3 9 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
sahilmgandhi 18:6a4db94011d3 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
sahilmgandhi 18:6a4db94011d3 12 * under limited terms and conditions. The terms and conditions pertaining to the software
sahilmgandhi 18:6a4db94011d3 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
sahilmgandhi 18:6a4db94011d3 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
sahilmgandhi 18:6a4db94011d3 15 * if applicable the software license agreement. Do not use this software and/or
sahilmgandhi 18:6a4db94011d3 16 * documentation unless you have carefully read and you agree to the limited terms and
sahilmgandhi 18:6a4db94011d3 17 * conditions. By using this software and/or documentation, you agree to the limited
sahilmgandhi 18:6a4db94011d3 18 * terms and conditions.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
sahilmgandhi 18:6a4db94011d3 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
sahilmgandhi 18:6a4db94011d3 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
sahilmgandhi 18:6a4db94011d3 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
sahilmgandhi 18:6a4db94011d3 25 * @endinternal
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * @ingroup bsp
sahilmgandhi 18:6a4db94011d3 28 */
sahilmgandhi 18:6a4db94011d3 29
sahilmgandhi 18:6a4db94011d3 30 #ifndef ARCHITECTURE_H_
sahilmgandhi 18:6a4db94011d3 31 #define ARCHITECTURE_H_
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 /*************************************************************************************************
sahilmgandhi 18:6a4db94011d3 34 * *
sahilmgandhi 18:6a4db94011d3 35 * Header files *
sahilmgandhi 18:6a4db94011d3 36 * *
sahilmgandhi 18:6a4db94011d3 37 *************************************************************************************************/
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 //#include <ncs36510.h>
sahilmgandhi 18:6a4db94011d3 40 //#include <system_ncs36510.h>
sahilmgandhi 18:6a4db94011d3 41 //#include <core_cm3.h>
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 #include "NCS36510.h"
sahilmgandhi 18:6a4db94011d3 44 #include "system_NCS36510.h"
sahilmgandhi 18:6a4db94011d3 45 #include "core_cm3.h"
sahilmgandhi 18:6a4db94011d3 46 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /*************************************************************************************************
sahilmgandhi 18:6a4db94011d3 50 * *
sahilmgandhi 18:6a4db94011d3 51 * Symbolic Constants *
sahilmgandhi 18:6a4db94011d3 52 * *
sahilmgandhi 18:6a4db94011d3 53 *************************************************************************************************/
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 /* Interrupt Control and State Register (0xE000ED04)
sahilmgandhi 18:6a4db94011d3 56 * 31 NMIPENDSET R/W 0 NMI pended
sahilmgandhi 18:6a4db94011d3 57 * 28 PENDSVSET R/W 0 Write 1 to pend system call; Read value
sahilmgandhi 18:6a4db94011d3 58 * indicates pending status
sahilmgandhi 18:6a4db94011d3 59 * 27 PENDSVCLR W 0 Write 1 to clear PendSV pending status
sahilmgandhi 18:6a4db94011d3 60 * 26 PENDSTSET R/W 0 Write 1 to pend Systick exception; Read
sahilmgandhi 18:6a4db94011d3 61 * value indicates pending status
sahilmgandhi 18:6a4db94011d3 62 * 25 PENDSTCLR W 0 Write 1 to clear Systick pending status
sahilmgandhi 18:6a4db94011d3 63 * 23 ISRPREEMPT R 0 Indicate that a pending interrupt is going
sahilmgandhi 18:6a4db94011d3 64 * to be active in next step (for debug)
sahilmgandhi 18:6a4db94011d3 65 * 22 ISRPENDING R 0 External interrupt pending (excluding
sahilmgandhi 18:6a4db94011d3 66 * system exceptions such as NMI for
sahilmgandhi 18:6a4db94011d3 67 * fault)
sahilmgandhi 18:6a4db94011d3 68 * 21:12 VECTPENDING R 0 Pending ISR number
sahilmgandhi 18:6a4db94011d3 69 * 11 RETTOBASE R 0 Set to 1 when the processor is running
sahilmgandhi 18:6a4db94011d3 70 * an exception handler and will return to
sahilmgandhi 18:6a4db94011d3 71 * thread level if interrupt return and no
sahilmgandhi 18:6a4db94011d3 72 * other exceptions pending
sahilmgandhi 18:6a4db94011d3 73 * 9:0 VECTACTIVE R 0 Current running interrupt service routine
sahilmgandhi 18:6a4db94011d3 74 */
sahilmgandhi 18:6a4db94011d3 75 #define RUNNING_IN_ISR (((SCB->ICSR & 0x3FF) > 0 ) ? 1 : 0)
sahilmgandhi 18:6a4db94011d3 76
sahilmgandhi 18:6a4db94011d3 77 #endif /* ARCHITECTURE_H_ */