Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file adc_sar_map.h
sahilmgandhi 18:6a4db94011d3 4 * @brief ADC HW register map
sahilmgandhi 18:6a4db94011d3 5 * @internal
sahilmgandhi 18:6a4db94011d3 6 * @author ON Semiconductor
sahilmgandhi 18:6a4db94011d3 7 * $Rev: 3422 $
sahilmgandhi 18:6a4db94011d3 8 * $Date: 2015-06-09 11:01:43 +0530 (Tue, 09 Jun 2015) $
sahilmgandhi 18:6a4db94011d3 9 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
sahilmgandhi 18:6a4db94011d3 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
sahilmgandhi 18:6a4db94011d3 12 * under limited terms and conditions. The terms and conditions pertaining to the software
sahilmgandhi 18:6a4db94011d3 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
sahilmgandhi 18:6a4db94011d3 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
sahilmgandhi 18:6a4db94011d3 15 * if applicable the software license agreement. Do not use this software and/or
sahilmgandhi 18:6a4db94011d3 16 * documentation unless you have carefully read and you agree to the limited terms and
sahilmgandhi 18:6a4db94011d3 17 * conditions. By using this software and/or documentation, you agree to the limited
sahilmgandhi 18:6a4db94011d3 18 * terms and conditions.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
sahilmgandhi 18:6a4db94011d3 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
sahilmgandhi 18:6a4db94011d3 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
sahilmgandhi 18:6a4db94011d3 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
sahilmgandhi 18:6a4db94011d3 25 * @endinternal
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * @ingroup adc_sar
sahilmgandhi 18:6a4db94011d3 28 *
sahilmgandhi 18:6a4db94011d3 29 * @details
sahilmgandhi 18:6a4db94011d3 30 * <p>
sahilmgandhi 18:6a4db94011d3 31 * ADC HW register map description
sahilmgandhi 18:6a4db94011d3 32 * </p>
sahilmgandhi 18:6a4db94011d3 33 *
sahilmgandhi 18:6a4db94011d3 34 */
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 #ifndef ADC_MAP_H_
sahilmgandhi 18:6a4db94011d3 37 #define ADC_MAP_H_
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 #include "architecture.h"
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 /* ADC Control HW Structure Overlay */
sahilmgandhi 18:6a4db94011d3 43 typedef struct {
sahilmgandhi 18:6a4db94011d3 44 union {
sahilmgandhi 18:6a4db94011d3 45 struct {
sahilmgandhi 18:6a4db94011d3 46 __IO uint32_t MODE :1; /** 1= Continuous Conversion 0= Single Shot */
sahilmgandhi 18:6a4db94011d3 47 __IO uint32_t START_CONV :1; /** 1= Start Conversion 0= No effect*/
sahilmgandhi 18:6a4db94011d3 48 __IO uint32_t ABORT :1; /** 1= Aborts the Continuous Conversion mode 0=No effect */
sahilmgandhi 18:6a4db94011d3 49 __IO uint32_t MEASUREMENT_TYPE :1; /** 1= Absolute 0= Differential */
sahilmgandhi 18:6a4db94011d3 50 __IO uint32_t INPUT_SCALE :3; /** 000 – 1.0 001 – 0.6923 010 – 0.5294 011 – 0.4286 100 – 0.3600 101 – 0.3103 110 – 0.2728 111 – 0.2432 */
sahilmgandhi 18:6a4db94011d3 51 __I uint32_t BIT7:1; /** NA Always read backs 0*/
sahilmgandhi 18:6a4db94011d3 52 __IO uint32_t CONV_CH :3; /** Selects 1 or 8 channels to do a conversion on. 000 – A[0] 000 – A[1] 010 – A[2] 011 – A[3] 100 – N/A 101 – N/A 110 – Temperature sensor 111 – Battery */
sahilmgandhi 18:6a4db94011d3 53 __I uint32_t NA :1; /** NA */
sahilmgandhi 18:6a4db94011d3 54 __IO uint32_t REF_CH :3; /** Selects 1 to 8 channels for reference channel 000 – A[0] 000 – A[1] 010 – A[2] 011 – A[3] 100 – N/A 101 – N/A 110 – Temperature sensor 111 – Battery */
sahilmgandhi 18:6a4db94011d3 55 } BITS;
sahilmgandhi 18:6a4db94011d3 56 __IO uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 57 } CONTROL;
sahilmgandhi 18:6a4db94011d3 58 union {
sahilmgandhi 18:6a4db94011d3 59 struct {
sahilmgandhi 18:6a4db94011d3 60 __IO uint32_t SAMPLE_RATE :16; /** Sets the sample rate in units of PCLKperiod * (Prescale + 1). */
sahilmgandhi 18:6a4db94011d3 61 __IO uint32_t WARMUP_TIME :8; /** Sets the warm-up time in units of PCLKperiod * (Prescale + 1) */
sahilmgandhi 18:6a4db94011d3 62 __IO uint32_t SAMPLE_TIME :8; /** Sample Time. Sets the measure time in units of PCLKperiod * (Prescale + 1).*/
sahilmgandhi 18:6a4db94011d3 63 } BITS;
sahilmgandhi 18:6a4db94011d3 64 __IO uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 65 } DELAY;
sahilmgandhi 18:6a4db94011d3 66 __I uint32_t DATA;
sahilmgandhi 18:6a4db94011d3 67 __IO uint32_t IR;
sahilmgandhi 18:6a4db94011d3 68 union {
sahilmgandhi 18:6a4db94011d3 69 struct {
sahilmgandhi 18:6a4db94011d3 70 __IO uint32_t PRESC_VAL :8; /**Set the pre-scalar value. The SAR ADC nominally runs at 4MHz, so this value should be programmed to 32 Mhz/4mhz -1=7 */
sahilmgandhi 18:6a4db94011d3 71 __IO uint32_t PRESC_EN :1; /** 1= enables PreScalar 0= Disable Prescalar */
sahilmgandhi 18:6a4db94011d3 72 // __IO uint32_t PHASE_CTRL :1; /** 1 = Phase 2 is delayed two 32MHz clock from phase 1. 0= Phase 2 is delayed one 32MHz clock from phase 1. */
sahilmgandhi 18:6a4db94011d3 73 } BITS;
sahilmgandhi 18:6a4db94011d3 74 __IO uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 75 } PRESCALE;
sahilmgandhi 18:6a4db94011d3 76 __I uint32_t STATUS;
sahilmgandhi 18:6a4db94011d3 77 } ADCReg_t,*AdcReg_pt;
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 #endif /* ADC_MAP_H_ */