Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file adc_sar.h
sahilmgandhi 18:6a4db94011d3 4 * @internal
sahilmgandhi 18:6a4db94011d3 5 * @author ON Semiconductor
sahilmgandhi 18:6a4db94011d3 6 * $Rev: 3426 $
sahilmgandhi 18:6a4db94011d3 7 * $Date: 2015-06-15 16:46:35 +0530 (Mon, 15 Jun 2015) $
sahilmgandhi 18:6a4db94011d3 8 * @brief Definitions and API for the SAR ADC driver.
sahilmgandhi 18:6a4db94011d3 9 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
sahilmgandhi 18:6a4db94011d3 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
sahilmgandhi 18:6a4db94011d3 12 * under limited terms and conditions. The terms and conditions pertaining to the software
sahilmgandhi 18:6a4db94011d3 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
sahilmgandhi 18:6a4db94011d3 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
sahilmgandhi 18:6a4db94011d3 15 * if applicable the software license agreement. Do not use this software and/or
sahilmgandhi 18:6a4db94011d3 16 * documentation unless you have carefully read and you agree to the limited terms and
sahilmgandhi 18:6a4db94011d3 17 * conditions. By using this software and/or documentation, you agree to the limited
sahilmgandhi 18:6a4db94011d3 18 * terms and conditions.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
sahilmgandhi 18:6a4db94011d3 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
sahilmgandhi 18:6a4db94011d3 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
sahilmgandhi 18:6a4db94011d3 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
sahilmgandhi 18:6a4db94011d3 25 * @endinternal
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * @ingroup adc_sar
sahilmgandhi 18:6a4db94011d3 28 *
sahilmgandhi 18:6a4db94011d3 29 * @details
sahilmgandhi 18:6a4db94011d3 30 * <p>
sahilmgandhi 18:6a4db94011d3 31 * </p>
sahilmgandhi 18:6a4db94011d3 32 */
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #ifndef ADC_DRIVER_H_
sahilmgandhi 18:6a4db94011d3 35 #define ADC_DRIVER_H_
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 #include "adc_sar_map.h"
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 #if DEVICE_ANALOGIN
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 42 extern "C" {
sahilmgandhi 18:6a4db94011d3 43 #endif
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 /* ADC register bits */
sahilmgandhi 18:6a4db94011d3 46 #define ADC_CONTROL_MODE_BIT_POS 0
sahilmgandhi 18:6a4db94011d3 47 #define ADC_CONTROL_MEASTYPE_BIT_POS 3
sahilmgandhi 18:6a4db94011d3 48 #define ADC_CONTROL_INPUTSCALE_BIT_POS 4
sahilmgandhi 18:6a4db94011d3 49 #define ADC_CONTROL_MEAS_CH_BIT_POS 8
sahilmgandhi 18:6a4db94011d3 50 #define ADC_CONTROL_REF_CH_BIT_POS 12
sahilmgandhi 18:6a4db94011d3 51 #define ADC_PRESCALE_VAL_BIT_POS 0
sahilmgandhi 18:6a4db94011d3 52 #define ADC_PRESCALE_EN_BIT_POS 8
sahilmgandhi 18:6a4db94011d3 53 #define ADC_DELAY_SAMPLE_RATE_BIT_POS 0
sahilmgandhi 18:6a4db94011d3 54 #define ADC_DELAY_WARMUP_BIT_POS 16
sahilmgandhi 18:6a4db94011d3 55 #define ADC_DELAY_SAMPLE_TIME_BIT_POS 24
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 typedef enum {
sahilmgandhi 18:6a4db94011d3 58 ADC_CHANNEL0 = 0,
sahilmgandhi 18:6a4db94011d3 59 ADC_CHANNEL1,
sahilmgandhi 18:6a4db94011d3 60 ADC_CHANNEL2,
sahilmgandhi 18:6a4db94011d3 61 ADC_CHANNEL3,
sahilmgandhi 18:6a4db94011d3 62 ADC_TEMPSENSR = 6,
sahilmgandhi 18:6a4db94011d3 63 ADC_BATTERY
sahilmgandhi 18:6a4db94011d3 64 } Type_RefCh_ConvCh;
sahilmgandhi 18:6a4db94011d3 65
sahilmgandhi 18:6a4db94011d3 66 typedef enum {
sahilmgandhi 18:6a4db94011d3 67 ADC_RELATIVE_MEAS = 0,
sahilmgandhi 18:6a4db94011d3 68 ADC_ABSOLUTE_MEAS
sahilmgandhi 18:6a4db94011d3 69 } Type_Meastype;
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 typedef enum {
sahilmgandhi 18:6a4db94011d3 72 ADC_SINGLE_SAMPLE = 0,
sahilmgandhi 18:6a4db94011d3 73 ADC_CONTINUOUS_SAMPLE
sahilmgandhi 18:6a4db94011d3 74 } Type_Mode;
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 typedef enum {
sahilmgandhi 18:6a4db94011d3 77 ADC_INT_DISABLE = 0,
sahilmgandhi 18:6a4db94011d3 78 ADC_INT_ENABLE
sahilmgandhi 18:6a4db94011d3 79 } Type_Intrpt;
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 typedef enum {
sahilmgandhi 18:6a4db94011d3 82 ADC_IP_SCALE_1_0 = 0,
sahilmgandhi 18:6a4db94011d3 83 ADC_IP_SCALE_0_6923,
sahilmgandhi 18:6a4db94011d3 84 ADC_IP_SCALE_0_5294,
sahilmgandhi 18:6a4db94011d3 85 ADC_IP_SCALE_0_4286,
sahilmgandhi 18:6a4db94011d3 86 ADC_IP_SCALE_0_3600,
sahilmgandhi 18:6a4db94011d3 87 ADC_IP_SCALE_0_3103,
sahilmgandhi 18:6a4db94011d3 88 ADC_IP_SCALE_0_2728,
sahilmgandhi 18:6a4db94011d3 89 ADC_IP_SCALE_0_2432
sahilmgandhi 18:6a4db94011d3 90 } Ip_Scale_Type;
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 void fAdcHandler(void);
sahilmgandhi 18:6a4db94011d3 93
sahilmgandhi 18:6a4db94011d3 94 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 95 }
sahilmgandhi 18:6a4db94011d3 96 #endif
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 #endif /* DEVICE_ANALOGIN */
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 #endif /* ADC_DRIVER_H_ */