Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 17 #include "analogin_api.h"
sahilmgandhi 18:6a4db94011d3 18 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 19 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 20 #include "PeripheralNames.h"
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22 #if DEVICE_ANALOGIN
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 #define ANALOGIN_MEDIAN_FILTER 1
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 #define ADC_RANGE 0xFFF
sahilmgandhi 18:6a4db94011d3 27
sahilmgandhi 18:6a4db94011d3 28 static const PinMap PinMap_ADC[] = {
sahilmgandhi 18:6a4db94011d3 29 {P0_7 , ADC_0, 0},
sahilmgandhi 18:6a4db94011d3 30 {P0_6 , ADC_1, 0},
sahilmgandhi 18:6a4db94011d3 31 {P0_14, ADC_2, 0},
sahilmgandhi 18:6a4db94011d3 32 {P0_23, ADC_3, 0},
sahilmgandhi 18:6a4db94011d3 33 {P0_22, ADC_4, 0},
sahilmgandhi 18:6a4db94011d3 34 {P0_21, ADC_5, 0},
sahilmgandhi 18:6a4db94011d3 35 {P0_20, ADC_6, 0},
sahilmgandhi 18:6a4db94011d3 36 {P0_19, ADC_7, 0},
sahilmgandhi 18:6a4db94011d3 37 {P0_18, ADC_8, 0},
sahilmgandhi 18:6a4db94011d3 38 {P0_17, ADC_9, 0},
sahilmgandhi 18:6a4db94011d3 39 {P0_13, ADC_10,0},
sahilmgandhi 18:6a4db94011d3 40 {P0_4 , ADC_11,0},
sahilmgandhi 18:6a4db94011d3 41 };
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 void analogin_init(analogin_t *obj, PinName pin)
sahilmgandhi 18:6a4db94011d3 44 {
sahilmgandhi 18:6a4db94011d3 45 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
sahilmgandhi 18:6a4db94011d3 46 MBED_ASSERT(obj->adc != (ADCName)NC);
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 6);
sahilmgandhi 18:6a4db94011d3 49 // pin enable
sahilmgandhi 18:6a4db94011d3 50 LPC_SWM->PINENABLE0 &= ~(1UL << (13 + obj->adc));
sahilmgandhi 18:6a4db94011d3 51 // configure GPIO as input
sahilmgandhi 18:6a4db94011d3 52 LPC_GPIO_PORT->DIR0 &= ~(1UL << (pin >> PIN_SHIFT));
sahilmgandhi 18:6a4db94011d3 53
sahilmgandhi 18:6a4db94011d3 54 LPC_SYSCON->PDRUNCFG &= ~(1 << 4);
sahilmgandhi 18:6a4db94011d3 55 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 24);
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 __IO LPC_ADC_Type *adc_reg = LPC_ADC;
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 // determine the system clock divider for a 500kHz ADC clock during calibration
sahilmgandhi 18:6a4db94011d3 60 uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 // perform a self-calibration
sahilmgandhi 18:6a4db94011d3 63 adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF);
sahilmgandhi 18:6a4db94011d3 64 while ((adc_reg->CTRL & (1UL << 30)) != 0);
sahilmgandhi 18:6a4db94011d3 65 }
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 static inline uint32_t adc_read(analogin_t *obj)
sahilmgandhi 18:6a4db94011d3 68 {
sahilmgandhi 18:6a4db94011d3 69 uint32_t channels;
sahilmgandhi 18:6a4db94011d3 70 __IO LPC_ADC_Type *adc_reg = LPC_ADC;
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 channels = (obj->adc & 0x1F);
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74 // select channel
sahilmgandhi 18:6a4db94011d3 75 adc_reg->SEQA_CTRL &= ~(0xFFF);
sahilmgandhi 18:6a4db94011d3 76 adc_reg->SEQA_CTRL |= (1UL << channels);
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 // start conversion and sequence enable
sahilmgandhi 18:6a4db94011d3 79 adc_reg->SEQA_CTRL |= ((1UL << 26) | (1UL << 31));
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 // Repeatedly get the sample data until DONE bit
sahilmgandhi 18:6a4db94011d3 82 volatile uint32_t data;
sahilmgandhi 18:6a4db94011d3 83 do {
sahilmgandhi 18:6a4db94011d3 84 data = adc_reg->SEQA_GDAT;
sahilmgandhi 18:6a4db94011d3 85 } while ((data & (1UL << 31)) == 0);
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 // Stop conversion
sahilmgandhi 18:6a4db94011d3 88 adc_reg->SEQA_CTRL &= ~(1UL << 31);
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 return ((data >> 4) & ADC_RANGE);
sahilmgandhi 18:6a4db94011d3 91 }
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 static inline void order(uint32_t *a, uint32_t *b)
sahilmgandhi 18:6a4db94011d3 94 {
sahilmgandhi 18:6a4db94011d3 95 if (*a > *b) {
sahilmgandhi 18:6a4db94011d3 96 uint32_t t = *a;
sahilmgandhi 18:6a4db94011d3 97 *a = *b;
sahilmgandhi 18:6a4db94011d3 98 *b = t;
sahilmgandhi 18:6a4db94011d3 99 }
sahilmgandhi 18:6a4db94011d3 100 }
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 static inline uint32_t adc_read_u32(analogin_t *obj)
sahilmgandhi 18:6a4db94011d3 103 {
sahilmgandhi 18:6a4db94011d3 104 uint32_t value;
sahilmgandhi 18:6a4db94011d3 105 #if ANALOGIN_MEDIAN_FILTER
sahilmgandhi 18:6a4db94011d3 106 uint32_t v1 = adc_read(obj);
sahilmgandhi 18:6a4db94011d3 107 uint32_t v2 = adc_read(obj);
sahilmgandhi 18:6a4db94011d3 108 uint32_t v3 = adc_read(obj);
sahilmgandhi 18:6a4db94011d3 109 order(&v1, &v2);
sahilmgandhi 18:6a4db94011d3 110 order(&v2, &v3);
sahilmgandhi 18:6a4db94011d3 111 order(&v1, &v2);
sahilmgandhi 18:6a4db94011d3 112 value = v2;
sahilmgandhi 18:6a4db94011d3 113 #else
sahilmgandhi 18:6a4db94011d3 114 value = adc_read(obj);
sahilmgandhi 18:6a4db94011d3 115 #endif
sahilmgandhi 18:6a4db94011d3 116 return value;
sahilmgandhi 18:6a4db94011d3 117 }
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119 uint16_t analogin_read_u16(analogin_t *obj)
sahilmgandhi 18:6a4db94011d3 120 {
sahilmgandhi 18:6a4db94011d3 121 uint32_t value = adc_read_u32(obj);
sahilmgandhi 18:6a4db94011d3 122 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
sahilmgandhi 18:6a4db94011d3 123 }
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 float analogin_read(analogin_t *obj)
sahilmgandhi 18:6a4db94011d3 126 {
sahilmgandhi 18:6a4db94011d3 127 uint32_t value = adc_read_u32(obj);
sahilmgandhi 18:6a4db94011d3 128 return (float)value * (1.0f / (float)ADC_RANGE);
sahilmgandhi 18:6a4db94011d3 129 }
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 #endif