MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/serial_api.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 // math.h required for floating point operations for baud rate calculation
sahilmgandhi 18:6a4db94011d3 17 #include <math.h>
sahilmgandhi 18:6a4db94011d3 18 #include <string.h>
sahilmgandhi 18:6a4db94011d3 19 #include <stdlib.h>
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 22 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 23 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 24 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 27 * INITIALIZATION
sahilmgandhi 18:6a4db94011d3 28 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 29 static const PinMap PinMap_UART_TX[] = {
sahilmgandhi 18:6a4db94011d3 30 {P0_0, UART_3, 2},
sahilmgandhi 18:6a4db94011d3 31 {P0_2, UART_0, 1},
sahilmgandhi 18:6a4db94011d3 32 {P0_10, UART_2, 1},
sahilmgandhi 18:6a4db94011d3 33 {P0_15, UART_1, 1},
sahilmgandhi 18:6a4db94011d3 34 {P1_29, UART_4, 5},
sahilmgandhi 18:6a4db94011d3 35 {P0_25, UART_3, 3},
sahilmgandhi 18:6a4db94011d3 36 {P2_0 , UART_1, 2},
sahilmgandhi 18:6a4db94011d3 37 {P2_8 , UART_2, 2},
sahilmgandhi 18:6a4db94011d3 38 {P3_16, UART_1, 3},
sahilmgandhi 18:6a4db94011d3 39 {P4_22, UART_2, 2},
sahilmgandhi 18:6a4db94011d3 40 {P4_28, UART_3, 2},
sahilmgandhi 18:6a4db94011d3 41 {P5_4, UART_4, 4},
sahilmgandhi 18:6a4db94011d3 42 {NC , NC , 0}
sahilmgandhi 18:6a4db94011d3 43 };
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 static const PinMap PinMap_UART_RX[] = {
sahilmgandhi 18:6a4db94011d3 46 {P0_1 , UART_3, 2},
sahilmgandhi 18:6a4db94011d3 47 {P0_3 , UART_0, 1},
sahilmgandhi 18:6a4db94011d3 48 {P0_11, UART_2, 1},
sahilmgandhi 18:6a4db94011d3 49 {P0_16, UART_1, 1},
sahilmgandhi 18:6a4db94011d3 50 {P0_26, UART_3, 3},
sahilmgandhi 18:6a4db94011d3 51 {P2_1 , UART_1, 2},
sahilmgandhi 18:6a4db94011d3 52 {P2_9 , UART_2, 2},
sahilmgandhi 18:6a4db94011d3 53 {P3_17, UART_1, 3},
sahilmgandhi 18:6a4db94011d3 54 {P4_23, UART_2, 2},
sahilmgandhi 18:6a4db94011d3 55 {P4_29, UART_3, 2},
sahilmgandhi 18:6a4db94011d3 56 {P5_3, UART_4, 4},
sahilmgandhi 18:6a4db94011d3 57 {NC , NC , 0}
sahilmgandhi 18:6a4db94011d3 58 };
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 #define UART_NUM 5
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 static uint32_t serial_irq_ids[UART_NUM] = {0};
sahilmgandhi 18:6a4db94011d3 63 static uart_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 int stdio_uart_inited = 0;
sahilmgandhi 18:6a4db94011d3 66 serial_t stdio_uart;
sahilmgandhi 18:6a4db94011d3 67
sahilmgandhi 18:6a4db94011d3 68 void serial_init(serial_t *obj, PinName tx, PinName rx) {
sahilmgandhi 18:6a4db94011d3 69 int is_stdio_uart = 0;
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 // determine the UART to use
sahilmgandhi 18:6a4db94011d3 72 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 73 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 74 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
sahilmgandhi 18:6a4db94011d3 75 MBED_ASSERT((int)uart != NC);
sahilmgandhi 18:6a4db94011d3 76
sahilmgandhi 18:6a4db94011d3 77 obj->uart = (LPC_UART_TypeDef *)uart;
sahilmgandhi 18:6a4db94011d3 78 // enable power
sahilmgandhi 18:6a4db94011d3 79 switch (uart) {
sahilmgandhi 18:6a4db94011d3 80 case UART_0: LPC_SC->PCONP |= 1 << 3; break;
sahilmgandhi 18:6a4db94011d3 81 case UART_1: LPC_SC->PCONP |= 1 << 4; break;
sahilmgandhi 18:6a4db94011d3 82 case UART_2: LPC_SC->PCONP |= 1 << 24; break;
sahilmgandhi 18:6a4db94011d3 83 case UART_3: LPC_SC->PCONP |= 1 << 25; break;
sahilmgandhi 18:6a4db94011d3 84 case UART_4: LPC_SC->PCONP |= 1 << 8; break;
sahilmgandhi 18:6a4db94011d3 85 }
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 // enable fifos and default rx trigger level
sahilmgandhi 18:6a4db94011d3 88 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
sahilmgandhi 18:6a4db94011d3 89 | 0 << 1 // Rx Fifo Reset
sahilmgandhi 18:6a4db94011d3 90 | 0 << 2 // Tx Fifo Reset
sahilmgandhi 18:6a4db94011d3 91 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 // disable irqs
sahilmgandhi 18:6a4db94011d3 94 obj->uart->IER = 0 << 0 // Rx Data available irq enable
sahilmgandhi 18:6a4db94011d3 95 | 0 << 1 // Tx Fifo empty irq enable
sahilmgandhi 18:6a4db94011d3 96 | 0 << 2; // Rx Line Status irq enable
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 // set default baud rate and format
sahilmgandhi 18:6a4db94011d3 99 serial_baud (obj, 9600);
sahilmgandhi 18:6a4db94011d3 100 serial_format(obj, 8, ParityNone, 1);
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 // pinout the chosen uart
sahilmgandhi 18:6a4db94011d3 103 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 104 pinmap_pinout(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 // set rx/tx pins in PullUp mode
sahilmgandhi 18:6a4db94011d3 107 if (tx != NC) {
sahilmgandhi 18:6a4db94011d3 108 pin_mode(tx, PullUp);
sahilmgandhi 18:6a4db94011d3 109 }
sahilmgandhi 18:6a4db94011d3 110 if (rx != NC) {
sahilmgandhi 18:6a4db94011d3 111 pin_mode(rx, PullUp);
sahilmgandhi 18:6a4db94011d3 112 }
sahilmgandhi 18:6a4db94011d3 113
sahilmgandhi 18:6a4db94011d3 114 switch (uart) {
sahilmgandhi 18:6a4db94011d3 115 case UART_0: obj->index = 0; break;
sahilmgandhi 18:6a4db94011d3 116 case UART_1: obj->index = 1; break;
sahilmgandhi 18:6a4db94011d3 117 case UART_2: obj->index = 2; break;
sahilmgandhi 18:6a4db94011d3 118 case UART_3: obj->index = 3; break;
sahilmgandhi 18:6a4db94011d3 119 case UART_4: obj->index = 4; break;
sahilmgandhi 18:6a4db94011d3 120 }
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 if (is_stdio_uart) {
sahilmgandhi 18:6a4db94011d3 125 stdio_uart_inited = 1;
sahilmgandhi 18:6a4db94011d3 126 memcpy(&stdio_uart, obj, sizeof(serial_t));
sahilmgandhi 18:6a4db94011d3 127 }
sahilmgandhi 18:6a4db94011d3 128 }
sahilmgandhi 18:6a4db94011d3 129
sahilmgandhi 18:6a4db94011d3 130 void serial_free(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 131 serial_irq_ids[obj->index] = 0;
sahilmgandhi 18:6a4db94011d3 132 }
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 // serial_baud
sahilmgandhi 18:6a4db94011d3 135 // set the baud rate, taking in to account the current SystemFrequency
sahilmgandhi 18:6a4db94011d3 136 void serial_baud(serial_t *obj, int baudrate) {
sahilmgandhi 18:6a4db94011d3 137 uint32_t PCLK = PeripheralClock;
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 // First we check to see if the basic divide with no DivAddVal/MulVal
sahilmgandhi 18:6a4db94011d3 140 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
sahilmgandhi 18:6a4db94011d3 141 // MulVal = 1. Otherwise, we search the valid ratio value range to find
sahilmgandhi 18:6a4db94011d3 142 // the closest match. This could be more elegant, using search methods
sahilmgandhi 18:6a4db94011d3 143 // and/or lookup tables, but the brute force method is not that much
sahilmgandhi 18:6a4db94011d3 144 // slower, and is more maintainable.
sahilmgandhi 18:6a4db94011d3 145 uint16_t DL = PCLK / (16 * baudrate);
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 uint8_t DivAddVal = 0;
sahilmgandhi 18:6a4db94011d3 148 uint8_t MulVal = 1;
sahilmgandhi 18:6a4db94011d3 149 int hit = 0;
sahilmgandhi 18:6a4db94011d3 150 uint16_t dlv;
sahilmgandhi 18:6a4db94011d3 151 uint8_t mv, dav;
sahilmgandhi 18:6a4db94011d3 152 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
sahilmgandhi 18:6a4db94011d3 153 int err_best = baudrate, b;
sahilmgandhi 18:6a4db94011d3 154 for (mv = 1; mv < 16 && !hit; mv++)
sahilmgandhi 18:6a4db94011d3 155 {
sahilmgandhi 18:6a4db94011d3 156 for (dav = 0; dav < mv; dav++)
sahilmgandhi 18:6a4db94011d3 157 {
sahilmgandhi 18:6a4db94011d3 158 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
sahilmgandhi 18:6a4db94011d3 159 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
sahilmgandhi 18:6a4db94011d3 160 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
sahilmgandhi 18:6a4db94011d3 161 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
sahilmgandhi 18:6a4db94011d3 162 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
sahilmgandhi 18:6a4db94011d3 165 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 166 else // 2 bits headroom, use more precision
sahilmgandhi 18:6a4db94011d3 167 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
sahilmgandhi 18:6a4db94011d3 170 if (dlv == 0)
sahilmgandhi 18:6a4db94011d3 171 dlv = 1;
sahilmgandhi 18:6a4db94011d3 172
sahilmgandhi 18:6a4db94011d3 173 // datasheet says if dav > 0 then DL must be >= 2
sahilmgandhi 18:6a4db94011d3 174 if ((dav > 0) && (dlv < 2))
sahilmgandhi 18:6a4db94011d3 175 dlv = 2;
sahilmgandhi 18:6a4db94011d3 176
sahilmgandhi 18:6a4db94011d3 177 // integer rearrangement of the baudrate equation (with rounding)
sahilmgandhi 18:6a4db94011d3 178 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 // check to see how we went
sahilmgandhi 18:6a4db94011d3 181 b = abs(b - baudrate);
sahilmgandhi 18:6a4db94011d3 182 if (b < err_best)
sahilmgandhi 18:6a4db94011d3 183 {
sahilmgandhi 18:6a4db94011d3 184 err_best = b;
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 DL = dlv;
sahilmgandhi 18:6a4db94011d3 187 MulVal = mv;
sahilmgandhi 18:6a4db94011d3 188 DivAddVal = dav;
sahilmgandhi 18:6a4db94011d3 189
sahilmgandhi 18:6a4db94011d3 190 if (b == baudrate)
sahilmgandhi 18:6a4db94011d3 191 {
sahilmgandhi 18:6a4db94011d3 192 hit = 1;
sahilmgandhi 18:6a4db94011d3 193 break;
sahilmgandhi 18:6a4db94011d3 194 }
sahilmgandhi 18:6a4db94011d3 195 }
sahilmgandhi 18:6a4db94011d3 196 }
sahilmgandhi 18:6a4db94011d3 197 }
sahilmgandhi 18:6a4db94011d3 198 }
sahilmgandhi 18:6a4db94011d3 199
sahilmgandhi 18:6a4db94011d3 200 // set LCR[DLAB] to enable writing to divider registers
sahilmgandhi 18:6a4db94011d3 201 obj->uart->LCR |= (1 << 7);
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 // set divider values
sahilmgandhi 18:6a4db94011d3 204 obj->uart->DLM = (DL >> 8) & 0xFF;
sahilmgandhi 18:6a4db94011d3 205 obj->uart->DLL = (DL >> 0) & 0xFF;
sahilmgandhi 18:6a4db94011d3 206 obj->uart->FDR = (uint32_t) DivAddVal << 0
sahilmgandhi 18:6a4db94011d3 207 | (uint32_t) MulVal << 4;
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 // clear LCR[DLAB]
sahilmgandhi 18:6a4db94011d3 210 obj->uart->LCR &= ~(1 << 7);
sahilmgandhi 18:6a4db94011d3 211 }
sahilmgandhi 18:6a4db94011d3 212
sahilmgandhi 18:6a4db94011d3 213 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
sahilmgandhi 18:6a4db94011d3 214 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
sahilmgandhi 18:6a4db94011d3 215 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
sahilmgandhi 18:6a4db94011d3 216 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
sahilmgandhi 18:6a4db94011d3 217 (parity == ParityForced1) || (parity == ParityForced0));
sahilmgandhi 18:6a4db94011d3 218
sahilmgandhi 18:6a4db94011d3 219 stop_bits -= 1;
sahilmgandhi 18:6a4db94011d3 220 data_bits -= 5;
sahilmgandhi 18:6a4db94011d3 221
sahilmgandhi 18:6a4db94011d3 222 int parity_enable, parity_select;
sahilmgandhi 18:6a4db94011d3 223 switch (parity) {
sahilmgandhi 18:6a4db94011d3 224 case ParityNone: parity_enable = 0; parity_select = 0; break;
sahilmgandhi 18:6a4db94011d3 225 case ParityOdd : parity_enable = 1; parity_select = 0; break;
sahilmgandhi 18:6a4db94011d3 226 case ParityEven: parity_enable = 1; parity_select = 1; break;
sahilmgandhi 18:6a4db94011d3 227 case ParityForced1: parity_enable = 1; parity_select = 2; break;
sahilmgandhi 18:6a4db94011d3 228 case ParityForced0: parity_enable = 1; parity_select = 3; break;
sahilmgandhi 18:6a4db94011d3 229 default:
sahilmgandhi 18:6a4db94011d3 230 break;
sahilmgandhi 18:6a4db94011d3 231 }
sahilmgandhi 18:6a4db94011d3 232
sahilmgandhi 18:6a4db94011d3 233 obj->uart->LCR = data_bits << 0
sahilmgandhi 18:6a4db94011d3 234 | stop_bits << 2
sahilmgandhi 18:6a4db94011d3 235 | parity_enable << 3
sahilmgandhi 18:6a4db94011d3 236 | parity_select << 4;
sahilmgandhi 18:6a4db94011d3 237 }
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 240 * INTERRUPTS HANDLING
sahilmgandhi 18:6a4db94011d3 241 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 242 static inline void uart_irq(uint32_t iir, uint32_t index) {
sahilmgandhi 18:6a4db94011d3 243 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
sahilmgandhi 18:6a4db94011d3 244 SerialIrq irq_type;
sahilmgandhi 18:6a4db94011d3 245 switch (iir) {
sahilmgandhi 18:6a4db94011d3 246 case 1: irq_type = TxIrq; break;
sahilmgandhi 18:6a4db94011d3 247 case 2: irq_type = RxIrq; break;
sahilmgandhi 18:6a4db94011d3 248 default: return;
sahilmgandhi 18:6a4db94011d3 249 }
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 if (serial_irq_ids[index] != 0)
sahilmgandhi 18:6a4db94011d3 252 irq_handler(serial_irq_ids[index], irq_type);
sahilmgandhi 18:6a4db94011d3 253 }
sahilmgandhi 18:6a4db94011d3 254
sahilmgandhi 18:6a4db94011d3 255 void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0);}
sahilmgandhi 18:6a4db94011d3 256 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);}
sahilmgandhi 18:6a4db94011d3 257 void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2);}
sahilmgandhi 18:6a4db94011d3 258 void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3);}
sahilmgandhi 18:6a4db94011d3 259 void uart4_irq() {uart_irq((LPC_UART4->IIR >> 1) & 0x7, 4);}
sahilmgandhi 18:6a4db94011d3 260
sahilmgandhi 18:6a4db94011d3 261 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
sahilmgandhi 18:6a4db94011d3 262 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 263 serial_irq_ids[obj->index] = id;
sahilmgandhi 18:6a4db94011d3 264 }
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 267 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 268 uint32_t vector = 0;
sahilmgandhi 18:6a4db94011d3 269 switch ((int)obj->uart) {
sahilmgandhi 18:6a4db94011d3 270 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
sahilmgandhi 18:6a4db94011d3 271 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
sahilmgandhi 18:6a4db94011d3 272 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
sahilmgandhi 18:6a4db94011d3 273 case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break;
sahilmgandhi 18:6a4db94011d3 274 case UART_4: irq_n=UART4_IRQn; vector = (uint32_t)&uart4_irq; break;
sahilmgandhi 18:6a4db94011d3 275 }
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 if (enable) {
sahilmgandhi 18:6a4db94011d3 278 obj->uart->IER |= 1 << irq;
sahilmgandhi 18:6a4db94011d3 279 NVIC_SetVector(irq_n, vector);
sahilmgandhi 18:6a4db94011d3 280 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 281 } else { // disable
sahilmgandhi 18:6a4db94011d3 282 int all_disabled = 0;
sahilmgandhi 18:6a4db94011d3 283 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
sahilmgandhi 18:6a4db94011d3 284 obj->uart->IER &= ~(1 << irq);
sahilmgandhi 18:6a4db94011d3 285 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
sahilmgandhi 18:6a4db94011d3 286 if (all_disabled)
sahilmgandhi 18:6a4db94011d3 287 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 288 }
sahilmgandhi 18:6a4db94011d3 289 }
sahilmgandhi 18:6a4db94011d3 290
sahilmgandhi 18:6a4db94011d3 291 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 292 * READ/WRITE
sahilmgandhi 18:6a4db94011d3 293 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 294 int serial_getc(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 295 while (!serial_readable(obj));
sahilmgandhi 18:6a4db94011d3 296 return obj->uart->RBR;
sahilmgandhi 18:6a4db94011d3 297 }
sahilmgandhi 18:6a4db94011d3 298
sahilmgandhi 18:6a4db94011d3 299 void serial_putc(serial_t *obj, int c) {
sahilmgandhi 18:6a4db94011d3 300 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 301 obj->uart->THR = c;
sahilmgandhi 18:6a4db94011d3 302 }
sahilmgandhi 18:6a4db94011d3 303
sahilmgandhi 18:6a4db94011d3 304 int serial_readable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 305 return obj->uart->LSR & 0x01;
sahilmgandhi 18:6a4db94011d3 306 }
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 int serial_writable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 309 return obj->uart->LSR & 0x20;
sahilmgandhi 18:6a4db94011d3 310 }
sahilmgandhi 18:6a4db94011d3 311
sahilmgandhi 18:6a4db94011d3 312 void serial_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 313 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
sahilmgandhi 18:6a4db94011d3 314 | 1 << 1 // rx FIFO reset
sahilmgandhi 18:6a4db94011d3 315 | 1 << 2 // tx FIFO reset
sahilmgandhi 18:6a4db94011d3 316 | 0 << 6; // interrupt depth
sahilmgandhi 18:6a4db94011d3 317 }
sahilmgandhi 18:6a4db94011d3 318
sahilmgandhi 18:6a4db94011d3 319 void serial_pinout_tx(PinName tx) {
sahilmgandhi 18:6a4db94011d3 320 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 321 }
sahilmgandhi 18:6a4db94011d3 322
sahilmgandhi 18:6a4db94011d3 323 void serial_break_set(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 324 obj->uart->LCR |= (1 << 6);
sahilmgandhi 18:6a4db94011d3 325 }
sahilmgandhi 18:6a4db94011d3 326
sahilmgandhi 18:6a4db94011d3 327 void serial_break_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 328 obj->uart->LCR &= ~(1 << 6);
sahilmgandhi 18:6a4db94011d3 329 }
sahilmgandhi 18:6a4db94011d3 330