Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed - LPC1768 linker script
sahilmgandhi 18:6a4db94011d3 2 * Based linker script generated by Code Red Technologies Red Suite 4.1
sahilmgandhi 18:6a4db94011d3 3 */
sahilmgandhi 18:6a4db94011d3 4 GROUP(libgcc.a libc.a libstdc++.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o)
sahilmgandhi 18:6a4db94011d3 5
sahilmgandhi 18:6a4db94011d3 6 MEMORY
sahilmgandhi 18:6a4db94011d3 7 {
sahilmgandhi 18:6a4db94011d3 8 /* Define each memory region */
sahilmgandhi 18:6a4db94011d3 9 MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512k */
sahilmgandhi 18:6a4db94011d3 10 RamLoc32 (rwx) : ORIGIN = 0x100000C8, LENGTH = 0x7F38 /* 32k */
sahilmgandhi 18:6a4db94011d3 11 RamAHB_USB (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x4000 /* 16k */
sahilmgandhi 18:6a4db94011d3 12 RamAHB_Eth (rwx) : ORIGIN = 0x20080000, LENGTH = 0x4000 /* 16k */
sahilmgandhi 18:6a4db94011d3 13
sahilmgandhi 18:6a4db94011d3 14 }
sahilmgandhi 18:6a4db94011d3 15 /* Define a symbol for the top of each memory region */
sahilmgandhi 18:6a4db94011d3 16 __top_MFlash512 = 0x0 + 0x80000;
sahilmgandhi 18:6a4db94011d3 17 __top_RamLoc32 = 0x10000000 + 0x8000;
sahilmgandhi 18:6a4db94011d3 18 __top_RamAHB32 = 0x2007c000 + 0x8000;
sahilmgandhi 18:6a4db94011d3 19
sahilmgandhi 18:6a4db94011d3 20 ENTRY(ResetISR)
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22 SECTIONS
sahilmgandhi 18:6a4db94011d3 23 {
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 /* MAIN TEXT SECTION */
sahilmgandhi 18:6a4db94011d3 26 .text : ALIGN(4)
sahilmgandhi 18:6a4db94011d3 27 {
sahilmgandhi 18:6a4db94011d3 28 FILL(0xff)
sahilmgandhi 18:6a4db94011d3 29 KEEP(*(.isr_vector))
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 /* Global Section Table */
sahilmgandhi 18:6a4db94011d3 32 . = ALIGN(4) ;
sahilmgandhi 18:6a4db94011d3 33 __section_table_start = .;
sahilmgandhi 18:6a4db94011d3 34 __data_section_table = .;
sahilmgandhi 18:6a4db94011d3 35 LONG(LOADADDR(.data));
sahilmgandhi 18:6a4db94011d3 36 LONG( ADDR(.data)) ;
sahilmgandhi 18:6a4db94011d3 37 LONG( SIZEOF(.data));
sahilmgandhi 18:6a4db94011d3 38 LONG(LOADADDR(.data_RAM2));
sahilmgandhi 18:6a4db94011d3 39 LONG( ADDR(.data_RAM2)) ;
sahilmgandhi 18:6a4db94011d3 40 LONG( SIZEOF(.data_RAM2));
sahilmgandhi 18:6a4db94011d3 41 __data_section_table_end = .;
sahilmgandhi 18:6a4db94011d3 42 __bss_section_table = .;
sahilmgandhi 18:6a4db94011d3 43 LONG( ADDR(.bss));
sahilmgandhi 18:6a4db94011d3 44 LONG( SIZEOF(.bss));
sahilmgandhi 18:6a4db94011d3 45 LONG( ADDR(.bss_RAM2));
sahilmgandhi 18:6a4db94011d3 46 LONG( SIZEOF(.bss_RAM2));
sahilmgandhi 18:6a4db94011d3 47 __bss_section_table_end = .;
sahilmgandhi 18:6a4db94011d3 48 __section_table_end = . ;
sahilmgandhi 18:6a4db94011d3 49 /* End of Global Section Table */
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 *(.after_vectors*)
sahilmgandhi 18:6a4db94011d3 53
sahilmgandhi 18:6a4db94011d3 54 *(.text*)
sahilmgandhi 18:6a4db94011d3 55 *(.rodata .rodata.*)
sahilmgandhi 18:6a4db94011d3 56 . = ALIGN(4);
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 /* C++ constructors etc */
sahilmgandhi 18:6a4db94011d3 59 . = ALIGN(4);
sahilmgandhi 18:6a4db94011d3 60 KEEP(*(.init))
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 . = ALIGN(4);
sahilmgandhi 18:6a4db94011d3 63 __preinit_array_start = .;
sahilmgandhi 18:6a4db94011d3 64 KEEP (*(.preinit_array))
sahilmgandhi 18:6a4db94011d3 65 __preinit_array_end = .;
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 . = ALIGN(4);
sahilmgandhi 18:6a4db94011d3 68 __init_array_start = .;
sahilmgandhi 18:6a4db94011d3 69 KEEP (*(SORT(.init_array.*)))
sahilmgandhi 18:6a4db94011d3 70 KEEP (*(.init_array))
sahilmgandhi 18:6a4db94011d3 71 __init_array_end = .;
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 KEEP(*(.fini));
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 . = ALIGN(0x4);
sahilmgandhi 18:6a4db94011d3 76 KEEP (*crtbegin.o(.ctors))
sahilmgandhi 18:6a4db94011d3 77 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
sahilmgandhi 18:6a4db94011d3 78 KEEP (*(SORT(.ctors.*)))
sahilmgandhi 18:6a4db94011d3 79 KEEP (*crtend.o(.ctors))
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 . = ALIGN(0x4);
sahilmgandhi 18:6a4db94011d3 82 KEEP (*crtbegin.o(.dtors))
sahilmgandhi 18:6a4db94011d3 83 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
sahilmgandhi 18:6a4db94011d3 84 KEEP (*(SORT(.dtors.*)))
sahilmgandhi 18:6a4db94011d3 85 KEEP (*crtend.o(.dtors))
sahilmgandhi 18:6a4db94011d3 86 /* End C++ */
sahilmgandhi 18:6a4db94011d3 87 } > MFlash512
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 /*
sahilmgandhi 18:6a4db94011d3 90 * for exception handling/unwind - some Newlib functions (in common
sahilmgandhi 18:6a4db94011d3 91 * with C++ and STDC++) use this.
sahilmgandhi 18:6a4db94011d3 92 */
sahilmgandhi 18:6a4db94011d3 93 .ARM.extab : ALIGN(4)
sahilmgandhi 18:6a4db94011d3 94 {
sahilmgandhi 18:6a4db94011d3 95 *(.ARM.extab* .gnu.linkonce.armextab.*)
sahilmgandhi 18:6a4db94011d3 96 } > MFlash512
sahilmgandhi 18:6a4db94011d3 97 __exidx_start = .;
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 .ARM.exidx : ALIGN(4)
sahilmgandhi 18:6a4db94011d3 100 {
sahilmgandhi 18:6a4db94011d3 101 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
sahilmgandhi 18:6a4db94011d3 102 } > MFlash512
sahilmgandhi 18:6a4db94011d3 103 __exidx_end = .;
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105 _etext = .;
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108 .data_RAM2 : ALIGN(4)
sahilmgandhi 18:6a4db94011d3 109 {
sahilmgandhi 18:6a4db94011d3 110 FILL(0xff)
sahilmgandhi 18:6a4db94011d3 111 *(.data.$RAM2*)
sahilmgandhi 18:6a4db94011d3 112 *(.data.$RamAHB32*)
sahilmgandhi 18:6a4db94011d3 113 . = ALIGN(4) ;
sahilmgandhi 18:6a4db94011d3 114 } > RamAHB_USB AT>MFlash512
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 /* MAIN DATA SECTION */
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 .uninit_RESERVED(NOLOAD) : ALIGN(4)
sahilmgandhi 18:6a4db94011d3 119 {
sahilmgandhi 18:6a4db94011d3 120 KEEP(*(.bss.$RESERVED*))
sahilmgandhi 18:6a4db94011d3 121 } > RamLoc32
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 .data : ALIGN(4)
sahilmgandhi 18:6a4db94011d3 124 {
sahilmgandhi 18:6a4db94011d3 125 FILL(0xff)
sahilmgandhi 18:6a4db94011d3 126 _data = .;
sahilmgandhi 18:6a4db94011d3 127 *(vtable)
sahilmgandhi 18:6a4db94011d3 128 *(.data*)
sahilmgandhi 18:6a4db94011d3 129 . = ALIGN(4) ;
sahilmgandhi 18:6a4db94011d3 130 _edata = .;
sahilmgandhi 18:6a4db94011d3 131 } > RamLoc32 AT>MFlash512
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 .bss_RAM2(NOLOAD) : ALIGN(4)
sahilmgandhi 18:6a4db94011d3 135 {
sahilmgandhi 18:6a4db94011d3 136 *(.bss.$RAM2*)
sahilmgandhi 18:6a4db94011d3 137 *(.bss.$RamAHB32*)
sahilmgandhi 18:6a4db94011d3 138 *(AHBSRAM0)
sahilmgandhi 18:6a4db94011d3 139 . = ALIGN(4) ;
sahilmgandhi 18:6a4db94011d3 140 } > RamAHB_USB
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 .bss_RAM3(NOLOAD) : ALIGN(4)
sahilmgandhi 18:6a4db94011d3 143 {
sahilmgandhi 18:6a4db94011d3 144 *(AHBSRAM1)
sahilmgandhi 18:6a4db94011d3 145 . = ALIGN(4) ;
sahilmgandhi 18:6a4db94011d3 146 } > RamAHB_Eth
sahilmgandhi 18:6a4db94011d3 147 /* MAIN BSS SECTION */
sahilmgandhi 18:6a4db94011d3 148 .bss(NOLOAD) : ALIGN(4)
sahilmgandhi 18:6a4db94011d3 149 {
sahilmgandhi 18:6a4db94011d3 150 _bss = .;
sahilmgandhi 18:6a4db94011d3 151 *(.bss*)
sahilmgandhi 18:6a4db94011d3 152 *(COMMON)
sahilmgandhi 18:6a4db94011d3 153 . = ALIGN(4) ;
sahilmgandhi 18:6a4db94011d3 154 _ebss = .;
sahilmgandhi 18:6a4db94011d3 155 PROVIDE(end = .);
sahilmgandhi 18:6a4db94011d3 156 __end__ = .;
sahilmgandhi 18:6a4db94011d3 157 } > RamLoc32
sahilmgandhi 18:6a4db94011d3 158
sahilmgandhi 18:6a4db94011d3 159 PROVIDE(_pvHeapStart = .);
sahilmgandhi 18:6a4db94011d3 160 PROVIDE(_vStackTop = __top_RamLoc32 - 0);
sahilmgandhi 18:6a4db94011d3 161 }