Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 17 #include "i2c_api.h"
sahilmgandhi 18:6a4db94011d3 18 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 19 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 static uint8_t repeated_start = 0;
sahilmgandhi 18:6a4db94011d3 22
sahilmgandhi 18:6a4db94011d3 23 #define I2C_STAT(x) ((LPC_I2C0->STAT >> 1) & (0x07))
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 static inline int i2c_status(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 26 return I2C_STAT(obj);
sahilmgandhi 18:6a4db94011d3 27 }
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 // Wait until the Serial Interrupt (SI) is set
sahilmgandhi 18:6a4db94011d3 30 static int i2c_wait_SI(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 31 volatile int timeout = 0;
sahilmgandhi 18:6a4db94011d3 32 while (!(LPC_I2C0->STAT & (1 << 0))) {
sahilmgandhi 18:6a4db94011d3 33 timeout++;
sahilmgandhi 18:6a4db94011d3 34 if (timeout > 100000) return -1;
sahilmgandhi 18:6a4db94011d3 35 }
sahilmgandhi 18:6a4db94011d3 36 return 0;
sahilmgandhi 18:6a4db94011d3 37 }
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 static inline void i2c_interface_enable(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 40 LPC_I2C0->CFG |= (1 << 0);
sahilmgandhi 18:6a4db94011d3 41 }
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
sahilmgandhi 18:6a4db94011d3 44 MBED_ASSERT((sda == P0_23) && (scl == P0_22));
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 // Enables clock for I2C0
sahilmgandhi 18:6a4db94011d3 47 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << 13);
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 LPC_SYSCON->PRESETCTRL1 |= (1 << 13);
sahilmgandhi 18:6a4db94011d3 50 LPC_SYSCON->PRESETCTRL1 &= ~(1 << 13);
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 // pin enable
sahilmgandhi 18:6a4db94011d3 53 LPC_SWM->PINENABLE1 &= ~(0x3 << 3);
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 // set default frequency at 100kHz
sahilmgandhi 18:6a4db94011d3 56 i2c_frequency(obj, 100000);
sahilmgandhi 18:6a4db94011d3 57 i2c_interface_enable(obj);
sahilmgandhi 18:6a4db94011d3 58 }
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 inline int i2c_start(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 61 int status = 0;
sahilmgandhi 18:6a4db94011d3 62 if (repeated_start) {
sahilmgandhi 18:6a4db94011d3 63 LPC_I2C0->MSTCTL = (1 << 1) | (1 << 0);
sahilmgandhi 18:6a4db94011d3 64 repeated_start = 0;
sahilmgandhi 18:6a4db94011d3 65 } else {
sahilmgandhi 18:6a4db94011d3 66 LPC_I2C0->MSTCTL = (1 << 1);
sahilmgandhi 18:6a4db94011d3 67 }
sahilmgandhi 18:6a4db94011d3 68 return status;
sahilmgandhi 18:6a4db94011d3 69 }
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 inline int i2c_stop(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 72 volatile int timeout = 0;
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74 LPC_I2C0->MSTCTL = (1 << 2) | (1 << 0);
sahilmgandhi 18:6a4db94011d3 75 while ((LPC_I2C0->STAT & ((1 << 0) | (7 << 1))) != ((1 << 0) | (0 << 1))) {
sahilmgandhi 18:6a4db94011d3 76 timeout ++;
sahilmgandhi 18:6a4db94011d3 77 if (timeout > 100000) return 1;
sahilmgandhi 18:6a4db94011d3 78 }
sahilmgandhi 18:6a4db94011d3 79
sahilmgandhi 18:6a4db94011d3 80 return 0;
sahilmgandhi 18:6a4db94011d3 81 }
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
sahilmgandhi 18:6a4db94011d3 85 // write the data
sahilmgandhi 18:6a4db94011d3 86 LPC_I2C0->MSTDAT = value;
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 if (!addr)
sahilmgandhi 18:6a4db94011d3 89 LPC_I2C0->MSTCTL = (1 << 0);
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 // wait and return status
sahilmgandhi 18:6a4db94011d3 92 i2c_wait_SI(obj);
sahilmgandhi 18:6a4db94011d3 93 return i2c_status(obj);
sahilmgandhi 18:6a4db94011d3 94 }
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 static inline int i2c_do_read(i2c_t *obj, int last) {
sahilmgandhi 18:6a4db94011d3 97 // wait for it to arrive
sahilmgandhi 18:6a4db94011d3 98 i2c_wait_SI(obj);
sahilmgandhi 18:6a4db94011d3 99 if (!last)
sahilmgandhi 18:6a4db94011d3 100 LPC_I2C0->MSTCTL = (1 << 0);
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 // return the data
sahilmgandhi 18:6a4db94011d3 103 return (LPC_I2C0->MSTDAT & 0xFF);
sahilmgandhi 18:6a4db94011d3 104 }
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 void i2c_frequency(i2c_t *obj, int hz) {
sahilmgandhi 18:6a4db94011d3 107 // No peripheral clock divider on the M0
sahilmgandhi 18:6a4db94011d3 108 uint32_t PCLK = SystemCoreClock;
sahilmgandhi 18:6a4db94011d3 109 uint32_t clkdiv = PCLK / (hz * 4) - 1;
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 LPC_I2C0->DIV = clkdiv;
sahilmgandhi 18:6a4db94011d3 112 LPC_I2C0->MSTTIME = 0;
sahilmgandhi 18:6a4db94011d3 113 }
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
sahilmgandhi 18:6a4db94011d3 116 int count, status;
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 i2c_start(obj);
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 LPC_I2C0->MSTDAT = (address | 0x01);
sahilmgandhi 18:6a4db94011d3 121 LPC_I2C0->MSTCTL |= 0x20;
sahilmgandhi 18:6a4db94011d3 122 if (i2c_wait_SI(obj) == -1)
sahilmgandhi 18:6a4db94011d3 123 return -1;
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 status = ((LPC_I2C0->STAT >> 1) & (0x07));
sahilmgandhi 18:6a4db94011d3 126 if (status != 0x01) {
sahilmgandhi 18:6a4db94011d3 127 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 128 return I2C_ERROR_NO_SLAVE;
sahilmgandhi 18:6a4db94011d3 129 }
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 // Read in all except last byte
sahilmgandhi 18:6a4db94011d3 132 for (count = 0; count < (length - 1); count++) {
sahilmgandhi 18:6a4db94011d3 133 if (i2c_wait_SI(obj) == -1)
sahilmgandhi 18:6a4db94011d3 134 return -1;
sahilmgandhi 18:6a4db94011d3 135 LPC_I2C0->MSTCTL = (1 << 0);
sahilmgandhi 18:6a4db94011d3 136 data[count] = (LPC_I2C0->MSTDAT & 0xFF);
sahilmgandhi 18:6a4db94011d3 137 status = ((LPC_I2C0->STAT >> 1) & (0x07));
sahilmgandhi 18:6a4db94011d3 138 if (status != 0x01) {
sahilmgandhi 18:6a4db94011d3 139 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 140 return count;
sahilmgandhi 18:6a4db94011d3 141 }
sahilmgandhi 18:6a4db94011d3 142 }
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 // read in last byte
sahilmgandhi 18:6a4db94011d3 145 if (i2c_wait_SI(obj) == -1)
sahilmgandhi 18:6a4db94011d3 146 return -1;
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 data[count] = (LPC_I2C0->MSTDAT & 0xFF);
sahilmgandhi 18:6a4db94011d3 149 status = i2c_status(obj);
sahilmgandhi 18:6a4db94011d3 150 if (status != 0x01) {
sahilmgandhi 18:6a4db94011d3 151 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 152 return length - 1;
sahilmgandhi 18:6a4db94011d3 153 }
sahilmgandhi 18:6a4db94011d3 154 // If not repeated start, send stop.
sahilmgandhi 18:6a4db94011d3 155 if (stop) {
sahilmgandhi 18:6a4db94011d3 156 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 157 } else {
sahilmgandhi 18:6a4db94011d3 158 repeated_start = 1;
sahilmgandhi 18:6a4db94011d3 159 }
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 return length;
sahilmgandhi 18:6a4db94011d3 162 }
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
sahilmgandhi 18:6a4db94011d3 165 int i, status;
sahilmgandhi 18:6a4db94011d3 166
sahilmgandhi 18:6a4db94011d3 167 i2c_start(obj);
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 LPC_I2C0->MSTDAT = (address & 0xFE);
sahilmgandhi 18:6a4db94011d3 170 LPC_I2C0->MSTCTL |= 0x20;
sahilmgandhi 18:6a4db94011d3 171 if (i2c_wait_SI(obj) == -1)
sahilmgandhi 18:6a4db94011d3 172 return -1;
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 status = ((LPC_I2C0->STAT >> 1) & (0x07));
sahilmgandhi 18:6a4db94011d3 175 if (status != 0x02) {
sahilmgandhi 18:6a4db94011d3 176 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 177 return I2C_ERROR_NO_SLAVE;
sahilmgandhi 18:6a4db94011d3 178 }
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 for (i=0; i<length; i++) {
sahilmgandhi 18:6a4db94011d3 181 LPC_I2C0->MSTDAT = data[i];
sahilmgandhi 18:6a4db94011d3 182 LPC_I2C0->MSTCTL = (1 << 0);
sahilmgandhi 18:6a4db94011d3 183 if (i2c_wait_SI(obj) == -1)
sahilmgandhi 18:6a4db94011d3 184 return -1;
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 status = ((LPC_I2C0->STAT >> 1) & (0x07));
sahilmgandhi 18:6a4db94011d3 187 if (status != 0x02) {
sahilmgandhi 18:6a4db94011d3 188 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 189 return i;
sahilmgandhi 18:6a4db94011d3 190 }
sahilmgandhi 18:6a4db94011d3 191 }
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193 // If not repeated start, send stop.
sahilmgandhi 18:6a4db94011d3 194 if (stop) {
sahilmgandhi 18:6a4db94011d3 195 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 196 } else {
sahilmgandhi 18:6a4db94011d3 197 repeated_start = 1;
sahilmgandhi 18:6a4db94011d3 198 }
sahilmgandhi 18:6a4db94011d3 199
sahilmgandhi 18:6a4db94011d3 200 return length;
sahilmgandhi 18:6a4db94011d3 201 }
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 void i2c_reset(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 204 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 205 }
sahilmgandhi 18:6a4db94011d3 206
sahilmgandhi 18:6a4db94011d3 207 int i2c_byte_read(i2c_t *obj, int last) {
sahilmgandhi 18:6a4db94011d3 208 return (i2c_do_read(obj, last) & 0xFF);
sahilmgandhi 18:6a4db94011d3 209 }
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 int i2c_byte_write(i2c_t *obj, int data) {
sahilmgandhi 18:6a4db94011d3 212 if (i2c_do_write(obj, (data & 0xFF), 0) == 2) {
sahilmgandhi 18:6a4db94011d3 213 return 1;
sahilmgandhi 18:6a4db94011d3 214 } else {
sahilmgandhi 18:6a4db94011d3 215 return 0;
sahilmgandhi 18:6a4db94011d3 216 }
sahilmgandhi 18:6a4db94011d3 217 }