MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/serial_api.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 // math.h required for floating point operations for baud rate calculation
sahilmgandhi 18:6a4db94011d3 17 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 18 #include <math.h>
sahilmgandhi 18:6a4db94011d3 19 #include <string.h>
sahilmgandhi 18:6a4db94011d3 20 #include <stdlib.h>
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 23 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 24 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 27 * INITIALIZATION
sahilmgandhi 18:6a4db94011d3 28 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 29 #define UART_NUM 1
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 static const PinMap PinMap_UART_TX[] = {
sahilmgandhi 18:6a4db94011d3 32 {P2_8 , UART_0, 0x02},
sahilmgandhi 18:6a4db94011d3 33 {P3_5 , UART_0, 0x02},
sahilmgandhi 18:6a4db94011d3 34 {P3_0 , UART_0, 0x03},
sahilmgandhi 18:6a4db94011d3 35 {P1_7 , UART_0, 0x01},
sahilmgandhi 18:6a4db94011d3 36 {NC , NC , 0x00}
sahilmgandhi 18:6a4db94011d3 37 };
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 static const PinMap PinMap_UART_RX[] = {
sahilmgandhi 18:6a4db94011d3 40 {P2_7 , UART_0, 0x02},
sahilmgandhi 18:6a4db94011d3 41 {P3_4 , UART_0, 0x02},
sahilmgandhi 18:6a4db94011d3 42 {P3_1 , UART_0, 0x03},
sahilmgandhi 18:6a4db94011d3 43 {P1_6 , UART_0, 0x01},
sahilmgandhi 18:6a4db94011d3 44 {NC , NC , 0x00}
sahilmgandhi 18:6a4db94011d3 45 };
sahilmgandhi 18:6a4db94011d3 46
sahilmgandhi 18:6a4db94011d3 47 static uint32_t serial_irq_ids[UART_NUM] = {0};
sahilmgandhi 18:6a4db94011d3 48 static uart_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 int stdio_uart_inited = 0;
sahilmgandhi 18:6a4db94011d3 51 serial_t stdio_uart;
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 void serial_init(serial_t *obj, PinName tx, PinName rx) {
sahilmgandhi 18:6a4db94011d3 54 int is_stdio_uart = 0;
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 // determine the UART to use
sahilmgandhi 18:6a4db94011d3 57 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 58 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 59 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
sahilmgandhi 18:6a4db94011d3 60 MBED_ASSERT((int)uart != NC);
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 obj->uart = (LPC_UART_TypeDef *)uart;
sahilmgandhi 18:6a4db94011d3 63 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 // enable fifos and default rx trigger level
sahilmgandhi 18:6a4db94011d3 66 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
sahilmgandhi 18:6a4db94011d3 67 | 0 << 1 // Rx Fifo Reset
sahilmgandhi 18:6a4db94011d3 68 | 0 << 2 // Tx Fifo Reset
sahilmgandhi 18:6a4db94011d3 69 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 // disable irqs
sahilmgandhi 18:6a4db94011d3 72 obj->uart->IER = 0 << 0 // Rx Data available irq enable
sahilmgandhi 18:6a4db94011d3 73 | 0 << 1 // Tx Fifo empty irq enable
sahilmgandhi 18:6a4db94011d3 74 | 0 << 2; // Rx Line Status irq enable
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 // set default baud rate and format
sahilmgandhi 18:6a4db94011d3 77 serial_baud (obj, 9600);
sahilmgandhi 18:6a4db94011d3 78 serial_format(obj, 8, ParityNone, 1);
sahilmgandhi 18:6a4db94011d3 79
sahilmgandhi 18:6a4db94011d3 80 // pinout the chosen uart
sahilmgandhi 18:6a4db94011d3 81 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 82 pinmap_pinout(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 // set rx/tx pins in PullUp mode
sahilmgandhi 18:6a4db94011d3 85 if (tx != NC) {
sahilmgandhi 18:6a4db94011d3 86 pin_mode(tx, PullUp);
sahilmgandhi 18:6a4db94011d3 87 }
sahilmgandhi 18:6a4db94011d3 88 if (rx != NC) {
sahilmgandhi 18:6a4db94011d3 89 pin_mode(rx, PullUp);
sahilmgandhi 18:6a4db94011d3 90 }
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 switch (uart) {
sahilmgandhi 18:6a4db94011d3 93 case UART_0: obj->index = 0; break;
sahilmgandhi 18:6a4db94011d3 94 }
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 if (is_stdio_uart) {
sahilmgandhi 18:6a4db94011d3 99 stdio_uart_inited = 1;
sahilmgandhi 18:6a4db94011d3 100 memcpy(&stdio_uart, obj, sizeof(serial_t));
sahilmgandhi 18:6a4db94011d3 101 }
sahilmgandhi 18:6a4db94011d3 102 }
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 void serial_free(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 105 serial_irq_ids[obj->index] = 0;
sahilmgandhi 18:6a4db94011d3 106 }
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108 // serial_baud
sahilmgandhi 18:6a4db94011d3 109 // set the baud rate, taking in to account the current SystemFrequency
sahilmgandhi 18:6a4db94011d3 110 void serial_baud(serial_t *obj, int baudrate) {
sahilmgandhi 18:6a4db94011d3 111 LPC_SYSCON->UARTCLKDIV = 0x1;
sahilmgandhi 18:6a4db94011d3 112 uint32_t PCLK = SystemCoreClock;
sahilmgandhi 18:6a4db94011d3 113 // First we check to see if the basic divide with no DivAddVal/MulVal
sahilmgandhi 18:6a4db94011d3 114 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
sahilmgandhi 18:6a4db94011d3 115 // MulVal = 1. Otherwise, we search the valid ratio value range to find
sahilmgandhi 18:6a4db94011d3 116 // the closest match. This could be more elegant, using search methods
sahilmgandhi 18:6a4db94011d3 117 // and/or lookup tables, but the brute force method is not that much
sahilmgandhi 18:6a4db94011d3 118 // slower, and is more maintainable.
sahilmgandhi 18:6a4db94011d3 119 uint16_t DL = PCLK / (16 * baudrate);
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 uint8_t DivAddVal = 0;
sahilmgandhi 18:6a4db94011d3 122 uint8_t MulVal = 1;
sahilmgandhi 18:6a4db94011d3 123 int hit = 0;
sahilmgandhi 18:6a4db94011d3 124 uint16_t dlv;
sahilmgandhi 18:6a4db94011d3 125 uint8_t mv, dav;
sahilmgandhi 18:6a4db94011d3 126 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
sahilmgandhi 18:6a4db94011d3 127 int err_best = baudrate, b;
sahilmgandhi 18:6a4db94011d3 128 for (mv = 1; mv < 16 && !hit; mv++)
sahilmgandhi 18:6a4db94011d3 129 {
sahilmgandhi 18:6a4db94011d3 130 for (dav = 0; dav < mv; dav++)
sahilmgandhi 18:6a4db94011d3 131 {
sahilmgandhi 18:6a4db94011d3 132 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
sahilmgandhi 18:6a4db94011d3 133 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
sahilmgandhi 18:6a4db94011d3 134 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
sahilmgandhi 18:6a4db94011d3 135 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
sahilmgandhi 18:6a4db94011d3 136 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
sahilmgandhi 18:6a4db94011d3 139 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 140 else // 2 bits headroom, use more precision
sahilmgandhi 18:6a4db94011d3 141 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
sahilmgandhi 18:6a4db94011d3 144 if (dlv == 0)
sahilmgandhi 18:6a4db94011d3 145 dlv = 1;
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 // datasheet says if dav > 0 then DL must be >= 2
sahilmgandhi 18:6a4db94011d3 148 if ((dav > 0) && (dlv < 2))
sahilmgandhi 18:6a4db94011d3 149 dlv = 2;
sahilmgandhi 18:6a4db94011d3 150
sahilmgandhi 18:6a4db94011d3 151 // integer rearrangement of the baudrate equation (with rounding)
sahilmgandhi 18:6a4db94011d3 152 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 // check to see how we went
sahilmgandhi 18:6a4db94011d3 155 b = abs(b - baudrate);
sahilmgandhi 18:6a4db94011d3 156 if (b < err_best)
sahilmgandhi 18:6a4db94011d3 157 {
sahilmgandhi 18:6a4db94011d3 158 err_best = b;
sahilmgandhi 18:6a4db94011d3 159
sahilmgandhi 18:6a4db94011d3 160 DL = dlv;
sahilmgandhi 18:6a4db94011d3 161 MulVal = mv;
sahilmgandhi 18:6a4db94011d3 162 DivAddVal = dav;
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 if (b == baudrate)
sahilmgandhi 18:6a4db94011d3 165 {
sahilmgandhi 18:6a4db94011d3 166 hit = 1;
sahilmgandhi 18:6a4db94011d3 167 break;
sahilmgandhi 18:6a4db94011d3 168 }
sahilmgandhi 18:6a4db94011d3 169 }
sahilmgandhi 18:6a4db94011d3 170 }
sahilmgandhi 18:6a4db94011d3 171 }
sahilmgandhi 18:6a4db94011d3 172 }
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 // set LCR[DLAB] to enable writing to divider registers
sahilmgandhi 18:6a4db94011d3 175 obj->uart->LCR |= (1 << 7);
sahilmgandhi 18:6a4db94011d3 176
sahilmgandhi 18:6a4db94011d3 177 // set divider values
sahilmgandhi 18:6a4db94011d3 178 obj->uart->DLM = (DL >> 8) & 0xFF;
sahilmgandhi 18:6a4db94011d3 179 obj->uart->DLL = (DL >> 0) & 0xFF;
sahilmgandhi 18:6a4db94011d3 180 obj->uart->FDR = (uint32_t) DivAddVal << 0
sahilmgandhi 18:6a4db94011d3 181 | (uint32_t) MulVal << 4;
sahilmgandhi 18:6a4db94011d3 182
sahilmgandhi 18:6a4db94011d3 183 // clear LCR[DLAB]
sahilmgandhi 18:6a4db94011d3 184 obj->uart->LCR &= ~(1 << 7);
sahilmgandhi 18:6a4db94011d3 185 }
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
sahilmgandhi 18:6a4db94011d3 188 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
sahilmgandhi 18:6a4db94011d3 189 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
sahilmgandhi 18:6a4db94011d3 190 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
sahilmgandhi 18:6a4db94011d3 191 (parity == ParityForced1) || (parity == ParityForced0));
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193 stop_bits -= 1;
sahilmgandhi 18:6a4db94011d3 194 data_bits -= 5;
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196 int parity_enable, parity_select;
sahilmgandhi 18:6a4db94011d3 197 switch (parity) {
sahilmgandhi 18:6a4db94011d3 198 case ParityNone: parity_enable = 0; parity_select = 0; break;
sahilmgandhi 18:6a4db94011d3 199 case ParityOdd : parity_enable = 1; parity_select = 0; break;
sahilmgandhi 18:6a4db94011d3 200 case ParityEven: parity_enable = 1; parity_select = 1; break;
sahilmgandhi 18:6a4db94011d3 201 case ParityForced1: parity_enable = 1; parity_select = 2; break;
sahilmgandhi 18:6a4db94011d3 202 case ParityForced0: parity_enable = 1; parity_select = 3; break;
sahilmgandhi 18:6a4db94011d3 203 default:
sahilmgandhi 18:6a4db94011d3 204 parity_enable = 0, parity_select = 0;
sahilmgandhi 18:6a4db94011d3 205 break;
sahilmgandhi 18:6a4db94011d3 206 }
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 obj->uart->LCR = data_bits << 0
sahilmgandhi 18:6a4db94011d3 209 | stop_bits << 2
sahilmgandhi 18:6a4db94011d3 210 | parity_enable << 3
sahilmgandhi 18:6a4db94011d3 211 | parity_select << 4;
sahilmgandhi 18:6a4db94011d3 212 }
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 215 * INTERRUPTS HANDLING
sahilmgandhi 18:6a4db94011d3 216 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 217 static inline void uart_irq(uint32_t iir, uint32_t index) {
sahilmgandhi 18:6a4db94011d3 218 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
sahilmgandhi 18:6a4db94011d3 219 SerialIrq irq_type;
sahilmgandhi 18:6a4db94011d3 220 switch (iir) {
sahilmgandhi 18:6a4db94011d3 221 case 1: irq_type = TxIrq; break;
sahilmgandhi 18:6a4db94011d3 222 case 2: irq_type = RxIrq; break;
sahilmgandhi 18:6a4db94011d3 223 default: return;
sahilmgandhi 18:6a4db94011d3 224 }
sahilmgandhi 18:6a4db94011d3 225
sahilmgandhi 18:6a4db94011d3 226 if (serial_irq_ids[index] != 0)
sahilmgandhi 18:6a4db94011d3 227 irq_handler(serial_irq_ids[index], irq_type);
sahilmgandhi 18:6a4db94011d3 228 }
sahilmgandhi 18:6a4db94011d3 229
sahilmgandhi 18:6a4db94011d3 230 void uart0_irq() {uart_irq((LPC_UART->IIR >> 1) & 0x7, 0);}
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
sahilmgandhi 18:6a4db94011d3 233 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 234 serial_irq_ids[obj->index] = id;
sahilmgandhi 18:6a4db94011d3 235 }
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 238 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 239 uint32_t vector = 0;
sahilmgandhi 18:6a4db94011d3 240 switch ((int)obj->uart) {
sahilmgandhi 18:6a4db94011d3 241 case UART_0:
sahilmgandhi 18:6a4db94011d3 242 irq_n=UART_IRQn;
sahilmgandhi 18:6a4db94011d3 243 vector = (uint32_t)&uart0_irq;
sahilmgandhi 18:6a4db94011d3 244 break;
sahilmgandhi 18:6a4db94011d3 245 default:
sahilmgandhi 18:6a4db94011d3 246 return;
sahilmgandhi 18:6a4db94011d3 247 }
sahilmgandhi 18:6a4db94011d3 248
sahilmgandhi 18:6a4db94011d3 249 if (enable) {
sahilmgandhi 18:6a4db94011d3 250 obj->uart->IER |= 1 << irq;
sahilmgandhi 18:6a4db94011d3 251 NVIC_SetVector(irq_n, vector);
sahilmgandhi 18:6a4db94011d3 252 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 253 } else { // disable
sahilmgandhi 18:6a4db94011d3 254 int all_disabled = 0;
sahilmgandhi 18:6a4db94011d3 255 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
sahilmgandhi 18:6a4db94011d3 256
sahilmgandhi 18:6a4db94011d3 257 obj->uart->IER &= ~(1 << irq);
sahilmgandhi 18:6a4db94011d3 258 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
sahilmgandhi 18:6a4db94011d3 259
sahilmgandhi 18:6a4db94011d3 260 if (all_disabled)
sahilmgandhi 18:6a4db94011d3 261 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 262 }
sahilmgandhi 18:6a4db94011d3 263 }
sahilmgandhi 18:6a4db94011d3 264
sahilmgandhi 18:6a4db94011d3 265 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 266 * READ/WRITE
sahilmgandhi 18:6a4db94011d3 267 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 268 int serial_getc(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 269 while (!serial_readable(obj));
sahilmgandhi 18:6a4db94011d3 270 return obj->uart->RBR;
sahilmgandhi 18:6a4db94011d3 271 }
sahilmgandhi 18:6a4db94011d3 272
sahilmgandhi 18:6a4db94011d3 273 void serial_putc(serial_t *obj, int c) {
sahilmgandhi 18:6a4db94011d3 274 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 275 obj->uart->THR = c;
sahilmgandhi 18:6a4db94011d3 276 }
sahilmgandhi 18:6a4db94011d3 277
sahilmgandhi 18:6a4db94011d3 278 int serial_readable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 279 return obj->uart->LSR & 0x01;
sahilmgandhi 18:6a4db94011d3 280 }
sahilmgandhi 18:6a4db94011d3 281
sahilmgandhi 18:6a4db94011d3 282 int serial_writable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 283 return obj->uart->LSR & 0x20;
sahilmgandhi 18:6a4db94011d3 284 }
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 void serial_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 287 obj->uart->FCR = 1 << 1 // rx FIFO reset
sahilmgandhi 18:6a4db94011d3 288 | 1 << 2 // tx FIFO reset
sahilmgandhi 18:6a4db94011d3 289 | 0 << 6; // interrupt depth
sahilmgandhi 18:6a4db94011d3 290 }
sahilmgandhi 18:6a4db94011d3 291
sahilmgandhi 18:6a4db94011d3 292 void serial_pinout_tx(PinName tx) {
sahilmgandhi 18:6a4db94011d3 293 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 294 }
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 void serial_break_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 297 obj->uart->LCR &= ~(1 << 6);
sahilmgandhi 18:6a4db94011d3 298 }
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 void serial_break_set(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 301 obj->uart->LCR |= 1 << 6;
sahilmgandhi 18:6a4db94011d3 302 }