Mouse code for the MacroRat
mbed-dev/targets/TARGET_NXP/TARGET_LPC11UXX/TARGET_ARCH_GPRS/PeripheralNames.h@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2006-2013 ARM Limited |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | #ifndef MBED_PERIPHERALNAMES_H |
sahilmgandhi | 18:6a4db94011d3 | 17 | #define MBED_PERIPHERALNAMES_H |
sahilmgandhi | 18:6a4db94011d3 | 18 | |
sahilmgandhi | 18:6a4db94011d3 | 19 | #include "cmsis.h" |
sahilmgandhi | 18:6a4db94011d3 | 20 | |
sahilmgandhi | 18:6a4db94011d3 | 21 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 22 | extern "C" { |
sahilmgandhi | 18:6a4db94011d3 | 23 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 24 | |
sahilmgandhi | 18:6a4db94011d3 | 25 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 26 | UART_0 = (int)LPC_USART_BASE |
sahilmgandhi | 18:6a4db94011d3 | 27 | } UARTName; |
sahilmgandhi | 18:6a4db94011d3 | 28 | |
sahilmgandhi | 18:6a4db94011d3 | 29 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 30 | I2C_0 = (int)LPC_I2C_BASE |
sahilmgandhi | 18:6a4db94011d3 | 31 | } I2CName; |
sahilmgandhi | 18:6a4db94011d3 | 32 | |
sahilmgandhi | 18:6a4db94011d3 | 33 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 34 | ADC0_0 = 0, |
sahilmgandhi | 18:6a4db94011d3 | 35 | ADC0_1, |
sahilmgandhi | 18:6a4db94011d3 | 36 | ADC0_2, |
sahilmgandhi | 18:6a4db94011d3 | 37 | ADC0_3, |
sahilmgandhi | 18:6a4db94011d3 | 38 | ADC0_4, |
sahilmgandhi | 18:6a4db94011d3 | 39 | ADC0_5, |
sahilmgandhi | 18:6a4db94011d3 | 40 | ADC0_6, |
sahilmgandhi | 18:6a4db94011d3 | 41 | ADC0_7 |
sahilmgandhi | 18:6a4db94011d3 | 42 | } ADCName; |
sahilmgandhi | 18:6a4db94011d3 | 43 | |
sahilmgandhi | 18:6a4db94011d3 | 44 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 45 | SPI_0 = (int)LPC_SSP0_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 46 | SPI_1 = (int)LPC_SSP1_BASE |
sahilmgandhi | 18:6a4db94011d3 | 47 | } SPIName; |
sahilmgandhi | 18:6a4db94011d3 | 48 | |
sahilmgandhi | 18:6a4db94011d3 | 49 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 50 | PWM_1 = 0, |
sahilmgandhi | 18:6a4db94011d3 | 51 | PWM_2, |
sahilmgandhi | 18:6a4db94011d3 | 52 | PWM_3, |
sahilmgandhi | 18:6a4db94011d3 | 53 | PWM_4, |
sahilmgandhi | 18:6a4db94011d3 | 54 | PWM_5, |
sahilmgandhi | 18:6a4db94011d3 | 55 | PWM_6, |
sahilmgandhi | 18:6a4db94011d3 | 56 | PWM_7, |
sahilmgandhi | 18:6a4db94011d3 | 57 | PWM_8, |
sahilmgandhi | 18:6a4db94011d3 | 58 | PWM_9, |
sahilmgandhi | 18:6a4db94011d3 | 59 | PWM_10, |
sahilmgandhi | 18:6a4db94011d3 | 60 | PWM_11 |
sahilmgandhi | 18:6a4db94011d3 | 61 | } PWMName; |
sahilmgandhi | 18:6a4db94011d3 | 62 | |
sahilmgandhi | 18:6a4db94011d3 | 63 | #define STDIO_UART_TX USBTX |
sahilmgandhi | 18:6a4db94011d3 | 64 | #define STDIO_UART_RX USBRX |
sahilmgandhi | 18:6a4db94011d3 | 65 | #define STDIO_UART UART_0 |
sahilmgandhi | 18:6a4db94011d3 | 66 | |
sahilmgandhi | 18:6a4db94011d3 | 67 | // Default peripherals |
sahilmgandhi | 18:6a4db94011d3 | 68 | #define MBED_SPI0 p5, p6, p7, p8 |
sahilmgandhi | 18:6a4db94011d3 | 69 | #define MBED_SPI1 p11, p12, p13, p14 |
sahilmgandhi | 18:6a4db94011d3 | 70 | |
sahilmgandhi | 18:6a4db94011d3 | 71 | #define MBED_UART0 p9, p10 |
sahilmgandhi | 18:6a4db94011d3 | 72 | #define MBED_UARTUSB USBTX, USBRX |
sahilmgandhi | 18:6a4db94011d3 | 73 | |
sahilmgandhi | 18:6a4db94011d3 | 74 | #define MBED_I2C0 p28, p27 |
sahilmgandhi | 18:6a4db94011d3 | 75 | |
sahilmgandhi | 18:6a4db94011d3 | 76 | #define MBED_ANALOGIN0 p15 |
sahilmgandhi | 18:6a4db94011d3 | 77 | #define MBED_ANALOGIN1 p16 |
sahilmgandhi | 18:6a4db94011d3 | 78 | #define MBED_ANALOGIN2 p17 |
sahilmgandhi | 18:6a4db94011d3 | 79 | #define MBED_ANALOGIN3 p18 |
sahilmgandhi | 18:6a4db94011d3 | 80 | #define MBED_ANALOGIN4 p19 |
sahilmgandhi | 18:6a4db94011d3 | 81 | #define MBED_ANALOGIN5 p20 |
sahilmgandhi | 18:6a4db94011d3 | 82 | |
sahilmgandhi | 18:6a4db94011d3 | 83 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 84 | } |
sahilmgandhi | 18:6a4db94011d3 | 85 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 86 | |
sahilmgandhi | 18:6a4db94011d3 | 87 | #endif |