MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_acmp.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

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sahilmgandhi 18:6a4db94011d3 1 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file acmp.h
sahilmgandhi 18:6a4db94011d3 3 * @version V1.00
sahilmgandhi 18:6a4db94011d3 4 * $Revision: 4 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 14/05/29 1:13p $
sahilmgandhi 18:6a4db94011d3 6 * @brief NUC472/NUC442 Analog Comparator(ACMP) driver header file
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 11 #ifndef __ACMP_H__
sahilmgandhi 18:6a4db94011d3 12 #define __ACMP_H__
sahilmgandhi 18:6a4db94011d3 13
sahilmgandhi 18:6a4db94011d3 14 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 15 extern "C"
sahilmgandhi 18:6a4db94011d3 16 {
sahilmgandhi 18:6a4db94011d3 17 #endif
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19
sahilmgandhi 18:6a4db94011d3 20 /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
sahilmgandhi 18:6a4db94011d3 21 @{
sahilmgandhi 18:6a4db94011d3 22 */
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 /** @addtogroup NUC472_442_ACMP_Driver ACMP Driver
sahilmgandhi 18:6a4db94011d3 25 @{
sahilmgandhi 18:6a4db94011d3 26 */
sahilmgandhi 18:6a4db94011d3 27
sahilmgandhi 18:6a4db94011d3 28 /** @addtogroup NUC472_442_ACMP_EXPORTED_CONSTANTS ACMP Exported Constants
sahilmgandhi 18:6a4db94011d3 29 @{
sahilmgandhi 18:6a4db94011d3 30 */
sahilmgandhi 18:6a4db94011d3 31
sahilmgandhi 18:6a4db94011d3 32 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 33 /* ACMP_CR constant definitions */
sahilmgandhi 18:6a4db94011d3 34 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 35 #define ACMP_VNEG_PIN (0xFFUL) ///< Selecting the voltage of ACMP negative input pin as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 36 #define ACMP_VNEG_BANDGAP (0x00UL) ///< Selecting band-gap voltage as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 37 #define ACMP_VNEG_4_OVER_24_VDD (0x80UL) ///< Selecting 4/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 38 #define ACMP_VNEG_5_OVER_24_VDD (0x81UL) ///< Selecting 5/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 39 #define ACMP_VNEG_6_OVER_24_VDD (0x82UL) ///< Selecting 6/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 40 #define ACMP_VNEG_7_OVER_24_VDD (0x83UL) ///< Selecting 7/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 41 #define ACMP_VNEG_8_OVER_24_VDD (0x84UL) ///< Selecting 8/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 42 #define ACMP_VNEG_9_OVER_24_VDD (0x85UL) ///< Selecting 9/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 43 #define ACMP_VNEG_10_OVER_24_VDD (0x86UL) ///< Selecting 10/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 44 #define ACMP_VNEG_11_OVER_24_VDD (0x87UL) ///< Selecting 11/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 45 #define ACMP_VNEG_12_OVER_24_VDD (0x88UL) ///< Selecting 12/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 46 #define ACMP_VNEG_13_OVER_24_VDD (0x89UL) ///< Selecting 13/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 47 #define ACMP_VNEG_14_OVER_24_VDD (0x8AUL) ///< Selecting 14/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 48 #define ACMP_VNEG_15_OVER_24_VDD (0x8BUL) ///< Selecting 15/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 49 #define ACMP_VNEG_16_OVER_24_VDD (0x8CUL) ///< Selecting 16/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 50 #define ACMP_VNEG_17_OVER_24_VDD (0x8DUL) ///< Selecting 17/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 51 #define ACMP_VNEG_18_OVER_24_VDD (0x8EUL) ///< Selecting 18/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 52 #define ACMP_VNEG_19_OVER_24_VDD (0x8FUL) ///< Selecting 19/24 VDD as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 53 #define ACMP_VNEG_4_OVER_24_IREF (0xC0UL) ///< Selecting 4/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 54 #define ACMP_VNEG_5_OVER_24_IREF (0xC1UL) ///< Selecting 5/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 55 #define ACMP_VNEG_6_OVER_24_IREF (0xC2UL) ///< Selecting 6/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 56 #define ACMP_VNEG_7_OVER_24_IREF (0xC3UL) ///< Selecting 7/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 57 #define ACMP_VNEG_8_OVER_24_IREF (0xC4UL) ///< Selecting 8/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 58 #define ACMP_VNEG_9_OVER_24_IREF (0xC5UL) ///< Selecting 9/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 59 #define ACMP_VNEG_10_OVER_24_IREF (0xC6UL) ///< Selecting 10/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 60 #define ACMP_VNEG_11_OVER_24_IREF (0xC7UL) ///< Selecting 11/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 61 #define ACMP_VNEG_12_OVER_24_IREF (0xC8UL) ///< Selecting 12/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 62 #define ACMP_VNEG_13_OVER_24_IREF (0xC9UL) ///< Selecting 13/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 63 #define ACMP_VNEG_14_OVER_24_IREF (0xCAUL) ///< Selecting 14/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 64 #define ACMP_VNEG_15_OVER_24_IREF (0xCBUL) ///< Selecting 15/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 65 #define ACMP_VNEG_16_OVER_24_IREF (0xCCUL) ///< Selecting 16/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 66 #define ACMP_VNEG_17_OVER_24_IREF (0xCDUL) ///< Selecting 17/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 67 #define ACMP_VNEG_18_OVER_24_IREF (0xCEUL) ///< Selecting 18/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 68 #define ACMP_VNEG_19_OVER_24_IREF (0xCFUL) ///< Selecting 19/24 IREF as the source of ACMP V- \hideinitializer
sahilmgandhi 18:6a4db94011d3 69 #define ACMP_HYSTERESIS_ENABLE (1UL << ACMP_CTL_HYSEN_Pos) ///< Enable hysteresis function \hideinitializer
sahilmgandhi 18:6a4db94011d3 70 #define ACMP_HYSTERESIS_DISABLE (0UL) ///< Disable hysteresis function \hideinitializer
sahilmgandhi 18:6a4db94011d3 71 #define ACMP_CH0_POSPIN_P0 (0UL) ///< Selecting ACMP0_P0 as ACMP Channel 0 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 72 #define ACMP_CH0_POSPIN_P1 (1UL << ACMP_CTL_POSSEL_Pos) ///< Selecting ACMP0_P1 as ACMP Channel 0 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 73 #define ACMP_CH0_POSPIN_P2 (2UL << ACMP_CTL_POSSEL_Pos) ///< Selecting ACMP0_P2 as ACMP Channel 0 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 74 #define ACMP_CH0_POSPIN_P3 (3UL << ACMP_CTL_POSSEL_Pos) ///< Selecting ACMP0_P3 as ACMP Channel 0 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 75 #define ACMP_CH0_POS_OPA0 (4UL << ACMP_CTL_POSSEL_Pos) ///< Selecting OPA0 as ACMP Channel 0 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 76 #define ACMP_CH1_POSPIN_P0 (0UL) ///< Selecting ACMP1_P0 as ACMP Channel 1 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 77 #define ACMP_CH1_POSPIN_P1 (1UL << ACMP_CTL_POSSEL_Pos) ///< Selecting ACMP1_P1 as ACMP Channel 1 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 78 #define ACMP_CH1_POSPIN_P2 (2UL << ACMP_CTL_POSSEL_Pos) ///< Selecting ACMP1_P2 as ACMP Channel 1 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 79 #define ACMP_CH1_POSPIN_P3 (3UL << ACMP_CTL_POSSEL_Pos) ///< Selecting ACMP1_P3 as ACMP Channel 1 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 80 #define ACMP_CH1_POS_OPA1 (4UL << ACMP_CTL_POSSEL_Pos) ///< Selecting OPA1 as ACMP Channel 1 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 81 #define ACMP_CH2_POSPIN_P0 (0UL) ///< Selecting ACMP2_P0 as ACMP Channel 2 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 82 #define ACMP_CH2_POSPIN_P1 (1UL << ACMP_CTL_POSSEL_Pos) ///< Selecting ACMP2_P1 as ACMP Channel 2 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 83 #define ACMP_CH2_POSPIN_P2 (2UL << ACMP_CTL_POSSEL_Pos) ///< Selecting ACMP2_P2 as ACMP Channel 2 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 84 #define ACMP_CH2_POSPIN_P3 (3UL << ACMP_CTL_POSSEL_Pos) ///< Selecting ACMP2_P3 as ACMP Channel 2 positive input source \hideinitializer
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 /*@}*/ /* end of group NUC472_442_ACMP_EXPORTED_CONSTANTS */
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 /** @addtogroup NUC472_442_ACMP_EXPORTED_FUNCTIONS ACMP Exported Functions
sahilmgandhi 18:6a4db94011d3 91 @{
sahilmgandhi 18:6a4db94011d3 92 */
sahilmgandhi 18:6a4db94011d3 93
sahilmgandhi 18:6a4db94011d3 94 /**
sahilmgandhi 18:6a4db94011d3 95 * @brief This macro is used to select ACMP negative input source
sahilmgandhi 18:6a4db94011d3 96 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 97 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 98 * @param[in] u32Src is comparator negative input selection. Including :
sahilmgandhi 18:6a4db94011d3 99 * - \ref ACMP_VNEG_PIN
sahilmgandhi 18:6a4db94011d3 100 * - \ref ACMP_VNEG_BANDGAP
sahilmgandhi 18:6a4db94011d3 101 * - \ref ACMP_VNEG_4_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 102 * - \ref ACMP_VNEG_5_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 103 * - \ref ACMP_VNEG_6_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 104 * - \ref ACMP_VNEG_7_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 105 * - \ref ACMP_VNEG_8_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 106 * - \ref ACMP_VNEG_9_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 107 * - \ref ACMP_VNEG_10_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 108 * - \ref ACMP_VNEG_11_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 109 * - \ref ACMP_VNEG_12_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 110 * - \ref ACMP_VNEG_13_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 111 * - \ref ACMP_VNEG_14_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 112 * - \ref ACMP_VNEG_15_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 113 * - \ref ACMP_VNEG_16_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 114 * - \ref ACMP_VNEG_17_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 115 * - \ref ACMP_VNEG_18_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 116 * - \ref ACMP_VNEG_19_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 117 * - \ref ACMP_VNEG_4_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 118 * - \ref ACMP_VNEG_5_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 119 * - \ref ACMP_VNEG_6_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 120 * - \ref ACMP_VNEG_7_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 121 * - \ref ACMP_VNEG_8_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 122 * - \ref ACMP_VNEG_9_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 123 * - \ref ACMP_VNEG_10_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 124 * - \ref ACMP_VNEG_11_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 125 * - \ref ACMP_VNEG_12_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 126 * - \ref ACMP_VNEG_13_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 127 * - \ref ACMP_VNEG_14_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 128 * - \ref ACMP_VNEG_15_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 129 * - \ref ACMP_VNEG_16_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 130 * - \ref ACMP_VNEG_17_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 131 * - \ref ACMP_VNEG_18_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 132 * - \ref ACMP_VNEG_19_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 133 *
sahilmgandhi 18:6a4db94011d3 134 * @return None
sahilmgandhi 18:6a4db94011d3 135 * @note The V- setting is shared by all comparators if input source is not coming from PIN
sahilmgandhi 18:6a4db94011d3 136 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 137 */
sahilmgandhi 18:6a4db94011d3 138 #define ACMP_SET_NEG_SRC(acmp, u32ChNum, u32Src) do{\
sahilmgandhi 18:6a4db94011d3 139 if(u32Src == ACMP_VNEG_PIN)\
sahilmgandhi 18:6a4db94011d3 140 ACMP->CTL[u32ChNum] &= ~ACMP_CTL_NEGSEL_Msk;\
sahilmgandhi 18:6a4db94011d3 141 else {\
sahilmgandhi 18:6a4db94011d3 142 ACMP->CTL[u32ChNum] |= ACMP_CTL_NEGSEL_Msk;\
sahilmgandhi 18:6a4db94011d3 143 ACMP->VREF = u32Src\
sahilmgandhi 18:6a4db94011d3 144 }\
sahilmgandhi 18:6a4db94011d3 145 }while(0)
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 /**
sahilmgandhi 18:6a4db94011d3 148 * @brief This macro is used to enable hysteresis function
sahilmgandhi 18:6a4db94011d3 149 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 150 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 151 * @return None
sahilmgandhi 18:6a4db94011d3 152 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 153 */
sahilmgandhi 18:6a4db94011d3 154 #define ACMP_ENABLE_HYSTERESIS(acmp, u32ChNum) (ACMP->CTL[u32ChNum] |= ACMP_CTL_HYSEN_Msk)
sahilmgandhi 18:6a4db94011d3 155
sahilmgandhi 18:6a4db94011d3 156 /**
sahilmgandhi 18:6a4db94011d3 157 * @brief This macro is used to disable hysteresis function
sahilmgandhi 18:6a4db94011d3 158 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 159 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 160 * @return None
sahilmgandhi 18:6a4db94011d3 161 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 162 */
sahilmgandhi 18:6a4db94011d3 163 #define ACMP_DISABLE_HYSTERESIS(acmp, u32ChNum) (ACMP->CTL[u32ChNum] &= ~ACMP_CTL_HYSEN_Msk)
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 /**
sahilmgandhi 18:6a4db94011d3 166 * @brief This macro is used to enable interrupt
sahilmgandhi 18:6a4db94011d3 167 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 168 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 169 * @return None
sahilmgandhi 18:6a4db94011d3 170 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 171 */
sahilmgandhi 18:6a4db94011d3 172 #define ACMP_ENABLE_INT(acmp, u32ChNum) (ACMP->CTL[u32ChNum] |= ACMP_CTL_ACMPIE_Msk)
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 /**
sahilmgandhi 18:6a4db94011d3 175 * @brief This macro is used to disable interrupt
sahilmgandhi 18:6a4db94011d3 176 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 177 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 178 * @return None
sahilmgandhi 18:6a4db94011d3 179 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 180 */
sahilmgandhi 18:6a4db94011d3 181 #define ACMP_DISABLE_INT(acmp, u32ChNum) (ACMP->CTL[u32ChNum] &= ~ACMP_CTL_ACMPIE_Msk)
sahilmgandhi 18:6a4db94011d3 182
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 /**
sahilmgandhi 18:6a4db94011d3 185 * @brief This macro is used to enable ACMP
sahilmgandhi 18:6a4db94011d3 186 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 187 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 188 * @return None
sahilmgandhi 18:6a4db94011d3 189 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 190 */
sahilmgandhi 18:6a4db94011d3 191 #define ACMP_ENABLE(acmp, u32ChNum) (ACMP->CTL[u32ChNum] |= ACMP_CTL_ACMPEN_Msk)
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193 /**
sahilmgandhi 18:6a4db94011d3 194 * @brief This macro is used to disable ACMP
sahilmgandhi 18:6a4db94011d3 195 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 196 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 197 * @return None
sahilmgandhi 18:6a4db94011d3 198 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 199 */
sahilmgandhi 18:6a4db94011d3 200 #define ACMP_DISABLE(acmp, u32ChNum) (ACMP->CTL[u32ChNum] &= ~ACMP_CTL_ACMPEN_Msk)
sahilmgandhi 18:6a4db94011d3 201
sahilmgandhi 18:6a4db94011d3 202 /**
sahilmgandhi 18:6a4db94011d3 203 * @brief This macro is used to get ACMP output value
sahilmgandhi 18:6a4db94011d3 204 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 205 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 206 * @return 1 or 0
sahilmgandhi 18:6a4db94011d3 207 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 208 */
sahilmgandhi 18:6a4db94011d3 209 #define ACMP_GET_OUTPUT(acmp, u32ChNum) (ACMP->STATUS & (ACMP_STATUS_ACMPO0_Msk<<(u32ChNum))?1:0)
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 /**
sahilmgandhi 18:6a4db94011d3 212 * @brief This macro is used to get ACMP interrupt flag
sahilmgandhi 18:6a4db94011d3 213 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 214 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 215 * @return ACMP interrupt occurred or not
sahilmgandhi 18:6a4db94011d3 216 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 217 */
sahilmgandhi 18:6a4db94011d3 218 #define ACMP_GET_INT_FLAG(acmp, u32ChNum) (ACMP->STATUS & (ACMP_STATUS_ACMPIF0_Msk<<(u32ChNum))?1:0)
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 /**
sahilmgandhi 18:6a4db94011d3 221 * @brief This macro is used to clear ACMP interrupt flag
sahilmgandhi 18:6a4db94011d3 222 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 223 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 224 * @return None
sahilmgandhi 18:6a4db94011d3 225 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 226 */
sahilmgandhi 18:6a4db94011d3 227 #define ACMP_CLR_INT_FLAG(acmp, u32ChNum) (ACMP->STATUS = (ACMP_STATUS_ACMPIF0_Msk<<(u32ChNum)))
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229 /**
sahilmgandhi 18:6a4db94011d3 230 * @brief This macro is used to select the V+ pin of ACMP
sahilmgandhi 18:6a4db94011d3 231 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 232 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 233 * @param[in] u32Pin The input pin. For channel 0, valid values are \ref ACMP_CH0_POSPIN_P0,
sahilmgandhi 18:6a4db94011d3 234 * \ref ACMP_CH0_POSPIN_P1, \ref ACMP_CH0_POSPIN_P2, \ref ACMP_CH0_POSPIN_P3, and \ref ACMP_CH0_POS_OPA0.
sahilmgandhi 18:6a4db94011d3 235 * For channel 1, valid values are , \ref ACMP_CH1_POSPIN_P0, \ref ACMP_CH1_POSPIN_P1, \ref ACMP_CH1_POSPIN_P2,
sahilmgandhi 18:6a4db94011d3 236 * \ref ACMP_CH1_POSPIN_P3, and \ref ACMP_CH1_POS_OPA1. For channel 2, valid values are , \ref ACMP_CH2_POSPIN_P0,
sahilmgandhi 18:6a4db94011d3 237 * \ref ACMP_CH2_POSPIN_P1, \ref ACMP_CH2_POSPIN_P2, and \ref ACMP_CH2_POSPIN_P3.
sahilmgandhi 18:6a4db94011d3 238 * @return None
sahilmgandhi 18:6a4db94011d3 239 * @note Except this setting, multi-function pin also needs to be configured
sahilmgandhi 18:6a4db94011d3 240 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 241 */
sahilmgandhi 18:6a4db94011d3 242 #define ACMP_SELECT_P(acmp, u32ChNum, u32Pin) (ACMP->CTL[u32ChNum] = (ACMP->CTL[u32ChNum] & ~ACMP_CTL_POSSEL_Msk) | u32Pin)
sahilmgandhi 18:6a4db94011d3 243 /**
sahilmgandhi 18:6a4db94011d3 244 * @brief This macro is used to set the level of CRV (Comparator Reference Voltage)
sahilmgandhi 18:6a4db94011d3 245 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 246 * @param[in] u32Level CRV level, possible values are
sahilmgandhi 18:6a4db94011d3 247 * - \ref ACMP_VNEG_4_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 248 * - \ref ACMP_VNEG_5_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 249 * - \ref ACMP_VNEG_6_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 250 * - \ref ACMP_VNEG_7_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 251 * - \ref ACMP_VNEG_8_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 252 * - \ref ACMP_VNEG_9_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 253 * - \ref ACMP_VNEG_10_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 254 * - \ref ACMP_VNEG_11_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 255 * - \ref ACMP_VNEG_12_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 256 * - \ref ACMP_VNEG_13_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 257 * - \ref ACMP_VNEG_14_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 258 * - \ref ACMP_VNEG_15_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 259 * - \ref ACMP_VNEG_16_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 260 * - \ref ACMP_VNEG_17_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 261 * - \ref ACMP_VNEG_18_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 262 * - \ref ACMP_VNEG_19_OVER_24_VDD
sahilmgandhi 18:6a4db94011d3 263 * - \ref ACMP_VNEG_4_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 264 * - \ref ACMP_VNEG_5_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 265 * - \ref ACMP_VNEG_6_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 266 * - \ref ACMP_VNEG_7_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 267 * - \ref ACMP_VNEG_8_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 268 * - \ref ACMP_VNEG_9_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 269 * - \ref ACMP_VNEG_10_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 270 * - \ref ACMP_VNEG_11_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 271 * - \ref ACMP_VNEG_12_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 272 * - \ref ACMP_VNEG_13_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 273 * - \ref ACMP_VNEG_14_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 274 * - \ref ACMP_VNEG_15_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 275 * - \ref ACMP_VNEG_16_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 276 * - \ref ACMP_VNEG_17_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 277 * - \ref ACMP_VNEG_18_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 278 * - \ref ACMP_VNEG_19_OVER_24_IREF
sahilmgandhi 18:6a4db94011d3 279 * @return None
sahilmgandhi 18:6a4db94011d3 280 * @note This macro does not enable CRV. Please use \ref ACMP_ENABLE_CRV to enable CRV.
sahilmgandhi 18:6a4db94011d3 281 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 282 */
sahilmgandhi 18:6a4db94011d3 283 #define ACMP_CRV_SEL(acmp, u32Level) (ACMP->VREF = (ACMP->VREF & ~ACMP_VREF_IREFSEL_Msk) | (u32Level & ~ACMP_VREF_IREFSEL_Msk))
sahilmgandhi 18:6a4db94011d3 284 /**
sahilmgandhi 18:6a4db94011d3 285 * @brief This macro is used to enable CRV(Comparator Reference Voltage)
sahilmgandhi 18:6a4db94011d3 286 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 287 * @return None
sahilmgandhi 18:6a4db94011d3 288 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 289 */
sahilmgandhi 18:6a4db94011d3 290 #define ACMP_ENABLE_CRV(acmp) (ACMP->VREF |= ACMP_VREF_IREFSEL_Msk)
sahilmgandhi 18:6a4db94011d3 291 /**
sahilmgandhi 18:6a4db94011d3 292 * @brief This macro is used to disable CRV(Comparator Reference Voltage)
sahilmgandhi 18:6a4db94011d3 293 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 294 * @return None
sahilmgandhi 18:6a4db94011d3 295 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 296 */
sahilmgandhi 18:6a4db94011d3 297 #define ACMP_DISABLE_CRV(acmp) (ACMP->VREF &= ~ACMP_VREF_IREFSEL_Msk)
sahilmgandhi 18:6a4db94011d3 298
sahilmgandhi 18:6a4db94011d3 299 /**
sahilmgandhi 18:6a4db94011d3 300 * @brief This macro is used to enable ACMP output inverse function
sahilmgandhi 18:6a4db94011d3 301 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 302 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 303 * @return None
sahilmgandhi 18:6a4db94011d3 304 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 305 */
sahilmgandhi 18:6a4db94011d3 306 #define ACMP_ENABLE_OUTPUT_INVERSE (acmp, u32ChNum) (ACMP->CTL[u32ChNum] |= ACMP_CTL_ACMPOINV_Msk)
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 /**
sahilmgandhi 18:6a4db94011d3 309 * @brief This macro is used to disable ACMP output inverse function
sahilmgandhi 18:6a4db94011d3 310 * @param[in] acmp The base address of ACMP module
sahilmgandhi 18:6a4db94011d3 311 * @param[in] u32ChNum The ACMP number, could 0, 1, or 2
sahilmgandhi 18:6a4db94011d3 312 * @return None
sahilmgandhi 18:6a4db94011d3 313 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 314 */
sahilmgandhi 18:6a4db94011d3 315 #define ACMP_DISABLE_OUTPUT_INVERSE (acmp, u32ChNum) (ACMP->CTL[u32ChNum] &= ~ACMP_CTL_ACMPOINV_Msk)
sahilmgandhi 18:6a4db94011d3 316
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 void ACMP_Open(ACMP_T *acmp, uint32_t u32ChNum, uint32_t u32NegSrc, uint32_t u32HysteresisEn);
sahilmgandhi 18:6a4db94011d3 319 void ACMP_Close(ACMP_T *acmp, uint32_t u32ChNum);
sahilmgandhi 18:6a4db94011d3 320
sahilmgandhi 18:6a4db94011d3 321 /*@}*/ /* end of group NUC472_442_ACMP_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 322
sahilmgandhi 18:6a4db94011d3 323 /*@}*/ /* end of group NUC472_442_ACMP_Driver */
sahilmgandhi 18:6a4db94011d3 324
sahilmgandhi 18:6a4db94011d3 325 /*@}*/ /* end of group NUC472_442_Device_Driver */
sahilmgandhi 18:6a4db94011d3 326
sahilmgandhi 18:6a4db94011d3 327 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 328 }
sahilmgandhi 18:6a4db94011d3 329 #endif
sahilmgandhi 18:6a4db94011d3 330
sahilmgandhi 18:6a4db94011d3 331 #endif //__ACMP_H__
sahilmgandhi 18:6a4db94011d3 332
sahilmgandhi 18:6a4db94011d3 333 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/