MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_gpio.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

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sahilmgandhi 18:6a4db94011d3 1 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file GPIO.h
sahilmgandhi 18:6a4db94011d3 3 * @version V3.00
sahilmgandhi 18:6a4db94011d3 4 * $Revision: 21 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 15/08/11 10:26a $
sahilmgandhi 18:6a4db94011d3 6 * @brief M451 series GPIO driver header file
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2011~2015 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 12 #ifndef __GPIO_H__
sahilmgandhi 18:6a4db94011d3 13 #define __GPIO_H__
sahilmgandhi 18:6a4db94011d3 14
sahilmgandhi 18:6a4db94011d3 15
sahilmgandhi 18:6a4db94011d3 16 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 17 extern "C"
sahilmgandhi 18:6a4db94011d3 18 {
sahilmgandhi 18:6a4db94011d3 19 #endif
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 /** @addtogroup Standard_Driver Standard Driver
sahilmgandhi 18:6a4db94011d3 22 @{
sahilmgandhi 18:6a4db94011d3 23 */
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 /** @addtogroup GPIO_Driver GPIO Driver
sahilmgandhi 18:6a4db94011d3 26 @{
sahilmgandhi 18:6a4db94011d3 27 */
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 /** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants
sahilmgandhi 18:6a4db94011d3 30 @{
sahilmgandhi 18:6a4db94011d3 31 */
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #define GPIO_PIN_MAX 16 /*!< Specify Maximum Pins of Each GPIO Port */
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 38 /* GPIO_MODE Constant Definitions */
sahilmgandhi 18:6a4db94011d3 39 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 40 #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode */
sahilmgandhi 18:6a4db94011d3 41 #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode */
sahilmgandhi 18:6a4db94011d3 42 #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode */
sahilmgandhi 18:6a4db94011d3 43 #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode */
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 /* GPIO Interrupt Type Constant Definitions */
sahilmgandhi 18:6a4db94011d3 48 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 49 #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge */
sahilmgandhi 18:6a4db94011d3 50 #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge */
sahilmgandhi 18:6a4db94011d3 51 #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge */
sahilmgandhi 18:6a4db94011d3 52 #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High */
sahilmgandhi 18:6a4db94011d3 53 #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level */
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 57 /* GPIO_INTTYPE Constant Definitions */
sahilmgandhi 18:6a4db94011d3 58 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 59 #define GPIO_INTTYPE_EDGE 0UL /*!< GPIO_INTTYPE Setting for Edge Trigger Mode */
sahilmgandhi 18:6a4db94011d3 60 #define GPIO_INTTYPE_LEVEL 1UL /*!< GPIO_INTTYPE Setting for Edge Level Mode */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 64 /* GPIO_DBCTL Constant Definitions */
sahilmgandhi 18:6a4db94011d3 65 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 66 #define GPIO_DBCTL_ICLK_ON 0x00000020UL /*!< GPIO_DBCTL setting for all IO pins edge detection circuit is always active after reset */
sahilmgandhi 18:6a4db94011d3 67 #define GPIO_DBCTL_ICLK_OFF 0x00000000UL /*!< GPIO_DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 */
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 #define GPIO_DBCTL_DBCLKSRC_LIRC 0x00000010UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the internal 10 kHz */
sahilmgandhi 18:6a4db94011d3 70 #define GPIO_DBCTL_DBCLKSRC_HCLK 0x00000000UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the HCLK */
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 #define GPIO_DBCTL_DBCLKSEL_1 0x00000000UL /*!< GPIO_DBCTL setting for sampling cycle = 1 clocks */
sahilmgandhi 18:6a4db94011d3 73 #define GPIO_DBCTL_DBCLKSEL_2 0x00000001UL /*!< GPIO_DBCTL setting for sampling cycle = 2 clocks */
sahilmgandhi 18:6a4db94011d3 74 #define GPIO_DBCTL_DBCLKSEL_4 0x00000002UL /*!< GPIO_DBCTL setting for sampling cycle = 4 clocks */
sahilmgandhi 18:6a4db94011d3 75 #define GPIO_DBCTL_DBCLKSEL_8 0x00000003UL /*!< GPIO_DBCTL setting for sampling cycle = 8 clocks */
sahilmgandhi 18:6a4db94011d3 76 #define GPIO_DBCTL_DBCLKSEL_16 0x00000004UL /*!< GPIO_DBCTL setting for sampling cycle = 16 clocks */
sahilmgandhi 18:6a4db94011d3 77 #define GPIO_DBCTL_DBCLKSEL_32 0x00000005UL /*!< GPIO_DBCTL setting for sampling cycle = 32 clocks */
sahilmgandhi 18:6a4db94011d3 78 #define GPIO_DBCTL_DBCLKSEL_64 0x00000006UL /*!< GPIO_DBCTL setting for sampling cycle = 64 clocks */
sahilmgandhi 18:6a4db94011d3 79 #define GPIO_DBCTL_DBCLKSEL_128 0x00000007UL /*!< GPIO_DBCTL setting for sampling cycle = 128 clocks */
sahilmgandhi 18:6a4db94011d3 80 #define GPIO_DBCTL_DBCLKSEL_256 0x00000008UL /*!< GPIO_DBCTL setting for sampling cycle = 256 clocks */
sahilmgandhi 18:6a4db94011d3 81 #define GPIO_DBCTL_DBCLKSEL_512 0x00000009UL /*!< GPIO_DBCTL setting for sampling cycle = 512 clocks */
sahilmgandhi 18:6a4db94011d3 82 #define GPIO_DBCTL_DBCLKSEL_1024 0x0000000AUL /*!< GPIO_DBCTL setting for sampling cycle = 1024 clocks */
sahilmgandhi 18:6a4db94011d3 83 #define GPIO_DBCTL_DBCLKSEL_2048 0x0000000BUL /*!< GPIO_DBCTL setting for sampling cycle = 2048 clocks */
sahilmgandhi 18:6a4db94011d3 84 #define GPIO_DBCTL_DBCLKSEL_4096 0x0000000CUL /*!< GPIO_DBCTL setting for sampling cycle = 4096 clocks */
sahilmgandhi 18:6a4db94011d3 85 #define GPIO_DBCTL_DBCLKSEL_8192 0x0000000DUL /*!< GPIO_DBCTL setting for sampling cycle = 8192 clocks */
sahilmgandhi 18:6a4db94011d3 86 #define GPIO_DBCTL_DBCLKSEL_16384 0x0000000EUL /*!< GPIO_DBCTL setting for sampling cycle = 16384 clocks */
sahilmgandhi 18:6a4db94011d3 87 #define GPIO_DBCTL_DBCLKSEL_32768 0x0000000FUL /*!< GPIO_DBCTL setting for sampling cycle = 32768 clocks */
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 /* Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping.
sahilmgandhi 18:6a4db94011d3 91 Example 1:
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 PA0 = 1;
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 It is used to set GPIO PA.0 to high;
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 Example 2:
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 if (PA0)
sahilmgandhi 18:6a4db94011d3 100 PA0 = 0;
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 If GPIO PA.0 pin status is high, then set GPIO PA.0 data output to low.
sahilmgandhi 18:6a4db94011d3 103 */
sahilmgandhi 18:6a4db94011d3 104 #define GPIO_PIN_DATA(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x40*(port))) + ((pin)<<2))))
sahilmgandhi 18:6a4db94011d3 105 #define PA0 GPIO_PIN_DATA(0, 0 ) /*!< Specify PA.0 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 106 #define PA1 GPIO_PIN_DATA(0, 1 ) /*!< Specify PA.1 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 107 #define PA2 GPIO_PIN_DATA(0, 2 ) /*!< Specify PA.2 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 108 #define PA3 GPIO_PIN_DATA(0, 3 ) /*!< Specify PA.3 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 109 #define PA4 GPIO_PIN_DATA(0, 4 ) /*!< Specify PA.4 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 110 #define PA5 GPIO_PIN_DATA(0, 5 ) /*!< Specify PA.5 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 111 #define PA6 GPIO_PIN_DATA(0, 6 ) /*!< Specify PA.6 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 112 #define PA7 GPIO_PIN_DATA(0, 7 ) /*!< Specify PA.7 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 113 #define PA8 GPIO_PIN_DATA(0, 8 ) /*!< Specify PA.8 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 114 #define PA9 GPIO_PIN_DATA(0, 9 ) /*!< Specify PA.9 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 115 #define PA10 GPIO_PIN_DATA(0, 10) /*!< Specify PA.10 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 116 #define PA11 GPIO_PIN_DATA(0, 11) /*!< Specify PA.11 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 117 #define PA12 GPIO_PIN_DATA(0, 12) /*!< Specify PA.12 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 118 #define PA13 GPIO_PIN_DATA(0, 13) /*!< Specify PA.13 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 119 #define PA14 GPIO_PIN_DATA(0, 14) /*!< Specify PA.14 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 120 #define PA15 GPIO_PIN_DATA(0, 15) /*!< Specify PA.15 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 121 #define PB0 GPIO_PIN_DATA(1, 0 ) /*!< Specify PB.0 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 122 #define PB1 GPIO_PIN_DATA(1, 1 ) /*!< Specify PB.1 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 123 #define PB2 GPIO_PIN_DATA(1, 2 ) /*!< Specify PB.2 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 124 #define PB3 GPIO_PIN_DATA(1, 3 ) /*!< Specify PB.3 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 125 #define PB4 GPIO_PIN_DATA(1, 4 ) /*!< Specify PB.4 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 126 #define PB5 GPIO_PIN_DATA(1, 5 ) /*!< Specify PB.5 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 127 #define PB6 GPIO_PIN_DATA(1, 6 ) /*!< Specify PB.6 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 128 #define PB7 GPIO_PIN_DATA(1, 7 ) /*!< Specify PB.7 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 129 #define PB8 GPIO_PIN_DATA(1, 8 ) /*!< Specify PB.8 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 130 #define PB9 GPIO_PIN_DATA(1, 9 ) /*!< Specify PB.9 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 131 #define PB10 GPIO_PIN_DATA(1, 10) /*!< Specify PB.10 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 132 #define PB11 GPIO_PIN_DATA(1, 11) /*!< Specify PB.11 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 133 #define PB12 GPIO_PIN_DATA(1, 12) /*!< Specify PB.12 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 134 #define PB13 GPIO_PIN_DATA(1, 13) /*!< Specify PB.13 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 135 #define PB14 GPIO_PIN_DATA(1, 14) /*!< Specify PB.14 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 136 #define PB15 GPIO_PIN_DATA(1, 15) /*!< Specify PB.15 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 137 #define PC0 GPIO_PIN_DATA(2, 0 ) /*!< Specify PC.0 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 138 #define PC1 GPIO_PIN_DATA(2, 1 ) /*!< Specify PC.1 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 139 #define PC2 GPIO_PIN_DATA(2, 2 ) /*!< Specify PC.2 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 140 #define PC3 GPIO_PIN_DATA(2, 3 ) /*!< Specify PC.3 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 141 #define PC4 GPIO_PIN_DATA(2, 4 ) /*!< Specify PC.4 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 142 #define PC5 GPIO_PIN_DATA(2, 5 ) /*!< Specify PC.5 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 143 #define PC6 GPIO_PIN_DATA(2, 6 ) /*!< Specify PC.6 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 144 #define PC7 GPIO_PIN_DATA(2, 7 ) /*!< Specify PC.7 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 145 #define PC8 GPIO_PIN_DATA(2, 8 ) /*!< Specify PC.8 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 146 #define PC9 GPIO_PIN_DATA(2, 9 ) /*!< Specify PC.9 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 147 #define PC10 GPIO_PIN_DATA(2, 10) /*!< Specify PC.10 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 148 #define PC11 GPIO_PIN_DATA(2, 11) /*!< Specify PC.11 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 149 #define PC12 GPIO_PIN_DATA(2, 12) /*!< Specify PC.12 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 150 #define PC13 GPIO_PIN_DATA(2, 13) /*!< Specify PC.13 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 151 #define PC14 GPIO_PIN_DATA(2, 14) /*!< Specify PC.14 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 152 #define PC15 GPIO_PIN_DATA(2, 15) /*!< Specify PC.15 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 153 #define PD0 GPIO_PIN_DATA(3, 0 ) /*!< Specify PD.0 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 154 #define PD1 GPIO_PIN_DATA(3, 1 ) /*!< Specify PD.1 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 155 #define PD2 GPIO_PIN_DATA(3, 2 ) /*!< Specify PD.2 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 156 #define PD3 GPIO_PIN_DATA(3, 3 ) /*!< Specify PD.3 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 157 #define PD4 GPIO_PIN_DATA(3, 4 ) /*!< Specify PD.4 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 158 #define PD5 GPIO_PIN_DATA(3, 5 ) /*!< Specify PD.5 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 159 #define PD6 GPIO_PIN_DATA(3, 6 ) /*!< Specify PD.6 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 160 #define PD7 GPIO_PIN_DATA(3, 7 ) /*!< Specify PD.7 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 161 #define PD8 GPIO_PIN_DATA(3, 8 ) /*!< Specify PD.8 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 162 #define PD9 GPIO_PIN_DATA(3, 9 ) /*!< Specify PD.9 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 163 #define PD10 GPIO_PIN_DATA(3, 10) /*!< Specify PD.10 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 164 #define PD11 GPIO_PIN_DATA(3, 11) /*!< Specify PD.11 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 165 #define PD12 GPIO_PIN_DATA(3, 12) /*!< Specify PD.12 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 166 #define PD13 GPIO_PIN_DATA(3, 13) /*!< Specify PD.13 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 167 #define PD14 GPIO_PIN_DATA(3, 14) /*!< Specify PD.14 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 168 #define PD15 GPIO_PIN_DATA(3, 15) /*!< Specify PD.15 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 169 #define PE0 GPIO_PIN_DATA(4, 0 ) /*!< Specify PE.0 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 170 #define PE1 GPIO_PIN_DATA(4, 1 ) /*!< Specify PE.1 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 171 #define PE2 GPIO_PIN_DATA(4, 2 ) /*!< Specify PE.2 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 172 #define PE3 GPIO_PIN_DATA(4, 3 ) /*!< Specify PE.3 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 173 #define PE4 GPIO_PIN_DATA(4, 4 ) /*!< Specify PE.4 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 174 #define PE5 GPIO_PIN_DATA(4, 5 ) /*!< Specify PE.5 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 175 #define PE6 GPIO_PIN_DATA(4, 6 ) /*!< Specify PE.6 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 176 #define PE7 GPIO_PIN_DATA(4, 7 ) /*!< Specify PE.7 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 177 #define PE8 GPIO_PIN_DATA(4, 8 ) /*!< Specify PE.8 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 178 #define PE9 GPIO_PIN_DATA(4, 9 ) /*!< Specify PE.9 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 179 #define PE10 GPIO_PIN_DATA(4, 10) /*!< Specify PE.10 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 180 #define PE11 GPIO_PIN_DATA(4, 11) /*!< Specify PE.11 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 181 #define PE12 GPIO_PIN_DATA(4, 12) /*!< Specify PE.12 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 182 #define PE13 GPIO_PIN_DATA(4, 13) /*!< Specify PE.13 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 183 #define PE14 GPIO_PIN_DATA(4, 14) /*!< Specify PE.14 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 184 #define PF0 GPIO_PIN_DATA(5, 0 ) /*!< Specify PF.0 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 185 #define PF1 GPIO_PIN_DATA(5, 1 ) /*!< Specify PF.1 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 186 #define PF2 GPIO_PIN_DATA(5, 2 ) /*!< Specify PF.2 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 187 #define PF3 GPIO_PIN_DATA(5, 3 ) /*!< Specify PF.3 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 188 #define PF4 GPIO_PIN_DATA(5, 4 ) /*!< Specify PF.4 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 189 #define PF5 GPIO_PIN_DATA(5, 5 ) /*!< Specify PF.5 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 190 #define PF6 GPIO_PIN_DATA(5, 6 ) /*!< Specify PF.6 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 191 #define PF7 GPIO_PIN_DATA(5, 7 ) /*!< Specify PF.7 Pin Data Input/Output */
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /*@}*/ /* end of group GPIO_EXPORTED_CONSTANTS */
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196
sahilmgandhi 18:6a4db94011d3 197 /** @addtogroup GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions
sahilmgandhi 18:6a4db94011d3 198 @{
sahilmgandhi 18:6a4db94011d3 199 */
sahilmgandhi 18:6a4db94011d3 200
sahilmgandhi 18:6a4db94011d3 201 /**
sahilmgandhi 18:6a4db94011d3 202 * @brief Clear GPIO Pin Interrupt Flag
sahilmgandhi 18:6a4db94011d3 203 *
sahilmgandhi 18:6a4db94011d3 204 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 205 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 206 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
sahilmgandhi 18:6a4db94011d3 207 * It could be BIT0 ~ BIT14 for PE.
sahilmgandhi 18:6a4db94011d3 208 * It could be BIT0 ~ BIT7 for PF.
sahilmgandhi 18:6a4db94011d3 209 *
sahilmgandhi 18:6a4db94011d3 210 * @return None
sahilmgandhi 18:6a4db94011d3 211 *
sahilmgandhi 18:6a4db94011d3 212 * @details Clear the interrupt status of specified GPIO pin.
sahilmgandhi 18:6a4db94011d3 213 */
sahilmgandhi 18:6a4db94011d3 214 #define GPIO_CLR_INT_FLAG(port, u32PinMask) ((port)->INTSRC = (u32PinMask))
sahilmgandhi 18:6a4db94011d3 215
sahilmgandhi 18:6a4db94011d3 216 /**
sahilmgandhi 18:6a4db94011d3 217 * @brief Disable Pin De-bounce Function
sahilmgandhi 18:6a4db94011d3 218 *
sahilmgandhi 18:6a4db94011d3 219 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 220 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 221 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
sahilmgandhi 18:6a4db94011d3 222 * It could be BIT0 ~ BIT14 for PE.
sahilmgandhi 18:6a4db94011d3 223 * It could be BIT0 ~ BIT7 for PF.
sahilmgandhi 18:6a4db94011d3 224 *
sahilmgandhi 18:6a4db94011d3 225 * @return None
sahilmgandhi 18:6a4db94011d3 226 *
sahilmgandhi 18:6a4db94011d3 227 * @details Disable the interrupt de-bounce function of specified GPIO pin.
sahilmgandhi 18:6a4db94011d3 228 */
sahilmgandhi 18:6a4db94011d3 229 #define GPIO_DISABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN &= ~(u32PinMask))
sahilmgandhi 18:6a4db94011d3 230
sahilmgandhi 18:6a4db94011d3 231 /**
sahilmgandhi 18:6a4db94011d3 232 * @brief Enable Pin De-bounce Function
sahilmgandhi 18:6a4db94011d3 233 *
sahilmgandhi 18:6a4db94011d3 234 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 235 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 236 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
sahilmgandhi 18:6a4db94011d3 237 * It could be BIT0 ~ BIT14 for PE.
sahilmgandhi 18:6a4db94011d3 238 * It could be BIT0 ~ BIT7 for PF.
sahilmgandhi 18:6a4db94011d3 239 * @return None
sahilmgandhi 18:6a4db94011d3 240 *
sahilmgandhi 18:6a4db94011d3 241 * @details Enable the interrupt de-bounce function of specified GPIO pin.
sahilmgandhi 18:6a4db94011d3 242 */
sahilmgandhi 18:6a4db94011d3 243 #define GPIO_ENABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN |= (u32PinMask))
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 /**
sahilmgandhi 18:6a4db94011d3 246 * @brief Disable I/O Digital Input Path
sahilmgandhi 18:6a4db94011d3 247 *
sahilmgandhi 18:6a4db94011d3 248 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 249 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 250 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
sahilmgandhi 18:6a4db94011d3 251 * It could be BIT0 ~ BIT14 for PE.
sahilmgandhi 18:6a4db94011d3 252 * It could be BIT0 ~ BIT7 for PF.
sahilmgandhi 18:6a4db94011d3 253 *
sahilmgandhi 18:6a4db94011d3 254 * @return None
sahilmgandhi 18:6a4db94011d3 255 *
sahilmgandhi 18:6a4db94011d3 256 * @details Disable I/O digital input path of specified GPIO pin.
sahilmgandhi 18:6a4db94011d3 257 */
sahilmgandhi 18:6a4db94011d3 258 #define GPIO_DISABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF |= ((u32PinMask)<<16))
sahilmgandhi 18:6a4db94011d3 259
sahilmgandhi 18:6a4db94011d3 260 /**
sahilmgandhi 18:6a4db94011d3 261 * @brief Enable I/O Digital Input Path
sahilmgandhi 18:6a4db94011d3 262 *
sahilmgandhi 18:6a4db94011d3 263 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 264 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 265 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
sahilmgandhi 18:6a4db94011d3 266 * It could be BIT0 ~ BIT14 for PE.
sahilmgandhi 18:6a4db94011d3 267 * It could be BIT0 ~ BIT7 for PF.
sahilmgandhi 18:6a4db94011d3 268 *
sahilmgandhi 18:6a4db94011d3 269 * @return None
sahilmgandhi 18:6a4db94011d3 270 *
sahilmgandhi 18:6a4db94011d3 271 * @details Enable I/O digital input path of specified GPIO pin.
sahilmgandhi 18:6a4db94011d3 272 */
sahilmgandhi 18:6a4db94011d3 273 #define GPIO_ENABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF &= ~((u32PinMask)<<16))
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 /**
sahilmgandhi 18:6a4db94011d3 276 * @brief Disable I/O DOUT mask
sahilmgandhi 18:6a4db94011d3 277 *
sahilmgandhi 18:6a4db94011d3 278 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 279 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 280 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
sahilmgandhi 18:6a4db94011d3 281 * It could be BIT0 ~ BIT14 for PE.
sahilmgandhi 18:6a4db94011d3 282 * It could be BIT0 ~ BIT7 for PF.
sahilmgandhi 18:6a4db94011d3 283 *
sahilmgandhi 18:6a4db94011d3 284 * @return None
sahilmgandhi 18:6a4db94011d3 285 *
sahilmgandhi 18:6a4db94011d3 286 * @details Disable I/O DOUT mask of specified GPIO pin.
sahilmgandhi 18:6a4db94011d3 287 */
sahilmgandhi 18:6a4db94011d3 288 #define GPIO_DISABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK &= ~(u32PinMask))
sahilmgandhi 18:6a4db94011d3 289
sahilmgandhi 18:6a4db94011d3 290 /**
sahilmgandhi 18:6a4db94011d3 291 * @brief Enable I/O DOUT mask
sahilmgandhi 18:6a4db94011d3 292 *
sahilmgandhi 18:6a4db94011d3 293 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 294 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 295 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
sahilmgandhi 18:6a4db94011d3 296 * It could be BIT0 ~ BIT14 for PE.
sahilmgandhi 18:6a4db94011d3 297 * It could be BIT0 ~ BIT7 for PF.
sahilmgandhi 18:6a4db94011d3 298 *
sahilmgandhi 18:6a4db94011d3 299 * @return None
sahilmgandhi 18:6a4db94011d3 300 *
sahilmgandhi 18:6a4db94011d3 301 * @details Enable I/O DOUT mask of specified GPIO pin.
sahilmgandhi 18:6a4db94011d3 302 */
sahilmgandhi 18:6a4db94011d3 303 #define GPIO_ENABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK |= (u32PinMask))
sahilmgandhi 18:6a4db94011d3 304
sahilmgandhi 18:6a4db94011d3 305 /**
sahilmgandhi 18:6a4db94011d3 306 * @brief Get GPIO Pin Interrupt Flag
sahilmgandhi 18:6a4db94011d3 307 *
sahilmgandhi 18:6a4db94011d3 308 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 309 * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 310 * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
sahilmgandhi 18:6a4db94011d3 311 * It could be BIT0 ~ BIT14 for PE.
sahilmgandhi 18:6a4db94011d3 312 * It could be BIT0 ~ BIT7 for PF.
sahilmgandhi 18:6a4db94011d3 313 *
sahilmgandhi 18:6a4db94011d3 314 * @retval 0 No interrupt at specified GPIO pin
sahilmgandhi 18:6a4db94011d3 315 * @retval 1 The specified GPIO pin generate an interrupt
sahilmgandhi 18:6a4db94011d3 316 *
sahilmgandhi 18:6a4db94011d3 317 * @details Get the interrupt status of specified GPIO pin.
sahilmgandhi 18:6a4db94011d3 318 */
sahilmgandhi 18:6a4db94011d3 319 #define GPIO_GET_INT_FLAG(port, u32PinMask) ((port)->INTSRC & (u32PinMask))
sahilmgandhi 18:6a4db94011d3 320
sahilmgandhi 18:6a4db94011d3 321 /**
sahilmgandhi 18:6a4db94011d3 322 * @brief Set De-bounce Sampling Cycle Time
sahilmgandhi 18:6a4db94011d3 323 *
sahilmgandhi 18:6a4db94011d3 324 * @param[in] u32ClkSrc The de-bounce counter clock source. It could be GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC.
sahilmgandhi 18:6a4db94011d3 325 * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be
sahilmgandhi 18:6a4db94011d3 326 * - \ref GPIO_DBCTL_DBCLKSEL_1
sahilmgandhi 18:6a4db94011d3 327 * - \ref GPIO_DBCTL_DBCLKSEL_2
sahilmgandhi 18:6a4db94011d3 328 * - \ref GPIO_DBCTL_DBCLKSEL_4
sahilmgandhi 18:6a4db94011d3 329 * - \ref GPIO_DBCTL_DBCLKSEL_8
sahilmgandhi 18:6a4db94011d3 330 * - \ref GPIO_DBCTL_DBCLKSEL_16
sahilmgandhi 18:6a4db94011d3 331 * - \ref GPIO_DBCTL_DBCLKSEL_32
sahilmgandhi 18:6a4db94011d3 332 * - \ref GPIO_DBCTL_DBCLKSEL_64
sahilmgandhi 18:6a4db94011d3 333 * - \ref GPIO_DBCTL_DBCLKSEL_128
sahilmgandhi 18:6a4db94011d3 334 * - \ref GPIO_DBCTL_DBCLKSEL_256
sahilmgandhi 18:6a4db94011d3 335 * - \ref GPIO_DBCTL_DBCLKSEL_512
sahilmgandhi 18:6a4db94011d3 336 * - \ref GPIO_DBCTL_DBCLKSEL_1024
sahilmgandhi 18:6a4db94011d3 337 * - \ref GPIO_DBCTL_DBCLKSEL_2048
sahilmgandhi 18:6a4db94011d3 338 * - \ref GPIO_DBCTL_DBCLKSEL_4096
sahilmgandhi 18:6a4db94011d3 339 * - \ref GPIO_DBCTL_DBCLKSEL_8192
sahilmgandhi 18:6a4db94011d3 340 * - \ref GPIO_DBCTL_DBCLKSEL_16384
sahilmgandhi 18:6a4db94011d3 341 * - \ref GPIO_DBCTL_DBCLKSEL_32768
sahilmgandhi 18:6a4db94011d3 342 *
sahilmgandhi 18:6a4db94011d3 343 * @return None
sahilmgandhi 18:6a4db94011d3 344 *
sahilmgandhi 18:6a4db94011d3 345 * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n
sahilmgandhi 18:6a4db94011d3 346 * Example: _GPIO_SET_DEBOUNCE_TIME(GPIO_DBCTL_DBCLKSRC_LIRC, GPIO_DBCTL_DBCLKSEL_4). \n
sahilmgandhi 18:6a4db94011d3 347 * It's meaning the De-debounce counter clock source is internal 10 KHz and sampling cycle selection is 4. \n
sahilmgandhi 18:6a4db94011d3 348 * Then the target de-bounce sampling cycle time is (4)*(1/(10*1000)) s = 4*0.0001 s = 400 us,
sahilmgandhi 18:6a4db94011d3 349 * and system will sampling interrupt input once per 00 us.
sahilmgandhi 18:6a4db94011d3 350 */
sahilmgandhi 18:6a4db94011d3 351 #define GPIO_SET_DEBOUNCE_TIME(u32ClkSrc, u32ClkSel) (GPIO->DBCTL = (GPIO_DBCTL_ICLKON_Msk | (u32ClkSrc) | (u32ClkSel)))
sahilmgandhi 18:6a4db94011d3 352
sahilmgandhi 18:6a4db94011d3 353 /**
sahilmgandhi 18:6a4db94011d3 354 * @brief Get GPIO Port IN Data
sahilmgandhi 18:6a4db94011d3 355 *
sahilmgandhi 18:6a4db94011d3 356 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 357 *
sahilmgandhi 18:6a4db94011d3 358 * @return The specified port data
sahilmgandhi 18:6a4db94011d3 359 *
sahilmgandhi 18:6a4db94011d3 360 * @details Get the PIN register of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 361 */
sahilmgandhi 18:6a4db94011d3 362 #define GPIO_GET_IN_DATA(port) ((port)->PIN)
sahilmgandhi 18:6a4db94011d3 363
sahilmgandhi 18:6a4db94011d3 364 /**
sahilmgandhi 18:6a4db94011d3 365 * @brief Set GPIO Port OUT Data
sahilmgandhi 18:6a4db94011d3 366 *
sahilmgandhi 18:6a4db94011d3 367 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 368 * @param[in] u32Data GPIO port data.
sahilmgandhi 18:6a4db94011d3 369 *
sahilmgandhi 18:6a4db94011d3 370 * @return None
sahilmgandhi 18:6a4db94011d3 371 *
sahilmgandhi 18:6a4db94011d3 372 * @details Set the Data into specified GPIO port.
sahilmgandhi 18:6a4db94011d3 373 */
sahilmgandhi 18:6a4db94011d3 374 #define GPIO_SET_OUT_DATA(port, u32Data) ((port)->DOUT = (u32Data))
sahilmgandhi 18:6a4db94011d3 375
sahilmgandhi 18:6a4db94011d3 376 /**
sahilmgandhi 18:6a4db94011d3 377 * @brief Toggle Specified GPIO pin
sahilmgandhi 18:6a4db94011d3 378 *
sahilmgandhi 18:6a4db94011d3 379 * @param[in] u32Pin Pxy
sahilmgandhi 18:6a4db94011d3 380 *
sahilmgandhi 18:6a4db94011d3 381 * @return None
sahilmgandhi 18:6a4db94011d3 382 *
sahilmgandhi 18:6a4db94011d3 383 * @details Toggle the specified GPIO pint.
sahilmgandhi 18:6a4db94011d3 384 */
sahilmgandhi 18:6a4db94011d3 385 #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1)
sahilmgandhi 18:6a4db94011d3 386
sahilmgandhi 18:6a4db94011d3 387
sahilmgandhi 18:6a4db94011d3 388 /**
sahilmgandhi 18:6a4db94011d3 389 * @brief Enable External GPIO interrupt
sahilmgandhi 18:6a4db94011d3 390 *
sahilmgandhi 18:6a4db94011d3 391 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 392 * @param[in] u32Pin The pin of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 393 * It could be 0 ~ 15 for PA, PB, PC and PD GPIO port.
sahilmgandhi 18:6a4db94011d3 394 * It could be 0 ~ 14 for PE GPIO port.
sahilmgandhi 18:6a4db94011d3 395 * It could be 0 ~ 7 for PF GPIO port.
sahilmgandhi 18:6a4db94011d3 396 * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n
sahilmgandhi 18:6a4db94011d3 397 * GPIO_INT_RISING, GPIO_INT_FALLING, GPIO_INT_BOTH_EDGE, GPIO_INT_HIGH, GPIO_INT_LOW.
sahilmgandhi 18:6a4db94011d3 398 *
sahilmgandhi 18:6a4db94011d3 399 * @return None
sahilmgandhi 18:6a4db94011d3 400 *
sahilmgandhi 18:6a4db94011d3 401 * @details This function is used to enable specified GPIO pin interrupt.
sahilmgandhi 18:6a4db94011d3 402 */
sahilmgandhi 18:6a4db94011d3 403 #define GPIO_EnableEINT GPIO_EnableInt
sahilmgandhi 18:6a4db94011d3 404
sahilmgandhi 18:6a4db94011d3 405 /**
sahilmgandhi 18:6a4db94011d3 406 * @brief Disable External GPIO interrupt
sahilmgandhi 18:6a4db94011d3 407 *
sahilmgandhi 18:6a4db94011d3 408 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
sahilmgandhi 18:6a4db94011d3 409 * @param[in] u32Pin The pin of specified GPIO port.
sahilmgandhi 18:6a4db94011d3 410 * It could be 0 ~ 15 for PA, PB, PC and PD GPIO port.
sahilmgandhi 18:6a4db94011d3 411 * It could be 0 ~ 14 for PE GPIO port.
sahilmgandhi 18:6a4db94011d3 412 * It could be 0 ~ 7 for PF GPIO port.
sahilmgandhi 18:6a4db94011d3 413 *
sahilmgandhi 18:6a4db94011d3 414 * @return None
sahilmgandhi 18:6a4db94011d3 415 *
sahilmgandhi 18:6a4db94011d3 416 * @details This function is used to enable specified GPIO pin interrupt.
sahilmgandhi 18:6a4db94011d3 417 */
sahilmgandhi 18:6a4db94011d3 418 #define GPIO_DisableEINT GPIO_DisableInt
sahilmgandhi 18:6a4db94011d3 419
sahilmgandhi 18:6a4db94011d3 420
sahilmgandhi 18:6a4db94011d3 421 void GPIO_SetMode(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode);
sahilmgandhi 18:6a4db94011d3 422 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs);
sahilmgandhi 18:6a4db94011d3 423 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin);
sahilmgandhi 18:6a4db94011d3 424
sahilmgandhi 18:6a4db94011d3 425
sahilmgandhi 18:6a4db94011d3 426 /*@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 427
sahilmgandhi 18:6a4db94011d3 428 /*@}*/ /* end of group GPIO_Driver */
sahilmgandhi 18:6a4db94011d3 429
sahilmgandhi 18:6a4db94011d3 430 /*@}*/ /* end of group Standard_Driver */
sahilmgandhi 18:6a4db94011d3 431
sahilmgandhi 18:6a4db94011d3 432
sahilmgandhi 18:6a4db94011d3 433 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 434 }
sahilmgandhi 18:6a4db94011d3 435 #endif
sahilmgandhi 18:6a4db94011d3 436
sahilmgandhi 18:6a4db94011d3 437 #endif // __GPIO_H__
sahilmgandhi 18:6a4db94011d3 438
sahilmgandhi 18:6a4db94011d3 439 /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/