MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_fmc.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file fmc.c
sahilmgandhi 18:6a4db94011d3 3 * @version V3.00
sahilmgandhi 18:6a4db94011d3 4 * $Revision: 7 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 15/08/11 10:26a $
sahilmgandhi 18:6a4db94011d3 6 * @brief M451 series FMC driver source file
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 11
sahilmgandhi 18:6a4db94011d3 12 //* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 13 #include <stdio.h>
sahilmgandhi 18:6a4db94011d3 14 #include "M451Series.h"
sahilmgandhi 18:6a4db94011d3 15
sahilmgandhi 18:6a4db94011d3 16 /** @addtogroup Standard_Driver Standard Driver
sahilmgandhi 18:6a4db94011d3 17 @{
sahilmgandhi 18:6a4db94011d3 18 */
sahilmgandhi 18:6a4db94011d3 19
sahilmgandhi 18:6a4db94011d3 20 /** @addtogroup FMC_Driver FMC Driver
sahilmgandhi 18:6a4db94011d3 21 @{
sahilmgandhi 18:6a4db94011d3 22 */
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 /** @addtogroup FMC_EXPORTED_FUNCTIONS FMC Exported Functions
sahilmgandhi 18:6a4db94011d3 26 @{
sahilmgandhi 18:6a4db94011d3 27 */
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29
sahilmgandhi 18:6a4db94011d3 30 /**
sahilmgandhi 18:6a4db94011d3 31 * @brief Set boot source from LDROM or APROM after next software reset
sahilmgandhi 18:6a4db94011d3 32 *
sahilmgandhi 18:6a4db94011d3 33 * @param[in] i32BootSrc
sahilmgandhi 18:6a4db94011d3 34 * 1: Boot from LDROM,
sahilmgandhi 18:6a4db94011d3 35 * 0: Boot from APROM
sahilmgandhi 18:6a4db94011d3 36 *
sahilmgandhi 18:6a4db94011d3 37 * @return None
sahilmgandhi 18:6a4db94011d3 38 *
sahilmgandhi 18:6a4db94011d3 39 * @details This function is used to switch APROM boot or LDROM boot. User need to call
sahilmgandhi 18:6a4db94011d3 40 * FMC_SetBootSource to select boot source first, then use CPU reset or
sahilmgandhi 18:6a4db94011d3 41 * System Reset Request to reset system.
sahilmgandhi 18:6a4db94011d3 42 *
sahilmgandhi 18:6a4db94011d3 43 */
sahilmgandhi 18:6a4db94011d3 44 void FMC_SetBootSource(int32_t i32BootSrc)
sahilmgandhi 18:6a4db94011d3 45 {
sahilmgandhi 18:6a4db94011d3 46 if(i32BootSrc)
sahilmgandhi 18:6a4db94011d3 47 FMC->ISPCTL |= FMC_ISPCTL_BS_Msk; /* Boot from LDROM */
sahilmgandhi 18:6a4db94011d3 48 else
sahilmgandhi 18:6a4db94011d3 49 FMC->ISPCTL &= ~FMC_ISPCTL_BS_Msk;/* Boot from APROM */
sahilmgandhi 18:6a4db94011d3 50 }
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /**
sahilmgandhi 18:6a4db94011d3 54 * @brief Disable ISP Functions
sahilmgandhi 18:6a4db94011d3 55 *
sahilmgandhi 18:6a4db94011d3 56 * @param None
sahilmgandhi 18:6a4db94011d3 57 *
sahilmgandhi 18:6a4db94011d3 58 * @return None
sahilmgandhi 18:6a4db94011d3 59 *
sahilmgandhi 18:6a4db94011d3 60 * @details This function will clear ISPEN bit of ISPCTL to disable ISP function
sahilmgandhi 18:6a4db94011d3 61 *
sahilmgandhi 18:6a4db94011d3 62 */
sahilmgandhi 18:6a4db94011d3 63 void FMC_Close(void)
sahilmgandhi 18:6a4db94011d3 64 {
sahilmgandhi 18:6a4db94011d3 65 FMC->ISPCTL &= ~FMC_ISPCTL_ISPEN_Msk;
sahilmgandhi 18:6a4db94011d3 66 }
sahilmgandhi 18:6a4db94011d3 67
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 /**
sahilmgandhi 18:6a4db94011d3 70 * @brief Disable APROM update function
sahilmgandhi 18:6a4db94011d3 71 *
sahilmgandhi 18:6a4db94011d3 72 * @param None
sahilmgandhi 18:6a4db94011d3 73 *
sahilmgandhi 18:6a4db94011d3 74 * @return None
sahilmgandhi 18:6a4db94011d3 75 *
sahilmgandhi 18:6a4db94011d3 76 * @details Disable APROM update function will forbid APROM programming when boot form APROM.
sahilmgandhi 18:6a4db94011d3 77 * APROM update is default to be disable.
sahilmgandhi 18:6a4db94011d3 78 *
sahilmgandhi 18:6a4db94011d3 79 */
sahilmgandhi 18:6a4db94011d3 80 void FMC_DisableAPUpdate(void)
sahilmgandhi 18:6a4db94011d3 81 {
sahilmgandhi 18:6a4db94011d3 82 FMC->ISPCTL &= ~FMC_ISPCTL_APUEN_Msk;
sahilmgandhi 18:6a4db94011d3 83 }
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 /**
sahilmgandhi 18:6a4db94011d3 87 * @brief Disable User Configuration update function
sahilmgandhi 18:6a4db94011d3 88 *
sahilmgandhi 18:6a4db94011d3 89 * @param None
sahilmgandhi 18:6a4db94011d3 90 *
sahilmgandhi 18:6a4db94011d3 91 * @return None
sahilmgandhi 18:6a4db94011d3 92 *
sahilmgandhi 18:6a4db94011d3 93 * @details Disable User Configuration update function will forbid User Configuration programming.
sahilmgandhi 18:6a4db94011d3 94 * User Configuration update is default to be disable.
sahilmgandhi 18:6a4db94011d3 95 */
sahilmgandhi 18:6a4db94011d3 96 void FMC_DisableConfigUpdate(void)
sahilmgandhi 18:6a4db94011d3 97 {
sahilmgandhi 18:6a4db94011d3 98 FMC->ISPCTL &= ~FMC_ISPCTL_CFGUEN_Msk;
sahilmgandhi 18:6a4db94011d3 99 }
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 /**
sahilmgandhi 18:6a4db94011d3 103 * @brief Disable LDROM update function
sahilmgandhi 18:6a4db94011d3 104 *
sahilmgandhi 18:6a4db94011d3 105 * @param None
sahilmgandhi 18:6a4db94011d3 106 *
sahilmgandhi 18:6a4db94011d3 107 * @return None
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 * @details Disable LDROM update function will forbid LDROM programming.
sahilmgandhi 18:6a4db94011d3 110 * LDROM update is default to be disable.
sahilmgandhi 18:6a4db94011d3 111 */
sahilmgandhi 18:6a4db94011d3 112 void FMC_DisableLDUpdate(void)
sahilmgandhi 18:6a4db94011d3 113 {
sahilmgandhi 18:6a4db94011d3 114 FMC->ISPCTL &= ~FMC_ISPCTL_LDUEN_Msk;
sahilmgandhi 18:6a4db94011d3 115 }
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 /**
sahilmgandhi 18:6a4db94011d3 119 * @brief Enable APROM update function
sahilmgandhi 18:6a4db94011d3 120 *
sahilmgandhi 18:6a4db94011d3 121 * @param None
sahilmgandhi 18:6a4db94011d3 122 *
sahilmgandhi 18:6a4db94011d3 123 * @return None
sahilmgandhi 18:6a4db94011d3 124 *
sahilmgandhi 18:6a4db94011d3 125 * @details Enable APROM to be able to program when boot from APROM.
sahilmgandhi 18:6a4db94011d3 126 *
sahilmgandhi 18:6a4db94011d3 127 */
sahilmgandhi 18:6a4db94011d3 128 void FMC_EnableAPUpdate(void)
sahilmgandhi 18:6a4db94011d3 129 {
sahilmgandhi 18:6a4db94011d3 130 FMC->ISPCTL |= FMC_ISPCTL_APUEN_Msk;
sahilmgandhi 18:6a4db94011d3 131 }
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 /**
sahilmgandhi 18:6a4db94011d3 135 * @brief Enable User Configuration update function
sahilmgandhi 18:6a4db94011d3 136 *
sahilmgandhi 18:6a4db94011d3 137 * @param None
sahilmgandhi 18:6a4db94011d3 138 *
sahilmgandhi 18:6a4db94011d3 139 * @return None
sahilmgandhi 18:6a4db94011d3 140 *
sahilmgandhi 18:6a4db94011d3 141 * @details Enable User Configuration to be able to program.
sahilmgandhi 18:6a4db94011d3 142 *
sahilmgandhi 18:6a4db94011d3 143 */
sahilmgandhi 18:6a4db94011d3 144 void FMC_EnableConfigUpdate(void)
sahilmgandhi 18:6a4db94011d3 145 {
sahilmgandhi 18:6a4db94011d3 146 FMC->ISPCTL |= FMC_ISPCTL_CFGUEN_Msk;
sahilmgandhi 18:6a4db94011d3 147 }
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 /**
sahilmgandhi 18:6a4db94011d3 151 * @brief Enable LDROM update function
sahilmgandhi 18:6a4db94011d3 152 *
sahilmgandhi 18:6a4db94011d3 153 * @param None
sahilmgandhi 18:6a4db94011d3 154 *
sahilmgandhi 18:6a4db94011d3 155 * @return None
sahilmgandhi 18:6a4db94011d3 156 *
sahilmgandhi 18:6a4db94011d3 157 * @details Enable LDROM to be able to program.
sahilmgandhi 18:6a4db94011d3 158 *
sahilmgandhi 18:6a4db94011d3 159 */
sahilmgandhi 18:6a4db94011d3 160 void FMC_EnableLDUpdate(void)
sahilmgandhi 18:6a4db94011d3 161 {
sahilmgandhi 18:6a4db94011d3 162 FMC->ISPCTL |= FMC_ISPCTL_LDUEN_Msk;
sahilmgandhi 18:6a4db94011d3 163 }
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 /**
sahilmgandhi 18:6a4db94011d3 167 * @brief Get the current boot source
sahilmgandhi 18:6a4db94011d3 168 *
sahilmgandhi 18:6a4db94011d3 169 * @param None
sahilmgandhi 18:6a4db94011d3 170 *
sahilmgandhi 18:6a4db94011d3 171 * @retval 0 This chip is currently booting from APROM
sahilmgandhi 18:6a4db94011d3 172 * @retval 1 This chip is currently booting from LDROM
sahilmgandhi 18:6a4db94011d3 173 *
sahilmgandhi 18:6a4db94011d3 174 * @note This function only show the boot source.
sahilmgandhi 18:6a4db94011d3 175 * User need to read ISPSTA register to know if IAP mode supported or not in relative boot.
sahilmgandhi 18:6a4db94011d3 176 */
sahilmgandhi 18:6a4db94011d3 177 int32_t FMC_GetBootSource(void)
sahilmgandhi 18:6a4db94011d3 178 {
sahilmgandhi 18:6a4db94011d3 179 if(FMC->ISPCTL & FMC_ISPCTL_BS_Msk)
sahilmgandhi 18:6a4db94011d3 180 return 1;
sahilmgandhi 18:6a4db94011d3 181 else
sahilmgandhi 18:6a4db94011d3 182 return 0;
sahilmgandhi 18:6a4db94011d3 183 }
sahilmgandhi 18:6a4db94011d3 184
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 /**
sahilmgandhi 18:6a4db94011d3 187 * @brief Enable FMC ISP function
sahilmgandhi 18:6a4db94011d3 188 *
sahilmgandhi 18:6a4db94011d3 189 * @param None
sahilmgandhi 18:6a4db94011d3 190 *
sahilmgandhi 18:6a4db94011d3 191 * @return None
sahilmgandhi 18:6a4db94011d3 192 *
sahilmgandhi 18:6a4db94011d3 193 * @details ISPEN bit of ISPCTL must be set before we can use ISP commands.
sahilmgandhi 18:6a4db94011d3 194 * Therefore, To use all FMC function APIs, user needs to call FMC_Open() first to enable ISP functions.
sahilmgandhi 18:6a4db94011d3 195 *
sahilmgandhi 18:6a4db94011d3 196 * @note ISP functions are write-protected. user also needs to unlock it by calling SYS_UnlockReg() before using all ISP functions.
sahilmgandhi 18:6a4db94011d3 197 *
sahilmgandhi 18:6a4db94011d3 198 */
sahilmgandhi 18:6a4db94011d3 199 void FMC_Open(void)
sahilmgandhi 18:6a4db94011d3 200 {
sahilmgandhi 18:6a4db94011d3 201 FMC->ISPCTL |= FMC_ISPCTL_ISPEN_Msk;
sahilmgandhi 18:6a4db94011d3 202 }
sahilmgandhi 18:6a4db94011d3 203
sahilmgandhi 18:6a4db94011d3 204 /**
sahilmgandhi 18:6a4db94011d3 205 * @brief Get the base address of Data Flash if enabled.
sahilmgandhi 18:6a4db94011d3 206 *
sahilmgandhi 18:6a4db94011d3 207 * @param None
sahilmgandhi 18:6a4db94011d3 208 *
sahilmgandhi 18:6a4db94011d3 209 * @return The base address of Data Flash
sahilmgandhi 18:6a4db94011d3 210 *
sahilmgandhi 18:6a4db94011d3 211 * @details This function is used to return the base address of Data Flash.
sahilmgandhi 18:6a4db94011d3 212 *
sahilmgandhi 18:6a4db94011d3 213 */
sahilmgandhi 18:6a4db94011d3 214 uint32_t FMC_ReadDataFlashBaseAddr(void)
sahilmgandhi 18:6a4db94011d3 215 {
sahilmgandhi 18:6a4db94011d3 216 return FMC->DFBA;
sahilmgandhi 18:6a4db94011d3 217 }
sahilmgandhi 18:6a4db94011d3 218
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 /**
sahilmgandhi 18:6a4db94011d3 221 * @brief Read the User Configuration words.
sahilmgandhi 18:6a4db94011d3 222 *
sahilmgandhi 18:6a4db94011d3 223 * @param[out] u32Config The word buffer to store the User Configuration data.
sahilmgandhi 18:6a4db94011d3 224 * @param[in] u32Count The word count to be read.
sahilmgandhi 18:6a4db94011d3 225 *
sahilmgandhi 18:6a4db94011d3 226 * @retval 0 Success
sahilmgandhi 18:6a4db94011d3 227 * @retval -1 Failed
sahilmgandhi 18:6a4db94011d3 228 *
sahilmgandhi 18:6a4db94011d3 229 * @details This function is used to read the settings of user configuration.
sahilmgandhi 18:6a4db94011d3 230 * if u32Count = 1, Only CONFIG0 will be returned to the buffer specified by u32Config.
sahilmgandhi 18:6a4db94011d3 231 * if u32Count = 2, Both CONFIG0 and CONFIG1 will be returned.
sahilmgandhi 18:6a4db94011d3 232 */
sahilmgandhi 18:6a4db94011d3 233 int32_t FMC_ReadConfig(uint32_t *u32Config, uint32_t u32Count)
sahilmgandhi 18:6a4db94011d3 234 {
sahilmgandhi 18:6a4db94011d3 235 int32_t i;
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 for(i = 0; i < u32Count; i++)
sahilmgandhi 18:6a4db94011d3 238 u32Config[i] = FMC_Read(FMC_CONFIG_BASE + i * 4);
sahilmgandhi 18:6a4db94011d3 239
sahilmgandhi 18:6a4db94011d3 240 return 0;
sahilmgandhi 18:6a4db94011d3 241 }
sahilmgandhi 18:6a4db94011d3 242
sahilmgandhi 18:6a4db94011d3 243
sahilmgandhi 18:6a4db94011d3 244 /**
sahilmgandhi 18:6a4db94011d3 245 * @brief Write User Configuration
sahilmgandhi 18:6a4db94011d3 246 *
sahilmgandhi 18:6a4db94011d3 247 * @param[in] u32Config The word buffer to store the User Configuration data.
sahilmgandhi 18:6a4db94011d3 248 * @param[in] u32Count The word count to program to User Configuration.
sahilmgandhi 18:6a4db94011d3 249 *
sahilmgandhi 18:6a4db94011d3 250 * @retval 0 Success
sahilmgandhi 18:6a4db94011d3 251 * @retval -1 Failed
sahilmgandhi 18:6a4db94011d3 252 *
sahilmgandhi 18:6a4db94011d3 253 * @details User must enable User Configuration update before writing it.
sahilmgandhi 18:6a4db94011d3 254 * User must erase User Configuration before writing it.
sahilmgandhi 18:6a4db94011d3 255 * User Configuration is also be page erase. User needs to backup necessary data
sahilmgandhi 18:6a4db94011d3 256 * before erase User Configuration.
sahilmgandhi 18:6a4db94011d3 257 */
sahilmgandhi 18:6a4db94011d3 258 int32_t FMC_WriteConfig(uint32_t *u32Config, uint32_t u32Count)
sahilmgandhi 18:6a4db94011d3 259 {
sahilmgandhi 18:6a4db94011d3 260 int32_t i;
sahilmgandhi 18:6a4db94011d3 261
sahilmgandhi 18:6a4db94011d3 262 for(i = 0; i < u32Count; i++)
sahilmgandhi 18:6a4db94011d3 263 {
sahilmgandhi 18:6a4db94011d3 264 FMC_Write(FMC_CONFIG_BASE + i * 4, u32Config[i]);
sahilmgandhi 18:6a4db94011d3 265 if(FMC_Read(FMC_CONFIG_BASE + i * 4) != u32Config[i])
sahilmgandhi 18:6a4db94011d3 266 return -1;
sahilmgandhi 18:6a4db94011d3 267 }
sahilmgandhi 18:6a4db94011d3 268
sahilmgandhi 18:6a4db94011d3 269 return 0;
sahilmgandhi 18:6a4db94011d3 270 }
sahilmgandhi 18:6a4db94011d3 271
sahilmgandhi 18:6a4db94011d3 272 /**
sahilmgandhi 18:6a4db94011d3 273 * @brief Enable Flash Access Frequency Optimization Mode
sahilmgandhi 18:6a4db94011d3 274 *
sahilmgandhi 18:6a4db94011d3 275 * @param[in] u32Mode Optimize flash access cycle mode
sahilmgandhi 18:6a4db94011d3 276 * - \ref FMC_FTCTL_OPTIMIZE_DISABLE
sahilmgandhi 18:6a4db94011d3 277 * - \ref FMC_FTCTL_OPTIMIZE_12MHZ
sahilmgandhi 18:6a4db94011d3 278 * - \ref FMC_FTCTL_OPTIMIZE_36MHZ
sahilmgandhi 18:6a4db94011d3 279 * - \ref FMC_FTCTL_OPTIMIZE_60MHZ
sahilmgandhi 18:6a4db94011d3 280 * - \ref FMC_FTCTL_OPTIMIZE_72MHZ
sahilmgandhi 18:6a4db94011d3 281 *
sahilmgandhi 18:6a4db94011d3 282 * @return None
sahilmgandhi 18:6a4db94011d3 283 *
sahilmgandhi 18:6a4db94011d3 284 * @details This function will set FOM bit fields of FTCTL register to set flash access frequency optimization mode.
sahilmgandhi 18:6a4db94011d3 285 *
sahilmgandhi 18:6a4db94011d3 286 * @note The flash optimization mode (FOM) bits are write protect.
sahilmgandhi 18:6a4db94011d3 287 *
sahilmgandhi 18:6a4db94011d3 288 */
sahilmgandhi 18:6a4db94011d3 289 void FMC_EnableFreqOptimizeMode(uint32_t u32Mode)
sahilmgandhi 18:6a4db94011d3 290 {
sahilmgandhi 18:6a4db94011d3 291 FMC->FTCTL &= ~FMC_FTCTL_FOM_Msk;
sahilmgandhi 18:6a4db94011d3 292 FMC->FTCTL |= (u32Mode << FMC_FTCTL_FOM_Pos);
sahilmgandhi 18:6a4db94011d3 293 }
sahilmgandhi 18:6a4db94011d3 294
sahilmgandhi 18:6a4db94011d3 295 /**
sahilmgandhi 18:6a4db94011d3 296 * @brief Disable Flash Access Frequency Optimization Mode
sahilmgandhi 18:6a4db94011d3 297 *
sahilmgandhi 18:6a4db94011d3 298 * @param None
sahilmgandhi 18:6a4db94011d3 299 *
sahilmgandhi 18:6a4db94011d3 300 * @return None
sahilmgandhi 18:6a4db94011d3 301 *
sahilmgandhi 18:6a4db94011d3 302 * @details This function will clear FOM bit fields of FTCTL register to disable flash access frequency optimization mode.
sahilmgandhi 18:6a4db94011d3 303 *
sahilmgandhi 18:6a4db94011d3 304 * @note The flash optimization mode (FOM) bits are write protect.
sahilmgandhi 18:6a4db94011d3 305 *
sahilmgandhi 18:6a4db94011d3 306 */
sahilmgandhi 18:6a4db94011d3 307 void FMC_DisableFreqOptimizeMode(void)
sahilmgandhi 18:6a4db94011d3 308 {
sahilmgandhi 18:6a4db94011d3 309 FMC->FTCTL &= ~FMC_FTCTL_FOM_Msk;
sahilmgandhi 18:6a4db94011d3 310 }
sahilmgandhi 18:6a4db94011d3 311
sahilmgandhi 18:6a4db94011d3 312 /*@}*/ /* end of group FMC_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314 /*@}*/ /* end of group FMC_Driver */
sahilmgandhi 18:6a4db94011d3 315
sahilmgandhi 18:6a4db94011d3 316 /*@}*/ /* end of group Standard_Driver */
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 /*** (C) COPYRIGHT 2014~2015 Nuvoton Technology Corp. ***/
sahilmgandhi 18:6a4db94011d3 319
sahilmgandhi 18:6a4db94011d3 320