Mouse code for the MacroRat
mbed-dev/targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_crc.h@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /**************************************************************************//** |
sahilmgandhi | 18:6a4db94011d3 | 2 | * @file crc.h |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @version V3.00 |
sahilmgandhi | 18:6a4db94011d3 | 4 | * $Revision: 6 $ |
sahilmgandhi | 18:6a4db94011d3 | 5 | * $Date: 15/08/11 10:26a $ |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @brief M451 series CRC driver header file |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * @note |
sahilmgandhi | 18:6a4db94011d3 | 9 | * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. |
sahilmgandhi | 18:6a4db94011d3 | 10 | *****************************************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 11 | #ifndef __CRC_H__ |
sahilmgandhi | 18:6a4db94011d3 | 12 | #define __CRC_H__ |
sahilmgandhi | 18:6a4db94011d3 | 13 | |
sahilmgandhi | 18:6a4db94011d3 | 14 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 15 | extern "C" |
sahilmgandhi | 18:6a4db94011d3 | 16 | { |
sahilmgandhi | 18:6a4db94011d3 | 17 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 18 | |
sahilmgandhi | 18:6a4db94011d3 | 19 | |
sahilmgandhi | 18:6a4db94011d3 | 20 | /** @addtogroup Standard_Driver Standard Driver |
sahilmgandhi | 18:6a4db94011d3 | 21 | @{ |
sahilmgandhi | 18:6a4db94011d3 | 22 | */ |
sahilmgandhi | 18:6a4db94011d3 | 23 | |
sahilmgandhi | 18:6a4db94011d3 | 24 | /** @addtogroup CRC_Driver CRC Driver |
sahilmgandhi | 18:6a4db94011d3 | 25 | @{ |
sahilmgandhi | 18:6a4db94011d3 | 26 | */ |
sahilmgandhi | 18:6a4db94011d3 | 27 | |
sahilmgandhi | 18:6a4db94011d3 | 28 | /** @addtogroup CRC_EXPORTED_CONSTANTS CRC Exported Constants |
sahilmgandhi | 18:6a4db94011d3 | 29 | @{ |
sahilmgandhi | 18:6a4db94011d3 | 30 | */ |
sahilmgandhi | 18:6a4db94011d3 | 31 | /*---------------------------------------------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 32 | /* CRC Polynomial Mode Constant Definitions */ |
sahilmgandhi | 18:6a4db94011d3 | 33 | /*---------------------------------------------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 34 | #define CRC_CCITT 0x00000000UL /*!<CRC Polynomial Mode - CCITT */ |
sahilmgandhi | 18:6a4db94011d3 | 35 | #define CRC_8 0x40000000UL /*!<CRC Polynomial Mode - CRC8 */ |
sahilmgandhi | 18:6a4db94011d3 | 36 | #define CRC_16 0x80000000UL /*!<CRC Polynomial Mode - CRC16 */ |
sahilmgandhi | 18:6a4db94011d3 | 37 | #define CRC_32 0xC0000000UL /*!<CRC Polynomial Mode - CRC32 */ |
sahilmgandhi | 18:6a4db94011d3 | 38 | |
sahilmgandhi | 18:6a4db94011d3 | 39 | /*---------------------------------------------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 40 | /* Checksum, Write data Constant Definitions */ |
sahilmgandhi | 18:6a4db94011d3 | 41 | /*---------------------------------------------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 42 | #define CRC_CHECKSUM_COM 0x08000000UL /*!<CRC Checksum Complement */ |
sahilmgandhi | 18:6a4db94011d3 | 43 | #define CRC_CHECKSUM_RVS 0x02000000UL /*!<CRC Checksum Reverse */ |
sahilmgandhi | 18:6a4db94011d3 | 44 | #define CRC_WDATA_COM 0x04000000UL /*!<CRC Write Data Complement */ |
sahilmgandhi | 18:6a4db94011d3 | 45 | #define CRC_WDATA_RVS 0x01000000UL /*!<CRC Write Data Reverse */ |
sahilmgandhi | 18:6a4db94011d3 | 46 | |
sahilmgandhi | 18:6a4db94011d3 | 47 | /*---------------------------------------------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 48 | /* CPU Write Data Length Constant Definitions */ |
sahilmgandhi | 18:6a4db94011d3 | 49 | /*---------------------------------------------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 50 | #define CRC_CPU_WDATA_8 0x00000000UL /*!<CRC CPU Write Data length is 8-bit */ |
sahilmgandhi | 18:6a4db94011d3 | 51 | #define CRC_CPU_WDATA_16 0x10000000UL /*!<CRC CPU Write Data length is 16-bit */ |
sahilmgandhi | 18:6a4db94011d3 | 52 | #define CRC_CPU_WDATA_32 0x20000000UL /*!<CRC CPU Write Data length is 32-bit */ |
sahilmgandhi | 18:6a4db94011d3 | 53 | |
sahilmgandhi | 18:6a4db94011d3 | 54 | /*@}*/ /* end of group CRC_EXPORTED_CONSTANTS */ |
sahilmgandhi | 18:6a4db94011d3 | 55 | |
sahilmgandhi | 18:6a4db94011d3 | 56 | |
sahilmgandhi | 18:6a4db94011d3 | 57 | /** @addtogroup CRC_EXPORTED_FUNCTIONS CRC Exported Functions |
sahilmgandhi | 18:6a4db94011d3 | 58 | @{ |
sahilmgandhi | 18:6a4db94011d3 | 59 | */ |
sahilmgandhi | 18:6a4db94011d3 | 60 | |
sahilmgandhi | 18:6a4db94011d3 | 61 | /** |
sahilmgandhi | 18:6a4db94011d3 | 62 | * @brief Set CRC Seed Value |
sahilmgandhi | 18:6a4db94011d3 | 63 | * |
sahilmgandhi | 18:6a4db94011d3 | 64 | * @param[in] u32Seed Seed value |
sahilmgandhi | 18:6a4db94011d3 | 65 | * |
sahilmgandhi | 18:6a4db94011d3 | 66 | * @return None |
sahilmgandhi | 18:6a4db94011d3 | 67 | * |
sahilmgandhi | 18:6a4db94011d3 | 68 | * @details This macro is used to set CRC seed value. |
sahilmgandhi | 18:6a4db94011d3 | 69 | * |
sahilmgandhi | 18:6a4db94011d3 | 70 | * @note User must to perform CRC_RST(CRC_CTL[1] CRC Engine Reset) to reload the new seed value |
sahilmgandhi | 18:6a4db94011d3 | 71 | * to CRC controller. |
sahilmgandhi | 18:6a4db94011d3 | 72 | */ |
sahilmgandhi | 18:6a4db94011d3 | 73 | #define CRC_SET_SEED(u32Seed) { CRC->SEED = (u32Seed); CRC->CTL |= CRC_CTL_CRCRST_Msk; } |
sahilmgandhi | 18:6a4db94011d3 | 74 | |
sahilmgandhi | 18:6a4db94011d3 | 75 | /** |
sahilmgandhi | 18:6a4db94011d3 | 76 | * @brief Get CRC Seed Value |
sahilmgandhi | 18:6a4db94011d3 | 77 | * |
sahilmgandhi | 18:6a4db94011d3 | 78 | * @param None |
sahilmgandhi | 18:6a4db94011d3 | 79 | * |
sahilmgandhi | 18:6a4db94011d3 | 80 | * @return CRC seed value |
sahilmgandhi | 18:6a4db94011d3 | 81 | * |
sahilmgandhi | 18:6a4db94011d3 | 82 | * @details This macro gets the current CRC seed value. |
sahilmgandhi | 18:6a4db94011d3 | 83 | */ |
sahilmgandhi | 18:6a4db94011d3 | 84 | #define CRC_GET_SEED() (CRC->SEED) |
sahilmgandhi | 18:6a4db94011d3 | 85 | |
sahilmgandhi | 18:6a4db94011d3 | 86 | /** |
sahilmgandhi | 18:6a4db94011d3 | 87 | * @brief CRC Write Data |
sahilmgandhi | 18:6a4db94011d3 | 88 | * |
sahilmgandhi | 18:6a4db94011d3 | 89 | * @param[in] u32Data Write data |
sahilmgandhi | 18:6a4db94011d3 | 90 | * |
sahilmgandhi | 18:6a4db94011d3 | 91 | * @return None |
sahilmgandhi | 18:6a4db94011d3 | 92 | * |
sahilmgandhi | 18:6a4db94011d3 | 93 | * @details User can write data directly to CRC Write Data Register(CRC_DAT) by this macro to perform CRC operation. |
sahilmgandhi | 18:6a4db94011d3 | 94 | */ |
sahilmgandhi | 18:6a4db94011d3 | 95 | #define CRC_WRITE_DATA(u32Data) (CRC->DAT = (u32Data)) |
sahilmgandhi | 18:6a4db94011d3 | 96 | |
sahilmgandhi | 18:6a4db94011d3 | 97 | void CRC_Open(uint32_t u32Mode, uint32_t u32Attribute, uint32_t u32Seed, uint32_t u32DataLen); |
sahilmgandhi | 18:6a4db94011d3 | 98 | uint32_t CRC_GetChecksum(void); |
sahilmgandhi | 18:6a4db94011d3 | 99 | |
sahilmgandhi | 18:6a4db94011d3 | 100 | /*@}*/ /* end of group CRC_EXPORTED_FUNCTIONS */ |
sahilmgandhi | 18:6a4db94011d3 | 101 | |
sahilmgandhi | 18:6a4db94011d3 | 102 | /*@}*/ /* end of group CRC_Driver */ |
sahilmgandhi | 18:6a4db94011d3 | 103 | |
sahilmgandhi | 18:6a4db94011d3 | 104 | /*@}*/ /* end of group Standard_Driver */ |
sahilmgandhi | 18:6a4db94011d3 | 105 | |
sahilmgandhi | 18:6a4db94011d3 | 106 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 107 | } |
sahilmgandhi | 18:6a4db94011d3 | 108 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 109 | |
sahilmgandhi | 18:6a4db94011d3 | 110 | #endif //__CRC_H__ |
sahilmgandhi | 18:6a4db94011d3 | 111 | |
sahilmgandhi | 18:6a4db94011d3 | 112 | /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/ |