MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/mbed_overrides.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2015-2016 Nuvoton
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16
sahilmgandhi 18:6a4db94011d3 17 #include "analogin_api.h"
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19 // NOTE: Ensurce mbed_sdk_init() will get called before C++ global object constructor.
sahilmgandhi 18:6a4db94011d3 20 #if defined(__CC_ARM) || defined(__GNUC__)
sahilmgandhi 18:6a4db94011d3 21 void mbed_sdk_init_forced(void) __attribute__((constructor(101)));
sahilmgandhi 18:6a4db94011d3 22 #elif defined(__ICCARM__)
sahilmgandhi 18:6a4db94011d3 23 // FIXME: How to achieve it in IAR?
sahilmgandhi 18:6a4db94011d3 24 #endif
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 void mbed_sdk_init(void)
sahilmgandhi 18:6a4db94011d3 28 {
sahilmgandhi 18:6a4db94011d3 29 // NOTE: Support singleton semantics to be called from other init functions
sahilmgandhi 18:6a4db94011d3 30 static int inited = 0;
sahilmgandhi 18:6a4db94011d3 31 if (inited) {
sahilmgandhi 18:6a4db94011d3 32 return;
sahilmgandhi 18:6a4db94011d3 33 }
sahilmgandhi 18:6a4db94011d3 34 inited = 1;
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 37 /* Init System Clock */
sahilmgandhi 18:6a4db94011d3 38 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 /* Unlock protected registers */
sahilmgandhi 18:6a4db94011d3 40 SYS_UnlockReg();
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 /* Enable HIRC clock (Internal RC 22.1184MHz) */
sahilmgandhi 18:6a4db94011d3 43 CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
sahilmgandhi 18:6a4db94011d3 44 /* Enable HXT clock (external XTAL 12MHz) */
sahilmgandhi 18:6a4db94011d3 45 CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
sahilmgandhi 18:6a4db94011d3 46 /* Enable LIRC for lp_ticker */
sahilmgandhi 18:6a4db94011d3 47 CLK_EnableXtalRC(CLK_PWRCTL_LIRCEN_Msk);
sahilmgandhi 18:6a4db94011d3 48 /* Enable LXT for RTC */
sahilmgandhi 18:6a4db94011d3 49 CLK_EnableXtalRC(CLK_PWRCTL_LXTEN_Msk);
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 /* Wait for HIRC clock ready */
sahilmgandhi 18:6a4db94011d3 52 CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
sahilmgandhi 18:6a4db94011d3 53 /* Wait for HXT clock ready */
sahilmgandhi 18:6a4db94011d3 54 CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
sahilmgandhi 18:6a4db94011d3 55 /* Wait for LIRC clock ready */
sahilmgandhi 18:6a4db94011d3 56 CLK_WaitClockReady(CLK_STATUS_LIRCSTB_Msk);
sahilmgandhi 18:6a4db94011d3 57 /* Wait for LXT clock ready */
sahilmgandhi 18:6a4db94011d3 58 CLK_WaitClockReady(CLK_STATUS_LXTSTB_Msk);
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 /* Select HCLK clock source as HIRC and HCLK clock divider as 1 */
sahilmgandhi 18:6a4db94011d3 61 CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 /* Set core clock as 72000000 from PLL */
sahilmgandhi 18:6a4db94011d3 64 CLK_SetCoreClock(72000000);
sahilmgandhi 18:6a4db94011d3 65
sahilmgandhi 18:6a4db94011d3 66 #if DEVICE_ANALOGIN
sahilmgandhi 18:6a4db94011d3 67 /* Vref connect to internal */
sahilmgandhi 18:6a4db94011d3 68 SYS->VREFCTL = (SYS->VREFCTL & ~SYS_VREFCTL_VREFCTL_Msk) | SYS_VREFCTL_VREF_3_072V;
sahilmgandhi 18:6a4db94011d3 69 #endif
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 /* Update System Core Clock */
sahilmgandhi 18:6a4db94011d3 72 /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
sahilmgandhi 18:6a4db94011d3 73 SystemCoreClockUpdate();
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 /* Lock protected registers */
sahilmgandhi 18:6a4db94011d3 76 SYS_LockReg();
sahilmgandhi 18:6a4db94011d3 77 }
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 void mbed_sdk_init_forced(void)
sahilmgandhi 18:6a4db94011d3 80 {
sahilmgandhi 18:6a4db94011d3 81 mbed_sdk_init();
sahilmgandhi 18:6a4db94011d3 82 }