Mouse code for the MacroRat
mbed-dev/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/TARGET_DELTA_DFCM_NNN50/mbed_overrides.c@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2006-2017 ARM Limited |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | |
sahilmgandhi | 18:6a4db94011d3 | 17 | #include "cmsis.h" |
sahilmgandhi | 18:6a4db94011d3 | 18 | #include "PinNames.h" |
sahilmgandhi | 18:6a4db94011d3 | 19 | |
sahilmgandhi | 18:6a4db94011d3 | 20 | void mbed_sdk_init() |
sahilmgandhi | 18:6a4db94011d3 | 21 | { |
sahilmgandhi | 18:6a4db94011d3 | 22 | char* debug_date = __DATE__; |
sahilmgandhi | 18:6a4db94011d3 | 23 | char* debug_time = __TIME__; |
sahilmgandhi | 18:6a4db94011d3 | 24 | |
sahilmgandhi | 18:6a4db94011d3 | 25 | // Default RF switch setting, pull p19 to low and p28 to high for turning antenna switch to BLE radiated path |
sahilmgandhi | 18:6a4db94011d3 | 26 | NRF_GPIO->PIN_CNF[p19] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
sahilmgandhi | 18:6a4db94011d3 | 27 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
sahilmgandhi | 18:6a4db94011d3 | 28 | | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
sahilmgandhi | 18:6a4db94011d3 | 29 | | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
sahilmgandhi | 18:6a4db94011d3 | 30 | | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); |
sahilmgandhi | 18:6a4db94011d3 | 31 | NRF_GPIO->PIN_CNF[p28] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
sahilmgandhi | 18:6a4db94011d3 | 32 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
sahilmgandhi | 18:6a4db94011d3 | 33 | | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
sahilmgandhi | 18:6a4db94011d3 | 34 | | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
sahilmgandhi | 18:6a4db94011d3 | 35 | | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); |
sahilmgandhi | 18:6a4db94011d3 | 36 | |
sahilmgandhi | 18:6a4db94011d3 | 37 | NRF_GPIO->OUTCLR = (GPIO_OUTCLR_PIN19_Clear << GPIO_OUTCLR_PIN19_Pos); |
sahilmgandhi | 18:6a4db94011d3 | 38 | NRF_GPIO->OUTSET = (GPIO_OUTCLR_PIN28_High << GPIO_OUTCLR_PIN28_Pos); |
sahilmgandhi | 18:6a4db94011d3 | 39 | |
sahilmgandhi | 18:6a4db94011d3 | 40 | // Config External Crystal to 32MHz |
sahilmgandhi | 18:6a4db94011d3 | 41 | NRF_CLOCK->XTALFREQ = 0x00; |
sahilmgandhi | 18:6a4db94011d3 | 42 | NRF_CLOCK->EVENTS_HFCLKSTARTED = 0; |
sahilmgandhi | 18:6a4db94011d3 | 43 | NRF_CLOCK->TASKS_HFCLKSTART = 1; |
sahilmgandhi | 18:6a4db94011d3 | 44 | while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0) { |
sahilmgandhi | 18:6a4db94011d3 | 45 | // Do nothing. |
sahilmgandhi | 18:6a4db94011d3 | 46 | } |
sahilmgandhi | 18:6a4db94011d3 | 47 | |
sahilmgandhi | 18:6a4db94011d3 | 48 | } |