MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/spi_api.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2013 Nordic Semiconductor
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 //#include <math.h>
sahilmgandhi 18:6a4db94011d3 17 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 18 #include "spi_api.h"
sahilmgandhi 18:6a4db94011d3 19 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 20 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 21 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 22
sahilmgandhi 18:6a4db94011d3 23 #define SPIS_MESSAGE_SIZE 1
sahilmgandhi 18:6a4db94011d3 24 volatile uint8_t m_tx_buf[SPIS_MESSAGE_SIZE] = {0};
sahilmgandhi 18:6a4db94011d3 25 volatile uint8_t m_rx_buf[SPIS_MESSAGE_SIZE] = {0};
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 // nRF51822's I2C_0 and SPI_0 (I2C_1, SPI_1 and SPIS1) share the same address.
sahilmgandhi 18:6a4db94011d3 28 // They can't be used at the same time. So we use two global variable to track the usage.
sahilmgandhi 18:6a4db94011d3 29 // See nRF51822 address information at nRF51822_PS v2.0.pdf - Table 15 Peripheral instance reference
sahilmgandhi 18:6a4db94011d3 30 extern volatile i2c_spi_peripheral_t i2c0_spi0_peripheral; // from i2c_api.c
sahilmgandhi 18:6a4db94011d3 31 extern volatile i2c_spi_peripheral_t i2c1_spi1_peripheral;
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
sahilmgandhi 18:6a4db94011d3 34 {
sahilmgandhi 18:6a4db94011d3 35 SPIName spi = SPI_0;
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 if (ssel == NC && i2c0_spi0_peripheral.usage == I2C_SPI_PERIPHERAL_FOR_SPI &&
sahilmgandhi 18:6a4db94011d3 38 i2c0_spi0_peripheral.sda_mosi == (uint8_t)mosi &&
sahilmgandhi 18:6a4db94011d3 39 i2c0_spi0_peripheral.scl_miso == (uint8_t)miso &&
sahilmgandhi 18:6a4db94011d3 40 i2c0_spi0_peripheral.sclk == (uint8_t)sclk) {
sahilmgandhi 18:6a4db94011d3 41 // The SPI with the same pins is already initialized
sahilmgandhi 18:6a4db94011d3 42 spi = SPI_0;
sahilmgandhi 18:6a4db94011d3 43 obj->peripheral = 0x1;
sahilmgandhi 18:6a4db94011d3 44 } else if (ssel == NC && i2c1_spi1_peripheral.usage == I2C_SPI_PERIPHERAL_FOR_SPI &&
sahilmgandhi 18:6a4db94011d3 45 i2c1_spi1_peripheral.sda_mosi == (uint8_t)mosi &&
sahilmgandhi 18:6a4db94011d3 46 i2c1_spi1_peripheral.scl_miso == (uint8_t)miso &&
sahilmgandhi 18:6a4db94011d3 47 i2c1_spi1_peripheral.sclk == (uint8_t)sclk) {
sahilmgandhi 18:6a4db94011d3 48 // The SPI with the same pins is already initialized
sahilmgandhi 18:6a4db94011d3 49 spi = SPI_1;
sahilmgandhi 18:6a4db94011d3 50 obj->peripheral = 0x2;
sahilmgandhi 18:6a4db94011d3 51 } else if (i2c1_spi1_peripheral.usage == 0) {
sahilmgandhi 18:6a4db94011d3 52 i2c1_spi1_peripheral.usage = I2C_SPI_PERIPHERAL_FOR_SPI;
sahilmgandhi 18:6a4db94011d3 53 i2c1_spi1_peripheral.sda_mosi = (uint8_t)mosi;
sahilmgandhi 18:6a4db94011d3 54 i2c1_spi1_peripheral.scl_miso = (uint8_t)miso;
sahilmgandhi 18:6a4db94011d3 55 i2c1_spi1_peripheral.sclk = (uint8_t)sclk;
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 spi = SPI_1;
sahilmgandhi 18:6a4db94011d3 58 obj->peripheral = 0x2;
sahilmgandhi 18:6a4db94011d3 59 } else if (i2c0_spi0_peripheral.usage == 0) {
sahilmgandhi 18:6a4db94011d3 60 i2c0_spi0_peripheral.usage = I2C_SPI_PERIPHERAL_FOR_SPI;
sahilmgandhi 18:6a4db94011d3 61 i2c0_spi0_peripheral.sda_mosi = (uint8_t)mosi;
sahilmgandhi 18:6a4db94011d3 62 i2c0_spi0_peripheral.scl_miso = (uint8_t)miso;
sahilmgandhi 18:6a4db94011d3 63 i2c0_spi0_peripheral.sclk = (uint8_t)sclk;
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 spi = SPI_0;
sahilmgandhi 18:6a4db94011d3 66 obj->peripheral = 0x1;
sahilmgandhi 18:6a4db94011d3 67 } else {
sahilmgandhi 18:6a4db94011d3 68 // No available peripheral
sahilmgandhi 18:6a4db94011d3 69 error("No available SPI");
sahilmgandhi 18:6a4db94011d3 70 }
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 if (ssel==NC) {
sahilmgandhi 18:6a4db94011d3 73 obj->spi = (NRF_SPI_Type *)spi;
sahilmgandhi 18:6a4db94011d3 74 obj->spis = (NRF_SPIS_Type *)NC;
sahilmgandhi 18:6a4db94011d3 75 } else {
sahilmgandhi 18:6a4db94011d3 76 obj->spi = (NRF_SPI_Type *)NC;
sahilmgandhi 18:6a4db94011d3 77 obj->spis = (NRF_SPIS_Type *)spi;
sahilmgandhi 18:6a4db94011d3 78 }
sahilmgandhi 18:6a4db94011d3 79
sahilmgandhi 18:6a4db94011d3 80 // pin out the spi pins
sahilmgandhi 18:6a4db94011d3 81 if (ssel != NC) { //slave
sahilmgandhi 18:6a4db94011d3 82 obj->spis->POWER = 0;
sahilmgandhi 18:6a4db94011d3 83 obj->spis->POWER = 1;
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 NRF_GPIO->PIN_CNF[mosi] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 86 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 87 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 88 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 89 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 90 NRF_GPIO->PIN_CNF[miso] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 91 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 92 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 93 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 94 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 95 NRF_GPIO->PIN_CNF[sclk] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 96 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 97 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 98 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 99 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 100 NRF_GPIO->PIN_CNF[ssel] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 101 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 102 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 103 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 104 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 obj->spis->PSELMOSI = mosi;
sahilmgandhi 18:6a4db94011d3 107 obj->spis->PSELMISO = miso;
sahilmgandhi 18:6a4db94011d3 108 obj->spis->PSELSCK = sclk;
sahilmgandhi 18:6a4db94011d3 109 obj->spis->PSELCSN = ssel;
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 obj->spis->EVENTS_END = 0;
sahilmgandhi 18:6a4db94011d3 112 obj->spis->EVENTS_ACQUIRED = 0;
sahilmgandhi 18:6a4db94011d3 113 obj->spis->MAXRX = SPIS_MESSAGE_SIZE;
sahilmgandhi 18:6a4db94011d3 114 obj->spis->MAXTX = SPIS_MESSAGE_SIZE;
sahilmgandhi 18:6a4db94011d3 115 obj->spis->TXDPTR = (uint32_t)&m_tx_buf[0];
sahilmgandhi 18:6a4db94011d3 116 obj->spis->RXDPTR = (uint32_t)&m_rx_buf[0];
sahilmgandhi 18:6a4db94011d3 117 obj->spis->SHORTS = (SPIS_SHORTS_END_ACQUIRE_Enabled << SPIS_SHORTS_END_ACQUIRE_Pos);
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
sahilmgandhi 18:6a4db94011d3 120 } else { //master
sahilmgandhi 18:6a4db94011d3 121 obj->spi->POWER = 0;
sahilmgandhi 18:6a4db94011d3 122 obj->spi->POWER = 1;
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 //NRF_GPIO->DIR |= (1<<mosi);
sahilmgandhi 18:6a4db94011d3 125 NRF_GPIO->PIN_CNF[mosi] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 126 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 127 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 128 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 129 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 130 obj->spi->PSELMOSI = mosi;
sahilmgandhi 18:6a4db94011d3 131
sahilmgandhi 18:6a4db94011d3 132 NRF_GPIO->PIN_CNF[sclk] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 133 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 134 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 135 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 136 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 137 obj->spi->PSELSCK = sclk;
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 //NRF_GPIO->DIR &= ~(1<<miso);
sahilmgandhi 18:6a4db94011d3 140 NRF_GPIO->PIN_CNF[miso] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
sahilmgandhi 18:6a4db94011d3 141 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
sahilmgandhi 18:6a4db94011d3 142 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
sahilmgandhi 18:6a4db94011d3 143 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
sahilmgandhi 18:6a4db94011d3 144 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 obj->spi->PSELMISO = miso;
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 obj->spi->EVENTS_READY = 0U;
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
sahilmgandhi 18:6a4db94011d3 151 spi_frequency(obj, 1000000);
sahilmgandhi 18:6a4db94011d3 152 }
sahilmgandhi 18:6a4db94011d3 153 }
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 void spi_free(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 156 {
sahilmgandhi 18:6a4db94011d3 157 }
sahilmgandhi 18:6a4db94011d3 158
sahilmgandhi 18:6a4db94011d3 159 static inline void spi_disable(spi_t *obj, int slave)
sahilmgandhi 18:6a4db94011d3 160 {
sahilmgandhi 18:6a4db94011d3 161 if (slave) {
sahilmgandhi 18:6a4db94011d3 162 obj->spis->ENABLE = (SPIS_ENABLE_ENABLE_Disabled << SPIS_ENABLE_ENABLE_Pos);
sahilmgandhi 18:6a4db94011d3 163 } else {
sahilmgandhi 18:6a4db94011d3 164 obj->spi->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
sahilmgandhi 18:6a4db94011d3 165 }
sahilmgandhi 18:6a4db94011d3 166 }
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 static inline void spi_enable(spi_t *obj, int slave)
sahilmgandhi 18:6a4db94011d3 169 {
sahilmgandhi 18:6a4db94011d3 170 if (slave) {
sahilmgandhi 18:6a4db94011d3 171 obj->spis->ENABLE = (SPIS_ENABLE_ENABLE_Enabled << SPIS_ENABLE_ENABLE_Pos);
sahilmgandhi 18:6a4db94011d3 172 } else {
sahilmgandhi 18:6a4db94011d3 173 obj->spi->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos);
sahilmgandhi 18:6a4db94011d3 174 }
sahilmgandhi 18:6a4db94011d3 175 }
sahilmgandhi 18:6a4db94011d3 176
sahilmgandhi 18:6a4db94011d3 177 void spi_format(spi_t *obj, int bits, int mode, int slave)
sahilmgandhi 18:6a4db94011d3 178 {
sahilmgandhi 18:6a4db94011d3 179 uint32_t config_mode = 0;
sahilmgandhi 18:6a4db94011d3 180 spi_disable(obj, slave);
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 if (bits != 8) {
sahilmgandhi 18:6a4db94011d3 183 error("Only 8bits SPI supported");
sahilmgandhi 18:6a4db94011d3 184 }
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 switch (mode) {
sahilmgandhi 18:6a4db94011d3 187 case 0:
sahilmgandhi 18:6a4db94011d3 188 config_mode = (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
sahilmgandhi 18:6a4db94011d3 189 break;
sahilmgandhi 18:6a4db94011d3 190 case 1:
sahilmgandhi 18:6a4db94011d3 191 config_mode = (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
sahilmgandhi 18:6a4db94011d3 192 break;
sahilmgandhi 18:6a4db94011d3 193 case 2:
sahilmgandhi 18:6a4db94011d3 194 config_mode = (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
sahilmgandhi 18:6a4db94011d3 195 break;
sahilmgandhi 18:6a4db94011d3 196 case 3:
sahilmgandhi 18:6a4db94011d3 197 config_mode = (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
sahilmgandhi 18:6a4db94011d3 198 break;
sahilmgandhi 18:6a4db94011d3 199 default:
sahilmgandhi 18:6a4db94011d3 200 error("SPI format error");
sahilmgandhi 18:6a4db94011d3 201 break;
sahilmgandhi 18:6a4db94011d3 202 }
sahilmgandhi 18:6a4db94011d3 203 //default to msb first
sahilmgandhi 18:6a4db94011d3 204 if (slave) {
sahilmgandhi 18:6a4db94011d3 205 obj->spis->CONFIG = (config_mode | (SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos));
sahilmgandhi 18:6a4db94011d3 206 } else {
sahilmgandhi 18:6a4db94011d3 207 obj->spi->CONFIG = (config_mode | (SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos));
sahilmgandhi 18:6a4db94011d3 208 }
sahilmgandhi 18:6a4db94011d3 209
sahilmgandhi 18:6a4db94011d3 210 spi_enable(obj, slave);
sahilmgandhi 18:6a4db94011d3 211 }
sahilmgandhi 18:6a4db94011d3 212
sahilmgandhi 18:6a4db94011d3 213 void spi_frequency(spi_t *obj, int hz)
sahilmgandhi 18:6a4db94011d3 214 {
sahilmgandhi 18:6a4db94011d3 215 if ((int)obj->spi==NC) {
sahilmgandhi 18:6a4db94011d3 216 return;
sahilmgandhi 18:6a4db94011d3 217 }
sahilmgandhi 18:6a4db94011d3 218 spi_disable(obj, 0);
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 if (hz<250000) { //125Kbps
sahilmgandhi 18:6a4db94011d3 221 obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_K125;
sahilmgandhi 18:6a4db94011d3 222 } else if (hz<500000) { //250Kbps
sahilmgandhi 18:6a4db94011d3 223 obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_K250;
sahilmgandhi 18:6a4db94011d3 224 } else if (hz<1000000) { //500Kbps
sahilmgandhi 18:6a4db94011d3 225 obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_K500;
sahilmgandhi 18:6a4db94011d3 226 } else if (hz<2000000) { //1Mbps
sahilmgandhi 18:6a4db94011d3 227 obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_M1;
sahilmgandhi 18:6a4db94011d3 228 } else if (hz<4000000) { //2Mbps
sahilmgandhi 18:6a4db94011d3 229 obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_M2;
sahilmgandhi 18:6a4db94011d3 230 } else if (hz<8000000) { //4Mbps
sahilmgandhi 18:6a4db94011d3 231 obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_M4;
sahilmgandhi 18:6a4db94011d3 232 } else { //8Mbps
sahilmgandhi 18:6a4db94011d3 233 obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_M8;
sahilmgandhi 18:6a4db94011d3 234 }
sahilmgandhi 18:6a4db94011d3 235
sahilmgandhi 18:6a4db94011d3 236 spi_enable(obj, 0);
sahilmgandhi 18:6a4db94011d3 237 }
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 static inline int spi_readable(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 240 {
sahilmgandhi 18:6a4db94011d3 241 return (obj->spi->EVENTS_READY == 1);
sahilmgandhi 18:6a4db94011d3 242 }
sahilmgandhi 18:6a4db94011d3 243
sahilmgandhi 18:6a4db94011d3 244 static inline int spi_writeable(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 245 {
sahilmgandhi 18:6a4db94011d3 246 return (obj->spi->EVENTS_READY == 0);
sahilmgandhi 18:6a4db94011d3 247 }
sahilmgandhi 18:6a4db94011d3 248
sahilmgandhi 18:6a4db94011d3 249 static inline int spi_read(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 250 {
sahilmgandhi 18:6a4db94011d3 251 while (!spi_readable(obj)) {
sahilmgandhi 18:6a4db94011d3 252 }
sahilmgandhi 18:6a4db94011d3 253
sahilmgandhi 18:6a4db94011d3 254 obj->spi->EVENTS_READY = 0;
sahilmgandhi 18:6a4db94011d3 255 return (int)obj->spi->RXD;
sahilmgandhi 18:6a4db94011d3 256 }
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258 int spi_master_write(spi_t *obj, int value)
sahilmgandhi 18:6a4db94011d3 259 {
sahilmgandhi 18:6a4db94011d3 260 while (!spi_writeable(obj)) {
sahilmgandhi 18:6a4db94011d3 261 }
sahilmgandhi 18:6a4db94011d3 262 obj->spi->TXD = (uint32_t)value;
sahilmgandhi 18:6a4db94011d3 263 return spi_read(obj);
sahilmgandhi 18:6a4db94011d3 264 }
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 //static inline int spis_writeable(spi_t *obj) {
sahilmgandhi 18:6a4db94011d3 267 // return (obj->spis->EVENTS_ACQUIRED==1);
sahilmgandhi 18:6a4db94011d3 268 //}
sahilmgandhi 18:6a4db94011d3 269
sahilmgandhi 18:6a4db94011d3 270 int spi_slave_receive(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 271 {
sahilmgandhi 18:6a4db94011d3 272 return obj->spis->EVENTS_END;
sahilmgandhi 18:6a4db94011d3 273 }
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 int spi_slave_read(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 276 {
sahilmgandhi 18:6a4db94011d3 277 return m_rx_buf[0];
sahilmgandhi 18:6a4db94011d3 278 }
sahilmgandhi 18:6a4db94011d3 279
sahilmgandhi 18:6a4db94011d3 280 void spi_slave_write(spi_t *obj, int value)
sahilmgandhi 18:6a4db94011d3 281 {
sahilmgandhi 18:6a4db94011d3 282 m_tx_buf[0] = value & 0xFF;
sahilmgandhi 18:6a4db94011d3 283 obj->spis->TASKS_RELEASE = 1;
sahilmgandhi 18:6a4db94011d3 284 obj->spis->EVENTS_ACQUIRED = 0;
sahilmgandhi 18:6a4db94011d3 285 obj->spis->EVENTS_END = 0;
sahilmgandhi 18:6a4db94011d3 286 }