Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 ; ---------------------------------------------------------------------------------------
sahilmgandhi 18:6a4db94011d3 2 ; @file: startup_MKL26Z4.s
sahilmgandhi 18:6a4db94011d3 3 ; @purpose: CMSIS Cortex-M0P Core Device Startup File
sahilmgandhi 18:6a4db94011d3 4 ; MKL26Z4
sahilmgandhi 18:6a4db94011d3 5 ; @version: 1.7
sahilmgandhi 18:6a4db94011d3 6 ; @date: 2015-2-18
sahilmgandhi 18:6a4db94011d3 7 ; @build: b150218
sahilmgandhi 18:6a4db94011d3 8 ; ---------------------------------------------------------------------------------------
sahilmgandhi 18:6a4db94011d3 9 ;
sahilmgandhi 18:6a4db94011d3 10 ; Copyright (c) 1997 - 2015 , Freescale Semiconductor, Inc.
sahilmgandhi 18:6a4db94011d3 11 ; All rights reserved.
sahilmgandhi 18:6a4db94011d3 12 ;
sahilmgandhi 18:6a4db94011d3 13 ; Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 ; are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 ;
sahilmgandhi 18:6a4db94011d3 16 ; o Redistributions of source code must retain the above copyright notice, this list
sahilmgandhi 18:6a4db94011d3 17 ; of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 18 ;
sahilmgandhi 18:6a4db94011d3 19 ; o Redistributions in binary form must reproduce the above copyright notice, this
sahilmgandhi 18:6a4db94011d3 20 ; list of conditions and the following disclaimer in the documentation and/or
sahilmgandhi 18:6a4db94011d3 21 ; other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 22 ;
sahilmgandhi 18:6a4db94011d3 23 ; o Neither the name of Freescale Semiconductor, Inc. nor the names of its
sahilmgandhi 18:6a4db94011d3 24 ; contributors may be used to endorse or promote products derived from this
sahilmgandhi 18:6a4db94011d3 25 ; software without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 26 ;
sahilmgandhi 18:6a4db94011d3 27 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
sahilmgandhi 18:6a4db94011d3 28 ; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
sahilmgandhi 18:6a4db94011d3 29 ; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 30 ; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
sahilmgandhi 18:6a4db94011d3 31 ; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
sahilmgandhi 18:6a4db94011d3 32 ; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
sahilmgandhi 18:6a4db94011d3 33 ; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
sahilmgandhi 18:6a4db94011d3 34 ; ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
sahilmgandhi 18:6a4db94011d3 35 ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
sahilmgandhi 18:6a4db94011d3 36 ; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 37 ;
sahilmgandhi 18:6a4db94011d3 38 ; The modules in this file are included in the libraries, and may be replaced
sahilmgandhi 18:6a4db94011d3 39 ; by any user-defined modules that define the PUBLIC symbol _program_start or
sahilmgandhi 18:6a4db94011d3 40 ; a user defined start symbol.
sahilmgandhi 18:6a4db94011d3 41 ; To override the cstartup defined in the library, simply add your modified
sahilmgandhi 18:6a4db94011d3 42 ; version to the workbench project.
sahilmgandhi 18:6a4db94011d3 43 ;
sahilmgandhi 18:6a4db94011d3 44 ; The vector table is normally located at address 0.
sahilmgandhi 18:6a4db94011d3 45 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
sahilmgandhi 18:6a4db94011d3 46 ; The name "__vector_table" has special meaning for C-SPY:
sahilmgandhi 18:6a4db94011d3 47 ; it is where the SP start value is found, and the NVIC vector
sahilmgandhi 18:6a4db94011d3 48 ; table register (VTOR) is initialized to this address if != 0.
sahilmgandhi 18:6a4db94011d3 49 ;
sahilmgandhi 18:6a4db94011d3 50 ; Cortex-M version
sahilmgandhi 18:6a4db94011d3 51 ;
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 MODULE ?cstartup
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 ;; Forward declaration of sections.
sahilmgandhi 18:6a4db94011d3 56 SECTION CSTACK:DATA:NOROOT(3)
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 SECTION .intvec:CODE:NOROOT(2)
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 EXTERN __iar_program_start
sahilmgandhi 18:6a4db94011d3 61 EXTERN SystemInit
sahilmgandhi 18:6a4db94011d3 62 EXTERN init_data_bss
sahilmgandhi 18:6a4db94011d3 63 PUBLIC __vector_table
sahilmgandhi 18:6a4db94011d3 64 PUBLIC __vector_table_0x1c
sahilmgandhi 18:6a4db94011d3 65 PUBLIC __Vectors
sahilmgandhi 18:6a4db94011d3 66 PUBLIC __Vectors_End
sahilmgandhi 18:6a4db94011d3 67 PUBLIC __Vectors_Size
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 DATA
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 __vector_table
sahilmgandhi 18:6a4db94011d3 72 DCD sfe(CSTACK)
sahilmgandhi 18:6a4db94011d3 73 DCD Reset_Handler
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 DCD NMI_Handler ;NMI Handler
sahilmgandhi 18:6a4db94011d3 76 DCD HardFault_Handler ;Hard Fault Handler
sahilmgandhi 18:6a4db94011d3 77 DCD 0 ;Reserved
sahilmgandhi 18:6a4db94011d3 78 DCD 0 ;Reserved
sahilmgandhi 18:6a4db94011d3 79 DCD 0 ;Reserved
sahilmgandhi 18:6a4db94011d3 80 __vector_table_0x1c
sahilmgandhi 18:6a4db94011d3 81 DCD 0 ;Reserved
sahilmgandhi 18:6a4db94011d3 82 DCD 0 ;Reserved
sahilmgandhi 18:6a4db94011d3 83 DCD 0 ;Reserved
sahilmgandhi 18:6a4db94011d3 84 DCD 0 ;Reserved
sahilmgandhi 18:6a4db94011d3 85 DCD SVC_Handler ;SVCall Handler
sahilmgandhi 18:6a4db94011d3 86 DCD 0 ;Reserved
sahilmgandhi 18:6a4db94011d3 87 DCD 0 ;Reserved
sahilmgandhi 18:6a4db94011d3 88 DCD PendSV_Handler ;PendSV Handler
sahilmgandhi 18:6a4db94011d3 89 DCD SysTick_Handler ;SysTick Handler
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 ;External Interrupts
sahilmgandhi 18:6a4db94011d3 92 DCD DMA0_IRQHandler ;DMA channel 0 transfer complete and error interrupt
sahilmgandhi 18:6a4db94011d3 93 DCD DMA1_IRQHandler ;DMA channel 1 transfer complete and error interrupt
sahilmgandhi 18:6a4db94011d3 94 DCD DMA2_IRQHandler ;DMA channel 2 transfer complete and error interrupt
sahilmgandhi 18:6a4db94011d3 95 DCD DMA3_IRQHandler ;DMA channel 3 transfer complete and error interrupt
sahilmgandhi 18:6a4db94011d3 96 DCD Reserved20_IRQHandler ;Reserved interrupt
sahilmgandhi 18:6a4db94011d3 97 DCD FTFA_IRQHandler ;FTFA command complete and read collision
sahilmgandhi 18:6a4db94011d3 98 DCD LVD_LVW_IRQHandler ;Low-voltage detect, low-voltage warning
sahilmgandhi 18:6a4db94011d3 99 DCD LLWU_IRQHandler ;Low Leakage Wakeup
sahilmgandhi 18:6a4db94011d3 100 DCD I2C0_IRQHandler ;I2C0 interrupt
sahilmgandhi 18:6a4db94011d3 101 DCD I2C1_IRQHandler ;I2C1 interrupt
sahilmgandhi 18:6a4db94011d3 102 DCD SPI0_IRQHandler ;SPI0 single interrupt vector for all sources
sahilmgandhi 18:6a4db94011d3 103 DCD SPI1_IRQHandler ;SPI1 single interrupt vector for all sources
sahilmgandhi 18:6a4db94011d3 104 DCD UART0_IRQHandler ;UART0 status and error
sahilmgandhi 18:6a4db94011d3 105 DCD UART1_IRQHandler ;UART1 status and error
sahilmgandhi 18:6a4db94011d3 106 DCD UART2_IRQHandler ;UART2 status and error
sahilmgandhi 18:6a4db94011d3 107 DCD ADC0_IRQHandler ;ADC0 interrupt
sahilmgandhi 18:6a4db94011d3 108 DCD CMP0_IRQHandler ;CMP0 interrupt
sahilmgandhi 18:6a4db94011d3 109 DCD TPM0_IRQHandler ;TPM0 single interrupt vector for all sources
sahilmgandhi 18:6a4db94011d3 110 DCD TPM1_IRQHandler ;TPM1 single interrupt vector for all sources
sahilmgandhi 18:6a4db94011d3 111 DCD TPM2_IRQHandler ;TPM2 single interrupt vector for all sources
sahilmgandhi 18:6a4db94011d3 112 DCD RTC_IRQHandler ;RTC alarm interrupt
sahilmgandhi 18:6a4db94011d3 113 DCD RTC_Seconds_IRQHandler ;RTC seconds interrupt
sahilmgandhi 18:6a4db94011d3 114 DCD PIT_IRQHandler ;PIT single interrupt vector for all channels
sahilmgandhi 18:6a4db94011d3 115 DCD I2S0_IRQHandler ;I2S0 Single interrupt vector for all sources
sahilmgandhi 18:6a4db94011d3 116 DCD USB0_IRQHandler ;USB0 OTG
sahilmgandhi 18:6a4db94011d3 117 DCD DAC0_IRQHandler ;DAC0 interrupt
sahilmgandhi 18:6a4db94011d3 118 DCD TSI0_IRQHandler ;TSI0 interrupt
sahilmgandhi 18:6a4db94011d3 119 DCD MCG_IRQHandler ;MCG interrupt
sahilmgandhi 18:6a4db94011d3 120 DCD LPTMR0_IRQHandler ;LPTMR0 interrupt
sahilmgandhi 18:6a4db94011d3 121 DCD Reserved45_IRQHandler ;Reserved interrupt
sahilmgandhi 18:6a4db94011d3 122 DCD PORTA_IRQHandler ;PORTA pin detect
sahilmgandhi 18:6a4db94011d3 123 DCD PORTC_PORTD_IRQHandler ;Single interrupt vector for PORTC and PORTD pin detect
sahilmgandhi 18:6a4db94011d3 124 __Vectors_End
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 SECTION FlashConfig:CODE
sahilmgandhi 18:6a4db94011d3 127 __FlashConfig
sahilmgandhi 18:6a4db94011d3 128 DCD 0xFFFFFFFF
sahilmgandhi 18:6a4db94011d3 129 DCD 0xFFFFFFFF
sahilmgandhi 18:6a4db94011d3 130 DCD 0xFFFFFFFF
sahilmgandhi 18:6a4db94011d3 131 DCD 0xFFFFFFFE
sahilmgandhi 18:6a4db94011d3 132 __FlashConfig_End
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 __Vectors EQU __vector_table
sahilmgandhi 18:6a4db94011d3 135 __Vectors_Size EQU __Vectors_End - __Vectors
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
sahilmgandhi 18:6a4db94011d3 139 ;;
sahilmgandhi 18:6a4db94011d3 140 ;; Default interrupt handlers.
sahilmgandhi 18:6a4db94011d3 141 ;;
sahilmgandhi 18:6a4db94011d3 142 THUMB
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 PUBWEAK Reset_Handler
sahilmgandhi 18:6a4db94011d3 145 SECTION .text:CODE:REORDER:NOROOT(2)
sahilmgandhi 18:6a4db94011d3 146 Reset_Handler
sahilmgandhi 18:6a4db94011d3 147 CPSID I ; Mask interrupts
sahilmgandhi 18:6a4db94011d3 148 LDR R0, =SystemInit
sahilmgandhi 18:6a4db94011d3 149 BLX R0
sahilmgandhi 18:6a4db94011d3 150 LDR R0, =init_data_bss
sahilmgandhi 18:6a4db94011d3 151 BLX R0
sahilmgandhi 18:6a4db94011d3 152 CPSIE I ; Unmask interrupts
sahilmgandhi 18:6a4db94011d3 153 LDR R0, =__iar_program_start
sahilmgandhi 18:6a4db94011d3 154 BX R0
sahilmgandhi 18:6a4db94011d3 155
sahilmgandhi 18:6a4db94011d3 156 PUBWEAK NMI_Handler
sahilmgandhi 18:6a4db94011d3 157 SECTION .text:CODE:REORDER:NOROOT(1)
sahilmgandhi 18:6a4db94011d3 158 NMI_Handler
sahilmgandhi 18:6a4db94011d3 159 B .
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 PUBWEAK HardFault_Handler
sahilmgandhi 18:6a4db94011d3 162 SECTION .text:CODE:REORDER:NOROOT(1)
sahilmgandhi 18:6a4db94011d3 163 HardFault_Handler
sahilmgandhi 18:6a4db94011d3 164 B .
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 PUBWEAK SVC_Handler
sahilmgandhi 18:6a4db94011d3 167 SECTION .text:CODE:REORDER:NOROOT(1)
sahilmgandhi 18:6a4db94011d3 168 SVC_Handler
sahilmgandhi 18:6a4db94011d3 169 B .
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 PUBWEAK PendSV_Handler
sahilmgandhi 18:6a4db94011d3 172 SECTION .text:CODE:REORDER:NOROOT(1)
sahilmgandhi 18:6a4db94011d3 173 PendSV_Handler
sahilmgandhi 18:6a4db94011d3 174 B .
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 PUBWEAK SysTick_Handler
sahilmgandhi 18:6a4db94011d3 177 SECTION .text:CODE:REORDER:NOROOT(1)
sahilmgandhi 18:6a4db94011d3 178 SysTick_Handler
sahilmgandhi 18:6a4db94011d3 179 B .
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181 PUBWEAK DMA0_IRQHandler
sahilmgandhi 18:6a4db94011d3 182 PUBWEAK DMA1_IRQHandler
sahilmgandhi 18:6a4db94011d3 183 PUBWEAK DMA2_IRQHandler
sahilmgandhi 18:6a4db94011d3 184 PUBWEAK DMA3_IRQHandler
sahilmgandhi 18:6a4db94011d3 185 PUBWEAK Reserved20_IRQHandler
sahilmgandhi 18:6a4db94011d3 186 PUBWEAK FTFA_IRQHandler
sahilmgandhi 18:6a4db94011d3 187 PUBWEAK LVD_LVW_IRQHandler
sahilmgandhi 18:6a4db94011d3 188 PUBWEAK LLWU_IRQHandler
sahilmgandhi 18:6a4db94011d3 189 PUBWEAK I2C0_IRQHandler
sahilmgandhi 18:6a4db94011d3 190 PUBWEAK I2C1_IRQHandler
sahilmgandhi 18:6a4db94011d3 191 PUBWEAK SPI0_IRQHandler
sahilmgandhi 18:6a4db94011d3 192 PUBWEAK SPI1_IRQHandler
sahilmgandhi 18:6a4db94011d3 193 PUBWEAK UART0_IRQHandler
sahilmgandhi 18:6a4db94011d3 194 PUBWEAK UART1_IRQHandler
sahilmgandhi 18:6a4db94011d3 195 PUBWEAK UART2_IRQHandler
sahilmgandhi 18:6a4db94011d3 196 PUBWEAK ADC0_IRQHandler
sahilmgandhi 18:6a4db94011d3 197 PUBWEAK CMP0_IRQHandler
sahilmgandhi 18:6a4db94011d3 198 PUBWEAK TPM0_IRQHandler
sahilmgandhi 18:6a4db94011d3 199 PUBWEAK TPM1_IRQHandler
sahilmgandhi 18:6a4db94011d3 200 PUBWEAK TPM2_IRQHandler
sahilmgandhi 18:6a4db94011d3 201 PUBWEAK RTC_IRQHandler
sahilmgandhi 18:6a4db94011d3 202 PUBWEAK RTC_Seconds_IRQHandler
sahilmgandhi 18:6a4db94011d3 203 PUBWEAK PIT_IRQHandler
sahilmgandhi 18:6a4db94011d3 204 PUBWEAK I2S0_IRQHandler
sahilmgandhi 18:6a4db94011d3 205 PUBWEAK USB0_IRQHandler
sahilmgandhi 18:6a4db94011d3 206 PUBWEAK DAC0_IRQHandler
sahilmgandhi 18:6a4db94011d3 207 PUBWEAK TSI0_IRQHandler
sahilmgandhi 18:6a4db94011d3 208 PUBWEAK MCG_IRQHandler
sahilmgandhi 18:6a4db94011d3 209 PUBWEAK LPTMR0_IRQHandler
sahilmgandhi 18:6a4db94011d3 210 PUBWEAK Reserved45_IRQHandler
sahilmgandhi 18:6a4db94011d3 211 PUBWEAK PORTA_IRQHandler
sahilmgandhi 18:6a4db94011d3 212 PUBWEAK PORTC_PORTD_IRQHandler
sahilmgandhi 18:6a4db94011d3 213 PUBWEAK DefaultISR
sahilmgandhi 18:6a4db94011d3 214 SECTION .text:CODE:REORDER:NOROOT(2)
sahilmgandhi 18:6a4db94011d3 215 DMA0_IRQHandler
sahilmgandhi 18:6a4db94011d3 216 DMA1_IRQHandler
sahilmgandhi 18:6a4db94011d3 217 DMA2_IRQHandler
sahilmgandhi 18:6a4db94011d3 218 DMA3_IRQHandler
sahilmgandhi 18:6a4db94011d3 219 Reserved20_IRQHandler
sahilmgandhi 18:6a4db94011d3 220 FTFA_IRQHandler
sahilmgandhi 18:6a4db94011d3 221 LVD_LVW_IRQHandler
sahilmgandhi 18:6a4db94011d3 222 LLWU_IRQHandler
sahilmgandhi 18:6a4db94011d3 223 I2C0_IRQHandler
sahilmgandhi 18:6a4db94011d3 224 I2C1_IRQHandler
sahilmgandhi 18:6a4db94011d3 225 SPI0_IRQHandler
sahilmgandhi 18:6a4db94011d3 226 SPI1_IRQHandler
sahilmgandhi 18:6a4db94011d3 227 UART0_IRQHandler
sahilmgandhi 18:6a4db94011d3 228 UART1_IRQHandler
sahilmgandhi 18:6a4db94011d3 229 UART2_IRQHandler
sahilmgandhi 18:6a4db94011d3 230 ADC0_IRQHandler
sahilmgandhi 18:6a4db94011d3 231 CMP0_IRQHandler
sahilmgandhi 18:6a4db94011d3 232 TPM0_IRQHandler
sahilmgandhi 18:6a4db94011d3 233 TPM1_IRQHandler
sahilmgandhi 18:6a4db94011d3 234 TPM2_IRQHandler
sahilmgandhi 18:6a4db94011d3 235 RTC_IRQHandler
sahilmgandhi 18:6a4db94011d3 236 RTC_Seconds_IRQHandler
sahilmgandhi 18:6a4db94011d3 237 PIT_IRQHandler
sahilmgandhi 18:6a4db94011d3 238 I2S0_IRQHandler
sahilmgandhi 18:6a4db94011d3 239 USB0_IRQHandler
sahilmgandhi 18:6a4db94011d3 240 DAC0_IRQHandler
sahilmgandhi 18:6a4db94011d3 241 TSI0_IRQHandler
sahilmgandhi 18:6a4db94011d3 242 MCG_IRQHandler
sahilmgandhi 18:6a4db94011d3 243 LPTMR0_IRQHandler
sahilmgandhi 18:6a4db94011d3 244 Reserved45_IRQHandler
sahilmgandhi 18:6a4db94011d3 245 PORTA_IRQHandler
sahilmgandhi 18:6a4db94011d3 246 PORTC_PORTD_IRQHandler
sahilmgandhi 18:6a4db94011d3 247 DefaultISR
sahilmgandhi 18:6a4db94011d3 248 LDR R0, =DefaultISR
sahilmgandhi 18:6a4db94011d3 249 BX R0
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 END