MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM4/lp_ticker.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2015 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16
sahilmgandhi 18:6a4db94011d3 17 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 18 #include <stddef.h>
sahilmgandhi 18:6a4db94011d3 19 #include "lp_ticker_api.h"
sahilmgandhi 18:6a4db94011d3 20 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 21 #include "sleep_api.h"
sahilmgandhi 18:6a4db94011d3 22 #include "compiler.h"
sahilmgandhi 18:6a4db94011d3 23 #include "sysclk.h"
sahilmgandhi 18:6a4db94011d3 24 #include "tc.h"
sahilmgandhi 18:6a4db94011d3 25 #include "us_ticker_api.h"
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 uint8_t lp_ticker_inited = 0;
sahilmgandhi 18:6a4db94011d3 28 extern volatile uint8_t us_ticker_inited;
sahilmgandhi 18:6a4db94011d3 29 extern uint8_t g_sys_init;
sahilmgandhi 18:6a4db94011d3 30 extern volatile uint32_t overflow32bitcounter;
sahilmgandhi 18:6a4db94011d3 31 volatile uint16_t lp_ticker_16bit_counter;
sahilmgandhi 18:6a4db94011d3 32 volatile uint16_t lp_ticker_interrupt_counter;
sahilmgandhi 18:6a4db94011d3 33 volatile uint16_t lp_ticker_interrupt_offset;
sahilmgandhi 18:6a4db94011d3 34 volatile uint32_t lpoverflow32bitcounter = 0;
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 #define TICKER_COUNTER_lp TC0
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 #define TICKER_COUNTER_CLK2 ID_TC2
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 #define TICKER_COUNTER_CHANNEL2 2
sahilmgandhi 18:6a4db94011d3 41 #define TICKER_COUNTER_IRQn2 TC2_IRQn
sahilmgandhi 18:6a4db94011d3 42 #define TICKER_COUNTER_Handlr2 TC2_Handler
sahilmgandhi 18:6a4db94011d3 43
sahilmgandhi 18:6a4db94011d3 44 #define OVERFLOW_16bit_VALUE 0xFFFF
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46
sahilmgandhi 18:6a4db94011d3 47 void TICKER_COUNTER_Handlr2(void)
sahilmgandhi 18:6a4db94011d3 48 {
sahilmgandhi 18:6a4db94011d3 49 uint32_t status=tc_get_status(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
sahilmgandhi 18:6a4db94011d3 50 uint32_t interrupmask=tc_get_interrupt_mask(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 if (((status & interrupmask) & TC_IER_CPCS)) {
sahilmgandhi 18:6a4db94011d3 53 if(lp_ticker_interrupt_counter) {
sahilmgandhi 18:6a4db94011d3 54 lp_ticker_interrupt_counter--;
sahilmgandhi 18:6a4db94011d3 55 } else {
sahilmgandhi 18:6a4db94011d3 56 if(lp_ticker_interrupt_offset) {
sahilmgandhi 18:6a4db94011d3 57 tc_stop(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
sahilmgandhi 18:6a4db94011d3 58 tc_write_rc(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, (uint32_t)lp_ticker_interrupt_offset);
sahilmgandhi 18:6a4db94011d3 59 tc_start(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
sahilmgandhi 18:6a4db94011d3 60 lp_ticker_interrupt_offset=0;
sahilmgandhi 18:6a4db94011d3 61 } else {
sahilmgandhi 18:6a4db94011d3 62 lp_ticker_irq_handler();
sahilmgandhi 18:6a4db94011d3 63 }
sahilmgandhi 18:6a4db94011d3 64 }
sahilmgandhi 18:6a4db94011d3 65 }
sahilmgandhi 18:6a4db94011d3 66 }
sahilmgandhi 18:6a4db94011d3 67
sahilmgandhi 18:6a4db94011d3 68 void lp_ticker_init(void)
sahilmgandhi 18:6a4db94011d3 69 {
sahilmgandhi 18:6a4db94011d3 70 if(lp_ticker_inited)
sahilmgandhi 18:6a4db94011d3 71 return;
sahilmgandhi 18:6a4db94011d3 72 if (!us_ticker_inited)
sahilmgandhi 18:6a4db94011d3 73 us_ticker_init();
sahilmgandhi 18:6a4db94011d3 74 sysclk_enable_peripheral_clock(TICKER_COUNTER_CLK2);
sahilmgandhi 18:6a4db94011d3 75 tc_init(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, TC_CMR_TCCLKS_TIMER_CLOCK4);
sahilmgandhi 18:6a4db94011d3 76 lp_ticker_inited = 1;
sahilmgandhi 18:6a4db94011d3 77 }
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 uint32_t lp_ticker_read()
sahilmgandhi 18:6a4db94011d3 80 {
sahilmgandhi 18:6a4db94011d3 81 if (!lp_ticker_inited)
sahilmgandhi 18:6a4db94011d3 82 lp_ticker_init();
sahilmgandhi 18:6a4db94011d3 83 return us_ticker_read();
sahilmgandhi 18:6a4db94011d3 84 }
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 void lp_ticker_set_interrupt(timestamp_t timestamp)
sahilmgandhi 18:6a4db94011d3 87 {
sahilmgandhi 18:6a4db94011d3 88 uint32_t cur_time;
sahilmgandhi 18:6a4db94011d3 89 int32_t delta;
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 cur_time = lp_ticker_read();
sahilmgandhi 18:6a4db94011d3 92 delta = (int32_t)((uint32_t)timestamp - cur_time);
sahilmgandhi 18:6a4db94011d3 93 if (delta < 0) {
sahilmgandhi 18:6a4db94011d3 94 /* Event already occurred in past */
sahilmgandhi 18:6a4db94011d3 95 lp_ticker_irq_handler();
sahilmgandhi 18:6a4db94011d3 96 return;
sahilmgandhi 18:6a4db94011d3 97 }
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 uint16_t interruptat=0;
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 if(delta > OVERFLOW_16bit_VALUE) {
sahilmgandhi 18:6a4db94011d3 102 lp_ticker_interrupt_counter= (delta/OVERFLOW_16bit_VALUE) -1;
sahilmgandhi 18:6a4db94011d3 103 lp_ticker_interrupt_offset=delta%OVERFLOW_16bit_VALUE;
sahilmgandhi 18:6a4db94011d3 104 interruptat=OVERFLOW_16bit_VALUE;
sahilmgandhi 18:6a4db94011d3 105 } else {
sahilmgandhi 18:6a4db94011d3 106 lp_ticker_interrupt_counter=0;
sahilmgandhi 18:6a4db94011d3 107 lp_ticker_interrupt_offset=0;
sahilmgandhi 18:6a4db94011d3 108 interruptat=delta;
sahilmgandhi 18:6a4db94011d3 109 }
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 NVIC_DisableIRQ(TICKER_COUNTER_IRQn2);
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 tc_write_rc(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, (uint32_t)interruptat);
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 NVIC_ClearPendingIRQ(TICKER_COUNTER_IRQn2);
sahilmgandhi 18:6a4db94011d3 116 NVIC_SetPriority(TICKER_COUNTER_IRQn2, 0);
sahilmgandhi 18:6a4db94011d3 117 NVIC_EnableIRQ(TICKER_COUNTER_IRQn2);
sahilmgandhi 18:6a4db94011d3 118 tc_enable_interrupt(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, TC_IDR_CPCS );
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 tc_start(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
sahilmgandhi 18:6a4db94011d3 121 }
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 void lp_ticker_disable_interrupt(void)
sahilmgandhi 18:6a4db94011d3 124 {
sahilmgandhi 18:6a4db94011d3 125 tc_stop(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
sahilmgandhi 18:6a4db94011d3 126 tc_disable_interrupt(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, TC_IDR_CPCS);
sahilmgandhi 18:6a4db94011d3 127 NVIC_DisableIRQ(TICKER_COUNTER_IRQn2);
sahilmgandhi 18:6a4db94011d3 128 }
sahilmgandhi 18:6a4db94011d3 129
sahilmgandhi 18:6a4db94011d3 130 void lp_ticker_clear_interrupt(void)
sahilmgandhi 18:6a4db94011d3 131 {
sahilmgandhi 18:6a4db94011d3 132 NVIC_ClearPendingIRQ(TICKER_COUNTER_IRQn2);
sahilmgandhi 18:6a4db94011d3 133 }