Mouse code for the MacroRat
mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/dma_api.c@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2006-2015 ARM Limited |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | #include "mbed_assert.h" |
sahilmgandhi | 18:6a4db94011d3 | 17 | #include "system.h" |
sahilmgandhi | 18:6a4db94011d3 | 18 | #include "dma_api.h" |
sahilmgandhi | 18:6a4db94011d3 | 19 | #include "dma_api_HAL.h" |
sahilmgandhi | 18:6a4db94011d3 | 20 | |
sahilmgandhi | 18:6a4db94011d3 | 21 | #include <math.h> |
sahilmgandhi | 18:6a4db94011d3 | 22 | |
sahilmgandhi | 18:6a4db94011d3 | 23 | #include "cmsis.h" |
sahilmgandhi | 18:6a4db94011d3 | 24 | #include "pinmap.h" |
sahilmgandhi | 18:6a4db94011d3 | 25 | |
sahilmgandhi | 18:6a4db94011d3 | 26 | /** |
sahilmgandhi | 18:6a4db94011d3 | 27 | * \internal |
sahilmgandhi | 18:6a4db94011d3 | 28 | * Structure redefinition, already defined in dma.c. |
sahilmgandhi | 18:6a4db94011d3 | 29 | * Redefining as that definition is not available here |
sahilmgandhi | 18:6a4db94011d3 | 30 | */ |
sahilmgandhi | 18:6a4db94011d3 | 31 | struct _dma_module { |
sahilmgandhi | 18:6a4db94011d3 | 32 | volatile bool _dma_init; |
sahilmgandhi | 18:6a4db94011d3 | 33 | volatile uint32_t allocated_channels; |
sahilmgandhi | 18:6a4db94011d3 | 34 | uint8_t free_channels; |
sahilmgandhi | 18:6a4db94011d3 | 35 | }; |
sahilmgandhi | 18:6a4db94011d3 | 36 | |
sahilmgandhi | 18:6a4db94011d3 | 37 | extern struct _dma_module _dma_inst; |
sahilmgandhi | 18:6a4db94011d3 | 38 | extern uint8_t g_sys_init; |
sahilmgandhi | 18:6a4db94011d3 | 39 | |
sahilmgandhi | 18:6a4db94011d3 | 40 | static struct dma_instance_s dma_channels[CONF_MAX_USED_CHANNEL_NUM]; |
sahilmgandhi | 18:6a4db94011d3 | 41 | |
sahilmgandhi | 18:6a4db94011d3 | 42 | /** |
sahilmgandhi | 18:6a4db94011d3 | 43 | * \internal |
sahilmgandhi | 18:6a4db94011d3 | 44 | * Get resource index from channel id |
sahilmgandhi | 18:6a4db94011d3 | 45 | * |
sahilmgandhi | 18:6a4db94011d3 | 46 | * @param[in] channelid Valid DMA channel id |
sahilmgandhi | 18:6a4db94011d3 | 47 | * @return index to DMA instance |
sahilmgandhi | 18:6a4db94011d3 | 48 | */ |
sahilmgandhi | 18:6a4db94011d3 | 49 | static uint8_t get_index_from_id(int channelid) |
sahilmgandhi | 18:6a4db94011d3 | 50 | { |
sahilmgandhi | 18:6a4db94011d3 | 51 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 52 | MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM); |
sahilmgandhi | 18:6a4db94011d3 | 53 | |
sahilmgandhi | 18:6a4db94011d3 | 54 | uint8_t i; |
sahilmgandhi | 18:6a4db94011d3 | 55 | |
sahilmgandhi | 18:6a4db94011d3 | 56 | for (i=0; i<CONF_MAX_USED_CHANNEL_NUM; i++) { |
sahilmgandhi | 18:6a4db94011d3 | 57 | if ((dma_channels[i].status & DMA_ALLOCATED) |
sahilmgandhi | 18:6a4db94011d3 | 58 | && (dma_channels[i].resource.channel_id == channelid)) { |
sahilmgandhi | 18:6a4db94011d3 | 59 | break; |
sahilmgandhi | 18:6a4db94011d3 | 60 | } |
sahilmgandhi | 18:6a4db94011d3 | 61 | } |
sahilmgandhi | 18:6a4db94011d3 | 62 | |
sahilmgandhi | 18:6a4db94011d3 | 63 | return i; |
sahilmgandhi | 18:6a4db94011d3 | 64 | } |
sahilmgandhi | 18:6a4db94011d3 | 65 | |
sahilmgandhi | 18:6a4db94011d3 | 66 | /** |
sahilmgandhi | 18:6a4db94011d3 | 67 | * \internal |
sahilmgandhi | 18:6a4db94011d3 | 68 | * Handler function for DMA callback |
sahilmgandhi | 18:6a4db94011d3 | 69 | * |
sahilmgandhi | 18:6a4db94011d3 | 70 | * @param[in] resource pointer to the resource |
sahilmgandhi | 18:6a4db94011d3 | 71 | * @return void |
sahilmgandhi | 18:6a4db94011d3 | 72 | */ |
sahilmgandhi | 18:6a4db94011d3 | 73 | static void dma_handler(const struct dma_resource* const resource) |
sahilmgandhi | 18:6a4db94011d3 | 74 | { |
sahilmgandhi | 18:6a4db94011d3 | 75 | MBED_ASSERT(resource); |
sahilmgandhi | 18:6a4db94011d3 | 76 | void (*callback_func)(void); |
sahilmgandhi | 18:6a4db94011d3 | 77 | |
sahilmgandhi | 18:6a4db94011d3 | 78 | uint8_t channelid = resource->channel_id; |
sahilmgandhi | 18:6a4db94011d3 | 79 | uint8_t channel_index; |
sahilmgandhi | 18:6a4db94011d3 | 80 | |
sahilmgandhi | 18:6a4db94011d3 | 81 | channel_index = get_index_from_id(channelid); |
sahilmgandhi | 18:6a4db94011d3 | 82 | if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) { |
sahilmgandhi | 18:6a4db94011d3 | 83 | return; |
sahilmgandhi | 18:6a4db94011d3 | 84 | } |
sahilmgandhi | 18:6a4db94011d3 | 85 | |
sahilmgandhi | 18:6a4db94011d3 | 86 | callback_func = (void(*)(void))(dma_channels[channel_index].handler); |
sahilmgandhi | 18:6a4db94011d3 | 87 | if (callback_func) { |
sahilmgandhi | 18:6a4db94011d3 | 88 | callback_func(); |
sahilmgandhi | 18:6a4db94011d3 | 89 | } |
sahilmgandhi | 18:6a4db94011d3 | 90 | } |
sahilmgandhi | 18:6a4db94011d3 | 91 | |
sahilmgandhi | 18:6a4db94011d3 | 92 | /** |
sahilmgandhi | 18:6a4db94011d3 | 93 | * \internal |
sahilmgandhi | 18:6a4db94011d3 | 94 | * Configure a DMA channel for specified resource |
sahilmgandhi | 18:6a4db94011d3 | 95 | * |
sahilmgandhi | 18:6a4db94011d3 | 96 | * @param[in] channel_index index to the resource |
sahilmgandhi | 18:6a4db94011d3 | 97 | * @return void |
sahilmgandhi | 18:6a4db94011d3 | 98 | */ |
sahilmgandhi | 18:6a4db94011d3 | 99 | static void configure_dma_resource(uint8_t channel_index) |
sahilmgandhi | 18:6a4db94011d3 | 100 | { |
sahilmgandhi | 18:6a4db94011d3 | 101 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 102 | MBED_ASSERT(channel_index < CONF_MAX_USED_CHANNEL_NUM); |
sahilmgandhi | 18:6a4db94011d3 | 103 | |
sahilmgandhi | 18:6a4db94011d3 | 104 | enum status_code ret; |
sahilmgandhi | 18:6a4db94011d3 | 105 | struct dma_resource_config config; |
sahilmgandhi | 18:6a4db94011d3 | 106 | |
sahilmgandhi | 18:6a4db94011d3 | 107 | if (dma_channels[channel_index].status & DMA_ALLOCATED) { |
sahilmgandhi | 18:6a4db94011d3 | 108 | return; |
sahilmgandhi | 18:6a4db94011d3 | 109 | } |
sahilmgandhi | 18:6a4db94011d3 | 110 | |
sahilmgandhi | 18:6a4db94011d3 | 111 | /* Get default configuration for DMA */ |
sahilmgandhi | 18:6a4db94011d3 | 112 | dma_get_config_defaults(&config); |
sahilmgandhi | 18:6a4db94011d3 | 113 | |
sahilmgandhi | 18:6a4db94011d3 | 114 | /* Allocate a free channel */ |
sahilmgandhi | 18:6a4db94011d3 | 115 | ret = dma_allocate(&dma_channels[channel_index].resource, &config); |
sahilmgandhi | 18:6a4db94011d3 | 116 | |
sahilmgandhi | 18:6a4db94011d3 | 117 | if (ret == STATUS_OK) { |
sahilmgandhi | 18:6a4db94011d3 | 118 | dma_channels[channel_index].status = DMA_ALLOCATED; |
sahilmgandhi | 18:6a4db94011d3 | 119 | } |
sahilmgandhi | 18:6a4db94011d3 | 120 | } |
sahilmgandhi | 18:6a4db94011d3 | 121 | |
sahilmgandhi | 18:6a4db94011d3 | 122 | /** Setup a DMA descriptor for specified resource |
sahilmgandhi | 18:6a4db94011d3 | 123 | * |
sahilmgandhi | 18:6a4db94011d3 | 124 | * @param[in] channel_index DMA channel id |
sahilmgandhi | 18:6a4db94011d3 | 125 | * @param[in] src source address |
sahilmgandhi | 18:6a4db94011d3 | 126 | * @param[in] src_inc_enable source address auto increment enable flag |
sahilmgandhi | 18:6a4db94011d3 | 127 | * @param[in] desc destination address |
sahilmgandhi | 18:6a4db94011d3 | 128 | * @param[in] desc_inc_enable destination address auto increment enable flag |
sahilmgandhi | 18:6a4db94011d3 | 129 | * @param[in] length length of data to be transferred |
sahilmgandhi | 18:6a4db94011d3 | 130 | * @param[in] beat_size beat size to be set |
sahilmgandhi | 18:6a4db94011d3 | 131 | * @return void |
sahilmgandhi | 18:6a4db94011d3 | 132 | */ |
sahilmgandhi | 18:6a4db94011d3 | 133 | void dma_setup_transfer(uint8_t channelid, uint32_t src, bool src_inc_enable, uint32_t desc, bool desc_inc_enable, uint32_t length, uint8_t beat_size) |
sahilmgandhi | 18:6a4db94011d3 | 134 | { |
sahilmgandhi | 18:6a4db94011d3 | 135 | enum status_code result; |
sahilmgandhi | 18:6a4db94011d3 | 136 | uint8_t channel_index; |
sahilmgandhi | 18:6a4db94011d3 | 137 | struct dma_descriptor_config descriptor_config; |
sahilmgandhi | 18:6a4db94011d3 | 138 | |
sahilmgandhi | 18:6a4db94011d3 | 139 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 140 | MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM); |
sahilmgandhi | 18:6a4db94011d3 | 141 | MBED_ASSERT(src); |
sahilmgandhi | 18:6a4db94011d3 | 142 | MBED_ASSERT(desc); |
sahilmgandhi | 18:6a4db94011d3 | 143 | |
sahilmgandhi | 18:6a4db94011d3 | 144 | channel_index = get_index_from_id(channelid); |
sahilmgandhi | 18:6a4db94011d3 | 145 | |
sahilmgandhi | 18:6a4db94011d3 | 146 | dma_descriptor_get_config_defaults(&descriptor_config); |
sahilmgandhi | 18:6a4db94011d3 | 147 | |
sahilmgandhi | 18:6a4db94011d3 | 148 | if (beat_size <= 8) { |
sahilmgandhi | 18:6a4db94011d3 | 149 | descriptor_config.beat_size = DMA_BEAT_SIZE_BYTE; |
sahilmgandhi | 18:6a4db94011d3 | 150 | } else if ((beat_size > 8) && (beat_size <= 16)) { |
sahilmgandhi | 18:6a4db94011d3 | 151 | descriptor_config.beat_size = DMA_BEAT_SIZE_HWORD; |
sahilmgandhi | 18:6a4db94011d3 | 152 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 153 | descriptor_config.beat_size = DMA_BEAT_SIZE_WORD; |
sahilmgandhi | 18:6a4db94011d3 | 154 | } |
sahilmgandhi | 18:6a4db94011d3 | 155 | descriptor_config.block_transfer_count = length; |
sahilmgandhi | 18:6a4db94011d3 | 156 | descriptor_config.source_address = src; |
sahilmgandhi | 18:6a4db94011d3 | 157 | descriptor_config.destination_address = desc; |
sahilmgandhi | 18:6a4db94011d3 | 158 | |
sahilmgandhi | 18:6a4db94011d3 | 159 | /* Source address auto-increment is enabled by default */ |
sahilmgandhi | 18:6a4db94011d3 | 160 | if (!src_inc_enable) { |
sahilmgandhi | 18:6a4db94011d3 | 161 | descriptor_config.src_increment_enable = false; |
sahilmgandhi | 18:6a4db94011d3 | 162 | } |
sahilmgandhi | 18:6a4db94011d3 | 163 | |
sahilmgandhi | 18:6a4db94011d3 | 164 | /* Destination address auto-increment is enabled by default */ |
sahilmgandhi | 18:6a4db94011d3 | 165 | if (!desc_inc_enable) { |
sahilmgandhi | 18:6a4db94011d3 | 166 | descriptor_config.dst_increment_enable = false; |
sahilmgandhi | 18:6a4db94011d3 | 167 | } |
sahilmgandhi | 18:6a4db94011d3 | 168 | |
sahilmgandhi | 18:6a4db94011d3 | 169 | dma_descriptor_create(&dma_channels[channel_index].descriptor, &descriptor_config); |
sahilmgandhi | 18:6a4db94011d3 | 170 | |
sahilmgandhi | 18:6a4db94011d3 | 171 | /* Add descriptor to resource */ |
sahilmgandhi | 18:6a4db94011d3 | 172 | if (dma_channels[channel_index].resource.descriptor == NULL) { |
sahilmgandhi | 18:6a4db94011d3 | 173 | /* Multiple calls to this function without releasing already allocated channel is not handled now */ |
sahilmgandhi | 18:6a4db94011d3 | 174 | result = dma_add_descriptor(&dma_channels[channel_index].resource, &dma_channels[channel_index].descriptor); |
sahilmgandhi | 18:6a4db94011d3 | 175 | if (result != STATUS_OK) { |
sahilmgandhi | 18:6a4db94011d3 | 176 | dma_channels[channel_index].status |= DMA_ERROR; |
sahilmgandhi | 18:6a4db94011d3 | 177 | } |
sahilmgandhi | 18:6a4db94011d3 | 178 | } |
sahilmgandhi | 18:6a4db94011d3 | 179 | } |
sahilmgandhi | 18:6a4db94011d3 | 180 | |
sahilmgandhi | 18:6a4db94011d3 | 181 | |
sahilmgandhi | 18:6a4db94011d3 | 182 | /** Initialize the DMA |
sahilmgandhi | 18:6a4db94011d3 | 183 | * |
sahilmgandhi | 18:6a4db94011d3 | 184 | * Configures clock for DMAC |
sahilmgandhi | 18:6a4db94011d3 | 185 | */ |
sahilmgandhi | 18:6a4db94011d3 | 186 | void dma_init() |
sahilmgandhi | 18:6a4db94011d3 | 187 | { |
sahilmgandhi | 18:6a4db94011d3 | 188 | int i; |
sahilmgandhi | 18:6a4db94011d3 | 189 | |
sahilmgandhi | 18:6a4db94011d3 | 190 | if (g_sys_init == 0) { |
sahilmgandhi | 18:6a4db94011d3 | 191 | system_init(); |
sahilmgandhi | 18:6a4db94011d3 | 192 | g_sys_init = 1; |
sahilmgandhi | 18:6a4db94011d3 | 193 | } |
sahilmgandhi | 18:6a4db94011d3 | 194 | |
sahilmgandhi | 18:6a4db94011d3 | 195 | if (!_dma_inst._dma_init) { |
sahilmgandhi | 18:6a4db94011d3 | 196 | for (i=0; i<CONF_MAX_USED_CHANNEL_NUM; i++) { |
sahilmgandhi | 18:6a4db94011d3 | 197 | dma_channels[i].status = DMA_NOT_USED; |
sahilmgandhi | 18:6a4db94011d3 | 198 | } |
sahilmgandhi | 18:6a4db94011d3 | 199 | } |
sahilmgandhi | 18:6a4db94011d3 | 200 | /* Do nothing for now. ASF does the clock init when allocating channel */ |
sahilmgandhi | 18:6a4db94011d3 | 201 | } |
sahilmgandhi | 18:6a4db94011d3 | 202 | |
sahilmgandhi | 18:6a4db94011d3 | 203 | /** Allocates channel for DMA |
sahilmgandhi | 18:6a4db94011d3 | 204 | * |
sahilmgandhi | 18:6a4db94011d3 | 205 | * Allocates channel for DMA with specified capability |
sahilmgandhi | 18:6a4db94011d3 | 206 | * @param[in] capabilities Capability of DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 207 | */ |
sahilmgandhi | 18:6a4db94011d3 | 208 | int dma_channel_allocate(uint32_t capabilities) |
sahilmgandhi | 18:6a4db94011d3 | 209 | { |
sahilmgandhi | 18:6a4db94011d3 | 210 | uint8_t channel_index = 0; |
sahilmgandhi | 18:6a4db94011d3 | 211 | |
sahilmgandhi | 18:6a4db94011d3 | 212 | for (channel_index=0; channel_index<CONF_MAX_USED_CHANNEL_NUM; channel_index++) { |
sahilmgandhi | 18:6a4db94011d3 | 213 | if (dma_channels[channel_index].status == DMA_NOT_USED) { |
sahilmgandhi | 18:6a4db94011d3 | 214 | break; |
sahilmgandhi | 18:6a4db94011d3 | 215 | } |
sahilmgandhi | 18:6a4db94011d3 | 216 | } |
sahilmgandhi | 18:6a4db94011d3 | 217 | |
sahilmgandhi | 18:6a4db94011d3 | 218 | if (channel_index != CONF_MAX_USED_CHANNEL_NUM) { |
sahilmgandhi | 18:6a4db94011d3 | 219 | configure_dma_resource(channel_index); |
sahilmgandhi | 18:6a4db94011d3 | 220 | if (dma_channels[channel_index].status & DMA_ALLOCATED) { |
sahilmgandhi | 18:6a4db94011d3 | 221 | return dma_channels[channel_index].resource.channel_id; |
sahilmgandhi | 18:6a4db94011d3 | 222 | } |
sahilmgandhi | 18:6a4db94011d3 | 223 | } |
sahilmgandhi | 18:6a4db94011d3 | 224 | |
sahilmgandhi | 18:6a4db94011d3 | 225 | /* Couldn't find a channel. */ |
sahilmgandhi | 18:6a4db94011d3 | 226 | return DMA_ERROR_OUT_OF_CHANNELS; |
sahilmgandhi | 18:6a4db94011d3 | 227 | } |
sahilmgandhi | 18:6a4db94011d3 | 228 | |
sahilmgandhi | 18:6a4db94011d3 | 229 | /** Start DMA transfer |
sahilmgandhi | 18:6a4db94011d3 | 230 | * |
sahilmgandhi | 18:6a4db94011d3 | 231 | * Kick starts transfer in DMA channel with specified channel id |
sahilmgandhi | 18:6a4db94011d3 | 232 | * @param[in] channelid Channel id of DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 233 | * @return zero if success otherwise non zero |
sahilmgandhi | 18:6a4db94011d3 | 234 | */ |
sahilmgandhi | 18:6a4db94011d3 | 235 | bool dma_start_transfer(int channelid) |
sahilmgandhi | 18:6a4db94011d3 | 236 | { |
sahilmgandhi | 18:6a4db94011d3 | 237 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 238 | MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM); |
sahilmgandhi | 18:6a4db94011d3 | 239 | |
sahilmgandhi | 18:6a4db94011d3 | 240 | uint8_t channel_index; |
sahilmgandhi | 18:6a4db94011d3 | 241 | |
sahilmgandhi | 18:6a4db94011d3 | 242 | channel_index = get_index_from_id(channelid); |
sahilmgandhi | 18:6a4db94011d3 | 243 | |
sahilmgandhi | 18:6a4db94011d3 | 244 | if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) { |
sahilmgandhi | 18:6a4db94011d3 | 245 | /* Return invalid value for now */ |
sahilmgandhi | 18:6a4db94011d3 | 246 | return false; |
sahilmgandhi | 18:6a4db94011d3 | 247 | } |
sahilmgandhi | 18:6a4db94011d3 | 248 | |
sahilmgandhi | 18:6a4db94011d3 | 249 | if (!(dma_channels[channel_index].status & DMA_ALLOCATED)) { |
sahilmgandhi | 18:6a4db94011d3 | 250 | /* DMA not allocated, return invalid value for now */ |
sahilmgandhi | 18:6a4db94011d3 | 251 | return false; |
sahilmgandhi | 18:6a4db94011d3 | 252 | } |
sahilmgandhi | 18:6a4db94011d3 | 253 | |
sahilmgandhi | 18:6a4db94011d3 | 254 | /* Start DMA transfer */ |
sahilmgandhi | 18:6a4db94011d3 | 255 | if (STATUS_OK != dma_start_transfer_job(&dma_channels[channel_index].resource)) { |
sahilmgandhi | 18:6a4db94011d3 | 256 | /* Error in starting DMA transfer */ |
sahilmgandhi | 18:6a4db94011d3 | 257 | return false; |
sahilmgandhi | 18:6a4db94011d3 | 258 | } |
sahilmgandhi | 18:6a4db94011d3 | 259 | |
sahilmgandhi | 18:6a4db94011d3 | 260 | return true; |
sahilmgandhi | 18:6a4db94011d3 | 261 | } |
sahilmgandhi | 18:6a4db94011d3 | 262 | |
sahilmgandhi | 18:6a4db94011d3 | 263 | /** DMA channel busy check |
sahilmgandhi | 18:6a4db94011d3 | 264 | * |
sahilmgandhi | 18:6a4db94011d3 | 265 | * To check whether DMA channel is busy with a job or not |
sahilmgandhi | 18:6a4db94011d3 | 266 | * @param[in] channelid Channel id of DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 267 | * @return non zero if busy otherwise zero |
sahilmgandhi | 18:6a4db94011d3 | 268 | */ |
sahilmgandhi | 18:6a4db94011d3 | 269 | bool dma_busy(int channelid) |
sahilmgandhi | 18:6a4db94011d3 | 270 | { |
sahilmgandhi | 18:6a4db94011d3 | 271 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 272 | MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM); |
sahilmgandhi | 18:6a4db94011d3 | 273 | |
sahilmgandhi | 18:6a4db94011d3 | 274 | uint8_t channel_index; |
sahilmgandhi | 18:6a4db94011d3 | 275 | |
sahilmgandhi | 18:6a4db94011d3 | 276 | channel_index = get_index_from_id(channelid); |
sahilmgandhi | 18:6a4db94011d3 | 277 | |
sahilmgandhi | 18:6a4db94011d3 | 278 | if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) { |
sahilmgandhi | 18:6a4db94011d3 | 279 | /* This channel is not active! return zero for now */ |
sahilmgandhi | 18:6a4db94011d3 | 280 | //res = 0; |
sahilmgandhi | 18:6a4db94011d3 | 281 | return 0; |
sahilmgandhi | 18:6a4db94011d3 | 282 | } |
sahilmgandhi | 18:6a4db94011d3 | 283 | |
sahilmgandhi | 18:6a4db94011d3 | 284 | return dma_is_busy(&dma_channels[channel_index].resource); |
sahilmgandhi | 18:6a4db94011d3 | 285 | } |
sahilmgandhi | 18:6a4db94011d3 | 286 | |
sahilmgandhi | 18:6a4db94011d3 | 287 | /** DMA channel transfer completion check |
sahilmgandhi | 18:6a4db94011d3 | 288 | * |
sahilmgandhi | 18:6a4db94011d3 | 289 | * To check whether DMA channel job is completed or not |
sahilmgandhi | 18:6a4db94011d3 | 290 | * @param[in] channelid Channel id of DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 291 | * @return non zero if busy otherwise zero |
sahilmgandhi | 18:6a4db94011d3 | 292 | */ |
sahilmgandhi | 18:6a4db94011d3 | 293 | bool dma_is_transfer_complete(int channelid) |
sahilmgandhi | 18:6a4db94011d3 | 294 | { |
sahilmgandhi | 18:6a4db94011d3 | 295 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 296 | MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM); |
sahilmgandhi | 18:6a4db94011d3 | 297 | |
sahilmgandhi | 18:6a4db94011d3 | 298 | uint8_t channel_index; |
sahilmgandhi | 18:6a4db94011d3 | 299 | |
sahilmgandhi | 18:6a4db94011d3 | 300 | channel_index = get_index_from_id(channelid); |
sahilmgandhi | 18:6a4db94011d3 | 301 | |
sahilmgandhi | 18:6a4db94011d3 | 302 | if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) { |
sahilmgandhi | 18:6a4db94011d3 | 303 | /* This channel is not active! return zero for now */ |
sahilmgandhi | 18:6a4db94011d3 | 304 | // res = 0; |
sahilmgandhi | 18:6a4db94011d3 | 305 | return 0; |
sahilmgandhi | 18:6a4db94011d3 | 306 | } |
sahilmgandhi | 18:6a4db94011d3 | 307 | |
sahilmgandhi | 18:6a4db94011d3 | 308 | return (STATUS_OK == dma_get_job_status(&dma_channels[channel_index].resource)); |
sahilmgandhi | 18:6a4db94011d3 | 309 | } |
sahilmgandhi | 18:6a4db94011d3 | 310 | |
sahilmgandhi | 18:6a4db94011d3 | 311 | /** Registers callback function for DMA |
sahilmgandhi | 18:6a4db94011d3 | 312 | * |
sahilmgandhi | 18:6a4db94011d3 | 313 | * Registers callback function for DMA for specified events |
sahilmgandhi | 18:6a4db94011d3 | 314 | * @param[in] channelid Channel id of DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 315 | * @param[in] handler Callback function pointer |
sahilmgandhi | 18:6a4db94011d3 | 316 | * @param[in] event Events mask |
sahilmgandhi | 18:6a4db94011d3 | 317 | * @return void |
sahilmgandhi | 18:6a4db94011d3 | 318 | */ |
sahilmgandhi | 18:6a4db94011d3 | 319 | void dma_set_handler(int channelid, uint32_t handler, uint32_t event) |
sahilmgandhi | 18:6a4db94011d3 | 320 | { |
sahilmgandhi | 18:6a4db94011d3 | 321 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 322 | MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM); |
sahilmgandhi | 18:6a4db94011d3 | 323 | |
sahilmgandhi | 18:6a4db94011d3 | 324 | uint8_t channel_index; |
sahilmgandhi | 18:6a4db94011d3 | 325 | |
sahilmgandhi | 18:6a4db94011d3 | 326 | channel_index = get_index_from_id(channelid); |
sahilmgandhi | 18:6a4db94011d3 | 327 | |
sahilmgandhi | 18:6a4db94011d3 | 328 | if (channel_index >= CONF_MAX_USED_CHANNEL_NUM) { |
sahilmgandhi | 18:6a4db94011d3 | 329 | /* Return for now */ |
sahilmgandhi | 18:6a4db94011d3 | 330 | return; |
sahilmgandhi | 18:6a4db94011d3 | 331 | } |
sahilmgandhi | 18:6a4db94011d3 | 332 | |
sahilmgandhi | 18:6a4db94011d3 | 333 | dma_channels[channel_index].handler = handler; |
sahilmgandhi | 18:6a4db94011d3 | 334 | if (event & DMA_TRANSFER_ERROR) { |
sahilmgandhi | 18:6a4db94011d3 | 335 | dma_register_callback(&dma_channels[channel_index].resource, (dma_callback_t)dma_handler, DMA_CALLBACK_TRANSFER_ERROR); |
sahilmgandhi | 18:6a4db94011d3 | 336 | } |
sahilmgandhi | 18:6a4db94011d3 | 337 | if (event & DMA_TRANSFER_COMPLETE) { |
sahilmgandhi | 18:6a4db94011d3 | 338 | dma_register_callback(&dma_channels[channel_index].resource, (dma_callback_t)dma_handler, DMA_CALLBACK_TRANSFER_DONE); |
sahilmgandhi | 18:6a4db94011d3 | 339 | } |
sahilmgandhi | 18:6a4db94011d3 | 340 | |
sahilmgandhi | 18:6a4db94011d3 | 341 | /* Set interrupt vector if someone have removed it */ |
sahilmgandhi | 18:6a4db94011d3 | 342 | NVIC_SetVector(DMAC_IRQn, (uint32_t)DMAC_Handler); |
sahilmgandhi | 18:6a4db94011d3 | 343 | /* Enable interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 344 | NVIC_EnableIRQ(DMAC_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 345 | } |
sahilmgandhi | 18:6a4db94011d3 | 346 | |
sahilmgandhi | 18:6a4db94011d3 | 347 | /** Frees an allocated DMA channel |
sahilmgandhi | 18:6a4db94011d3 | 348 | * |
sahilmgandhi | 18:6a4db94011d3 | 349 | * Frees an already allocated DMA channel with specified channel id |
sahilmgandhi | 18:6a4db94011d3 | 350 | * @param[in] channelid Channel id of DMA channel to be disabled |
sahilmgandhi | 18:6a4db94011d3 | 351 | * @return zero if success |
sahilmgandhi | 18:6a4db94011d3 | 352 | */ |
sahilmgandhi | 18:6a4db94011d3 | 353 | int dma_channel_free(int channelid) |
sahilmgandhi | 18:6a4db94011d3 | 354 | { |
sahilmgandhi | 18:6a4db94011d3 | 355 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 356 | MBED_ASSERT(channelid < CONF_MAX_USED_CHANNEL_NUM); |
sahilmgandhi | 18:6a4db94011d3 | 357 | |
sahilmgandhi | 18:6a4db94011d3 | 358 | uint8_t channel_index; |
sahilmgandhi | 18:6a4db94011d3 | 359 | |
sahilmgandhi | 18:6a4db94011d3 | 360 | channel_index = get_index_from_id(channelid); |
sahilmgandhi | 18:6a4db94011d3 | 361 | |
sahilmgandhi | 18:6a4db94011d3 | 362 | if (STATUS_OK == dma_free(&dma_channels[channel_index].resource)) { |
sahilmgandhi | 18:6a4db94011d3 | 363 | dma_channels[channel_index].status = DMA_NOT_USED; |
sahilmgandhi | 18:6a4db94011d3 | 364 | dma_channels[channel_index].resource.descriptor = NULL; |
sahilmgandhi | 18:6a4db94011d3 | 365 | return 0; |
sahilmgandhi | 18:6a4db94011d3 | 366 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 367 | /* Return invalid value for now */ |
sahilmgandhi | 18:6a4db94011d3 | 368 | return -1; |
sahilmgandhi | 18:6a4db94011d3 | 369 | } |
sahilmgandhi | 18:6a4db94011d3 | 370 | } |
sahilmgandhi | 18:6a4db94011d3 | 371 | |
sahilmgandhi | 18:6a4db94011d3 | 372 |