Mouse code for the MacroRat
mbed-dev/targets/TARGET_ARM_SSG/TARGET_IOTSS/PeripheralNames.h@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2006-2015 ARM Limited |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | #ifndef MBED_PERIPHERALNAMES_H |
sahilmgandhi | 18:6a4db94011d3 | 17 | #define MBED_PERIPHERALNAMES_H |
sahilmgandhi | 18:6a4db94011d3 | 18 | |
sahilmgandhi | 18:6a4db94011d3 | 19 | #include "cmsis.h" |
sahilmgandhi | 18:6a4db94011d3 | 20 | |
sahilmgandhi | 18:6a4db94011d3 | 21 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 22 | extern "C" { |
sahilmgandhi | 18:6a4db94011d3 | 23 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 24 | |
sahilmgandhi | 18:6a4db94011d3 | 25 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 26 | UART_0 = (int)CMSDK_UART1_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 27 | UART_1 = (int)CMSDK_UART3_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 28 | UART_2 = (int)CMSDK_UART0_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 29 | UART_3 = (int)CMSDK_UART2_BASE |
sahilmgandhi | 18:6a4db94011d3 | 30 | } UARTName; |
sahilmgandhi | 18:6a4db94011d3 | 31 | |
sahilmgandhi | 18:6a4db94011d3 | 32 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 33 | I2C_0 = (int)MPS2_TSC_I2C_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 34 | I2C_1 = (int)MPS2_AAIC_I2C_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 35 | I2C_2 = (int)MPS2_SHIELD0_I2C_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 36 | I2C_3 = (int)MPS2_SHIELD1_I2C_BASE |
sahilmgandhi | 18:6a4db94011d3 | 37 | |
sahilmgandhi | 18:6a4db94011d3 | 38 | } I2CName; |
sahilmgandhi | 18:6a4db94011d3 | 39 | |
sahilmgandhi | 18:6a4db94011d3 | 40 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 41 | ADC0_0 = 0, |
sahilmgandhi | 18:6a4db94011d3 | 42 | ADC0_1, |
sahilmgandhi | 18:6a4db94011d3 | 43 | ADC0_2, |
sahilmgandhi | 18:6a4db94011d3 | 44 | ADC0_3, |
sahilmgandhi | 18:6a4db94011d3 | 45 | ADC0_4, |
sahilmgandhi | 18:6a4db94011d3 | 46 | ADC0_5, |
sahilmgandhi | 18:6a4db94011d3 | 47 | ADC0_6, |
sahilmgandhi | 18:6a4db94011d3 | 48 | ADC0_7, |
sahilmgandhi | 18:6a4db94011d3 | 49 | ADC0_8, |
sahilmgandhi | 18:6a4db94011d3 | 50 | ADC0_9, |
sahilmgandhi | 18:6a4db94011d3 | 51 | ADC0_10, |
sahilmgandhi | 18:6a4db94011d3 | 52 | ADC0_11 |
sahilmgandhi | 18:6a4db94011d3 | 53 | } ADCName; |
sahilmgandhi | 18:6a4db94011d3 | 54 | |
sahilmgandhi | 18:6a4db94011d3 | 55 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 56 | SPI_0 = (int)MPS2_SSP0_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 57 | SPI_1 = (int)MPS2_SSP1_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 58 | SPI_2 = (int)MPS2_SSP2_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 59 | SPI_3 = (int)MPS2_SSP3_BASE, |
sahilmgandhi | 18:6a4db94011d3 | 60 | SPI_4 = (int)MPS2_SSP4_BASE |
sahilmgandhi | 18:6a4db94011d3 | 61 | } SPIName; |
sahilmgandhi | 18:6a4db94011d3 | 62 | |
sahilmgandhi | 18:6a4db94011d3 | 63 | typedef enum { |
sahilmgandhi | 18:6a4db94011d3 | 64 | PWM_1 = 0, |
sahilmgandhi | 18:6a4db94011d3 | 65 | PWM_2, |
sahilmgandhi | 18:6a4db94011d3 | 66 | PWM_3, |
sahilmgandhi | 18:6a4db94011d3 | 67 | PWM_4, |
sahilmgandhi | 18:6a4db94011d3 | 68 | PWM_5, |
sahilmgandhi | 18:6a4db94011d3 | 69 | PWM_6, |
sahilmgandhi | 18:6a4db94011d3 | 70 | PWM_7, |
sahilmgandhi | 18:6a4db94011d3 | 71 | PWM_8, |
sahilmgandhi | 18:6a4db94011d3 | 72 | PWM_9, |
sahilmgandhi | 18:6a4db94011d3 | 73 | PWM_10, |
sahilmgandhi | 18:6a4db94011d3 | 74 | PWM_11 |
sahilmgandhi | 18:6a4db94011d3 | 75 | } PWMName; |
sahilmgandhi | 18:6a4db94011d3 | 76 | |
sahilmgandhi | 18:6a4db94011d3 | 77 | #define STDIO_UART_TX USBTX |
sahilmgandhi | 18:6a4db94011d3 | 78 | #define STDIO_UART_RX USBRX |
sahilmgandhi | 18:6a4db94011d3 | 79 | #define STDIO_UART UART_0 |
sahilmgandhi | 18:6a4db94011d3 | 80 | |
sahilmgandhi | 18:6a4db94011d3 | 81 | #define MBED_UART0 USBTX, USBRX |
sahilmgandhi | 18:6a4db94011d3 | 82 | #define MBED_UART1 XB_TX, XB_RX |
sahilmgandhi | 18:6a4db94011d3 | 83 | #define MBED_UART2 SH0_TX, SH0_RX |
sahilmgandhi | 18:6a4db94011d3 | 84 | #define MBED_UART3 SH1_TX, SH1_RX |
sahilmgandhi | 18:6a4db94011d3 | 85 | #define MBED_UARTUSB USBTX, USBRX |
sahilmgandhi | 18:6a4db94011d3 | 86 | |
sahilmgandhi | 18:6a4db94011d3 | 87 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 88 | } |
sahilmgandhi | 18:6a4db94011d3 | 89 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 90 | |
sahilmgandhi | 18:6a4db94011d3 | 91 | #endif |