Mouse code for the MacroRat
mbed-dev/cmsis/core_cmSecureAccess.h@32:69acb14778ea, 2017-05-26 (annotated)
- Committer:
- kyleliangus
- Date:
- Fri May 26 03:46:03 2017 +0000
- Revision:
- 32:69acb14778ea
- Parent:
- 18:6a4db94011d3
PID values still wonky. IR PID vs Encoder PID also wonky
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /**************************************************************************//** |
sahilmgandhi | 18:6a4db94011d3 | 2 | * @file core_cmSecureAccess.h |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @brief CMSIS Cortex-M Core Secure Access Header File |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @version XXX |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @date 10. June 2016 |
sahilmgandhi | 18:6a4db94011d3 | 6 | * |
sahilmgandhi | 18:6a4db94011d3 | 7 | * @note |
sahilmgandhi | 18:6a4db94011d3 | 8 | * |
sahilmgandhi | 18:6a4db94011d3 | 9 | ******************************************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 10 | /* Copyright (c) 2016 ARM LIMITED |
sahilmgandhi | 18:6a4db94011d3 | 11 | |
sahilmgandhi | 18:6a4db94011d3 | 12 | All rights reserved. |
sahilmgandhi | 18:6a4db94011d3 | 13 | Redistribution and use in source and binary forms, with or without |
sahilmgandhi | 18:6a4db94011d3 | 14 | modification, are permitted provided that the following conditions are met: |
sahilmgandhi | 18:6a4db94011d3 | 15 | - Redistributions of source code must retain the above copyright |
sahilmgandhi | 18:6a4db94011d3 | 16 | notice, this list of conditions and the following disclaimer. |
sahilmgandhi | 18:6a4db94011d3 | 17 | - Redistributions in binary form must reproduce the above copyright |
sahilmgandhi | 18:6a4db94011d3 | 18 | notice, this list of conditions and the following disclaimer in the |
sahilmgandhi | 18:6a4db94011d3 | 19 | documentation and/or other materials provided with the distribution. |
sahilmgandhi | 18:6a4db94011d3 | 20 | - Neither the name of ARM nor the names of its contributors may be used |
sahilmgandhi | 18:6a4db94011d3 | 21 | to endorse or promote products derived from this software without |
sahilmgandhi | 18:6a4db94011d3 | 22 | specific prior written permission. |
sahilmgandhi | 18:6a4db94011d3 | 23 | * |
sahilmgandhi | 18:6a4db94011d3 | 24 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
sahilmgandhi | 18:6a4db94011d3 | 25 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
sahilmgandhi | 18:6a4db94011d3 | 26 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
sahilmgandhi | 18:6a4db94011d3 | 27 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
sahilmgandhi | 18:6a4db94011d3 | 28 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
sahilmgandhi | 18:6a4db94011d3 | 29 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
sahilmgandhi | 18:6a4db94011d3 | 30 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
sahilmgandhi | 18:6a4db94011d3 | 31 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
sahilmgandhi | 18:6a4db94011d3 | 32 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
sahilmgandhi | 18:6a4db94011d3 | 33 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
sahilmgandhi | 18:6a4db94011d3 | 34 | POSSIBILITY OF SUCH DAMAGE. |
sahilmgandhi | 18:6a4db94011d3 | 35 | ---------------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 36 | |
sahilmgandhi | 18:6a4db94011d3 | 37 | |
sahilmgandhi | 18:6a4db94011d3 | 38 | #ifndef __CORE_CM_SECURE_ACCESS_H |
sahilmgandhi | 18:6a4db94011d3 | 39 | #define __CORE_CM_SECURE_ACCESS_H |
sahilmgandhi | 18:6a4db94011d3 | 40 | |
sahilmgandhi | 18:6a4db94011d3 | 41 | |
sahilmgandhi | 18:6a4db94011d3 | 42 | /* ########################### Core Secure Access ########################### */ |
sahilmgandhi | 18:6a4db94011d3 | 43 | |
sahilmgandhi | 18:6a4db94011d3 | 44 | #ifdef FEATURE_UVISOR |
sahilmgandhi | 18:6a4db94011d3 | 45 | #include "uvisor-lib/uvisor-lib.h" |
sahilmgandhi | 18:6a4db94011d3 | 46 | |
sahilmgandhi | 18:6a4db94011d3 | 47 | /* Secure uVisor implementation. */ |
sahilmgandhi | 18:6a4db94011d3 | 48 | |
sahilmgandhi | 18:6a4db94011d3 | 49 | /** Set the value at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 50 | * |
sahilmgandhi | 18:6a4db94011d3 | 51 | * Equivalent to: `*address = value`. |
sahilmgandhi | 18:6a4db94011d3 | 52 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 53 | * @param value[in] Value to write at the address location. |
sahilmgandhi | 18:6a4db94011d3 | 54 | */ |
sahilmgandhi | 18:6a4db94011d3 | 55 | #define SECURE_WRITE(address, value) \ |
sahilmgandhi | 18:6a4db94011d3 | 56 | uvisor_write(public_box, UVISOR_RGW_SHARED, address, value, UVISOR_RGW_OP_WRITE, 0xFFFFFFFFUL) |
sahilmgandhi | 18:6a4db94011d3 | 57 | |
sahilmgandhi | 18:6a4db94011d3 | 58 | /** Get the value at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 59 | * |
sahilmgandhi | 18:6a4db94011d3 | 60 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 61 | * @returns The value `*address`. |
sahilmgandhi | 18:6a4db94011d3 | 62 | */ |
sahilmgandhi | 18:6a4db94011d3 | 63 | #define SECURE_READ(address) \ |
sahilmgandhi | 18:6a4db94011d3 | 64 | uvisor_read(public_box, UVISOR_RGW_SHARED, address, UVISOR_RGW_OP_READ, 0xFFFFFFFFUL) |
sahilmgandhi | 18:6a4db94011d3 | 65 | |
sahilmgandhi | 18:6a4db94011d3 | 66 | /** Get the selected bits at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 67 | * |
sahilmgandhi | 18:6a4db94011d3 | 68 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 69 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 70 | * @returns The value `*address & mask`. |
sahilmgandhi | 18:6a4db94011d3 | 71 | */ |
sahilmgandhi | 18:6a4db94011d3 | 72 | #define SECURE_BITS_GET(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 73 | UVISOR_BITS_GET(public_box, UVISOR_RGW_SHARED, address, mask) |
sahilmgandhi | 18:6a4db94011d3 | 74 | |
sahilmgandhi | 18:6a4db94011d3 | 75 | /** Check the selected bits at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 76 | * |
sahilmgandhi | 18:6a4db94011d3 | 77 | * @param address[in] Address at which to check the bits |
sahilmgandhi | 18:6a4db94011d3 | 78 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 79 | * @returns The value `((*address & mask) == mask)`. |
sahilmgandhi | 18:6a4db94011d3 | 80 | */ |
sahilmgandhi | 18:6a4db94011d3 | 81 | #define SECURE_BITS_CHECK(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 82 | UVISOR_BITS_CHECK(public_box, UVISOR_RGW_SHARED, address, mask) |
sahilmgandhi | 18:6a4db94011d3 | 83 | |
sahilmgandhi | 18:6a4db94011d3 | 84 | /** Set the selected bits to 1 at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 85 | * |
sahilmgandhi | 18:6a4db94011d3 | 86 | * Equivalent to: `*address |= mask`. |
sahilmgandhi | 18:6a4db94011d3 | 87 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 88 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 89 | */ |
sahilmgandhi | 18:6a4db94011d3 | 90 | #define SECURE_BITS_SET(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 91 | UVISOR_BITS_SET(public_box, UVISOR_RGW_SHARED, address, mask) |
sahilmgandhi | 18:6a4db94011d3 | 92 | |
sahilmgandhi | 18:6a4db94011d3 | 93 | /** Clear the selected bits at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 94 | * |
sahilmgandhi | 18:6a4db94011d3 | 95 | * Equivalent to: `*address &= ~mask`. |
sahilmgandhi | 18:6a4db94011d3 | 96 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 97 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 98 | */ |
sahilmgandhi | 18:6a4db94011d3 | 99 | #define SECURE_BITS_CLEAR(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 100 | UVISOR_BITS_CLEAR(public_box, UVISOR_RGW_SHARED, address, mask) |
sahilmgandhi | 18:6a4db94011d3 | 101 | |
sahilmgandhi | 18:6a4db94011d3 | 102 | /** Set the selected bits at the target address to the given value. |
sahilmgandhi | 18:6a4db94011d3 | 103 | * |
sahilmgandhi | 18:6a4db94011d3 | 104 | * Equivalent to: `*address = (*address & ~mask) | (value & mask)`. |
sahilmgandhi | 18:6a4db94011d3 | 105 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 106 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 107 | * @param value[in] Value to write at the address location. Note: The value |
sahilmgandhi | 18:6a4db94011d3 | 108 | * must be already shifted to the correct bit position |
sahilmgandhi | 18:6a4db94011d3 | 109 | */ |
sahilmgandhi | 18:6a4db94011d3 | 110 | #define SECURE_BITS_SET_VALUE(address, mask, value) \ |
sahilmgandhi | 18:6a4db94011d3 | 111 | UVISOR_BITS_SET_VALUE(public_box, UVISOR_RGW_SHARED, address, mask, value) |
sahilmgandhi | 18:6a4db94011d3 | 112 | |
sahilmgandhi | 18:6a4db94011d3 | 113 | /** Toggle the selected bits at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 114 | * |
sahilmgandhi | 18:6a4db94011d3 | 115 | * Equivalent to: `*address ^= mask`. |
sahilmgandhi | 18:6a4db94011d3 | 116 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 117 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 118 | */ |
sahilmgandhi | 18:6a4db94011d3 | 119 | #define SECURE_BITS_TOGGLE(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 120 | UVISOR_BITS_TOGGLE(public_box, UVISOR_RGW_SHARED, address, mask) |
sahilmgandhi | 18:6a4db94011d3 | 121 | |
sahilmgandhi | 18:6a4db94011d3 | 122 | #else |
sahilmgandhi | 18:6a4db94011d3 | 123 | |
sahilmgandhi | 18:6a4db94011d3 | 124 | /* Insecure fallback implementation. */ |
sahilmgandhi | 18:6a4db94011d3 | 125 | |
sahilmgandhi | 18:6a4db94011d3 | 126 | /** Set the value at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 127 | * |
sahilmgandhi | 18:6a4db94011d3 | 128 | * Equivalent to: `*address = value`. |
sahilmgandhi | 18:6a4db94011d3 | 129 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 130 | * @param value[in] Value to write at the address location. |
sahilmgandhi | 18:6a4db94011d3 | 131 | */ |
sahilmgandhi | 18:6a4db94011d3 | 132 | #define SECURE_WRITE(address, value) \ |
sahilmgandhi | 18:6a4db94011d3 | 133 | *(address) = (value) |
sahilmgandhi | 18:6a4db94011d3 | 134 | |
sahilmgandhi | 18:6a4db94011d3 | 135 | /** Get the value at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 136 | * |
sahilmgandhi | 18:6a4db94011d3 | 137 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 138 | * @returns The value `*address`. |
sahilmgandhi | 18:6a4db94011d3 | 139 | */ |
sahilmgandhi | 18:6a4db94011d3 | 140 | #define SECURE_READ(address) \ |
sahilmgandhi | 18:6a4db94011d3 | 141 | (*(address)) |
sahilmgandhi | 18:6a4db94011d3 | 142 | |
sahilmgandhi | 18:6a4db94011d3 | 143 | /** Get the selected bits at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 144 | * |
sahilmgandhi | 18:6a4db94011d3 | 145 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 146 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 147 | * @returns The value `*address & mask`. |
sahilmgandhi | 18:6a4db94011d3 | 148 | */ |
sahilmgandhi | 18:6a4db94011d3 | 149 | #define SECURE_BITS_GET(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 150 | (*(address) & (mask)) |
sahilmgandhi | 18:6a4db94011d3 | 151 | |
sahilmgandhi | 18:6a4db94011d3 | 152 | /** Check the selected bits at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 153 | * |
sahilmgandhi | 18:6a4db94011d3 | 154 | * @param address[in] Address at which to check the bits |
sahilmgandhi | 18:6a4db94011d3 | 155 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 156 | * @returns The value `((*address & mask) == mask)`. |
sahilmgandhi | 18:6a4db94011d3 | 157 | */ |
sahilmgandhi | 18:6a4db94011d3 | 158 | #define SECURE_BITS_CHECK(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 159 | ((*(address) & (mask)) == (mask)) |
sahilmgandhi | 18:6a4db94011d3 | 160 | |
sahilmgandhi | 18:6a4db94011d3 | 161 | /** Set the selected bits to 1 at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 162 | * |
sahilmgandhi | 18:6a4db94011d3 | 163 | * Equivalent to: `*address |= mask`. |
sahilmgandhi | 18:6a4db94011d3 | 164 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 165 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 166 | */ |
sahilmgandhi | 18:6a4db94011d3 | 167 | #define SECURE_BITS_SET(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 168 | *(address) |= (mask) |
sahilmgandhi | 18:6a4db94011d3 | 169 | |
sahilmgandhi | 18:6a4db94011d3 | 170 | /** Clear the selected bits at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 171 | * |
sahilmgandhi | 18:6a4db94011d3 | 172 | * Equivalent to: `*address &= ~mask`. |
sahilmgandhi | 18:6a4db94011d3 | 173 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 174 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 175 | */ |
sahilmgandhi | 18:6a4db94011d3 | 176 | #define SECURE_BITS_CLEAR(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 177 | *(address) &= ~(mask) |
sahilmgandhi | 18:6a4db94011d3 | 178 | |
sahilmgandhi | 18:6a4db94011d3 | 179 | /** Set the selected bits at the target address to the given value. |
sahilmgandhi | 18:6a4db94011d3 | 180 | * |
sahilmgandhi | 18:6a4db94011d3 | 181 | * Equivalent to: `*address = (*address & ~mask) | (value & mask)`. |
sahilmgandhi | 18:6a4db94011d3 | 182 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 183 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 184 | * @param value[in] Value to write at the address location. Note: The value |
sahilmgandhi | 18:6a4db94011d3 | 185 | * must be already shifted to the correct bit position |
sahilmgandhi | 18:6a4db94011d3 | 186 | */ |
sahilmgandhi | 18:6a4db94011d3 | 187 | #define SECURE_BITS_SET_VALUE(address, mask, value) \ |
sahilmgandhi | 18:6a4db94011d3 | 188 | *(address) = (*(address) & ~(mask)) | ((value) & (mask)) |
sahilmgandhi | 18:6a4db94011d3 | 189 | |
sahilmgandhi | 18:6a4db94011d3 | 190 | /** Toggle the selected bits at the target address. |
sahilmgandhi | 18:6a4db94011d3 | 191 | * |
sahilmgandhi | 18:6a4db94011d3 | 192 | * Equivalent to: `*address ^= mask`. |
sahilmgandhi | 18:6a4db94011d3 | 193 | * @param address[in] Target address |
sahilmgandhi | 18:6a4db94011d3 | 194 | * @param mask[in] Bits to select out of the target address |
sahilmgandhi | 18:6a4db94011d3 | 195 | */ |
sahilmgandhi | 18:6a4db94011d3 | 196 | #define SECURE_BITS_TOGGLE(address, mask) \ |
sahilmgandhi | 18:6a4db94011d3 | 197 | *(address) ^= (mask) |
sahilmgandhi | 18:6a4db94011d3 | 198 | |
sahilmgandhi | 18:6a4db94011d3 | 199 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 200 | |
sahilmgandhi | 18:6a4db94011d3 | 201 | #endif /* __CORE_CM_SECURE_ACCESS_H */ |