(DA) Internet of Things and Smart Electronics- ELE3006M2122 / Mbed 2 deprecated Final_Project_V19_DLeaming_25574043

Final tidy of code following installation of new sensor, more comments added prior to submission

Dependencies:   mbed

SD_Card/SDFileSystem.cpp@14:3e9991fe64e5, 2022-01-21 (annotated)

Committer:
legstar85
Date:
Fri Jan 21 22:33:32 2022 +0000
Revision:
14:3e9991fe64e5
Addition of new menu option, start of coding for writing Temp data to SD card

Who changed what in which revision?

UserRevisionLine numberNew contents of line
legstar85 14:3e9991fe64e5 1 /* mbed Microcontroller Library
legstar85 14:3e9991fe64e5 2 * Copyright (c) 2006-2012 ARM Limited
legstar85 14:3e9991fe64e5 3 *
legstar85 14:3e9991fe64e5 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
legstar85 14:3e9991fe64e5 5 * of this software and associated documentation files (the "Software"), to deal
legstar85 14:3e9991fe64e5 6 * in the Software without restriction, including without limitation the rights
legstar85 14:3e9991fe64e5 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
legstar85 14:3e9991fe64e5 8 * copies of the Software, and to permit persons to whom the Software is
legstar85 14:3e9991fe64e5 9 * furnished to do so, subject to the following conditions:
legstar85 14:3e9991fe64e5 10 *
legstar85 14:3e9991fe64e5 11 * The above copyright notice and this permission notice shall be included in
legstar85 14:3e9991fe64e5 12 * all copies or substantial portions of the Software.
legstar85 14:3e9991fe64e5 13 *
legstar85 14:3e9991fe64e5 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
legstar85 14:3e9991fe64e5 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
legstar85 14:3e9991fe64e5 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
legstar85 14:3e9991fe64e5 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
legstar85 14:3e9991fe64e5 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
legstar85 14:3e9991fe64e5 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
legstar85 14:3e9991fe64e5 20 * SOFTWARE.
legstar85 14:3e9991fe64e5 21 */
legstar85 14:3e9991fe64e5 22 /* Introduction
legstar85 14:3e9991fe64e5 23 * ------------
legstar85 14:3e9991fe64e5 24 * SD and MMC cards support a number of interfaces, but common to them all
legstar85 14:3e9991fe64e5 25 * is one based on SPI. This is the one I'm implmenting because it means
legstar85 14:3e9991fe64e5 26 * it is much more portable even though not so performant, and we already
legstar85 14:3e9991fe64e5 27 * have the mbed SPI Interface!
legstar85 14:3e9991fe64e5 28 *
legstar85 14:3e9991fe64e5 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
legstar85 14:3e9991fe64e5 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
legstar85 14:3e9991fe64e5 31 *
legstar85 14:3e9991fe64e5 32 * SPI Startup
legstar85 14:3e9991fe64e5 33 * -----------
legstar85 14:3e9991fe64e5 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
legstar85 14:3e9991fe64e5 35 * asserting CS low and sending the reset command (CMD0). The card will
legstar85 14:3e9991fe64e5 36 * respond with a (R1) response.
legstar85 14:3e9991fe64e5 37 *
legstar85 14:3e9991fe64e5 38 * CMD8 is optionally sent to determine the voltage range supported, and
legstar85 14:3e9991fe64e5 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
legstar85 14:3e9991fe64e5 40 * version 2.x. I'll just ignore this for now.
legstar85 14:3e9991fe64e5 41 *
legstar85 14:3e9991fe64e5 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
legstar85 14:3e9991fe64e5 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
legstar85 14:3e9991fe64e5 44 *
legstar85 14:3e9991fe64e5 45 * You should also indicate whether the host supports High Capicity cards,
legstar85 14:3e9991fe64e5 46 * and check whether the card is high capacity - i'll also ignore this
legstar85 14:3e9991fe64e5 47 *
legstar85 14:3e9991fe64e5 48 * SPI Protocol
legstar85 14:3e9991fe64e5 49 * ------------
legstar85 14:3e9991fe64e5 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
legstar85 14:3e9991fe64e5 51 * the host starting every bus transaction by asserting the CS signal low. The
legstar85 14:3e9991fe64e5 52 * card always responds to commands, data blocks and errors.
legstar85 14:3e9991fe64e5 53 *
legstar85 14:3e9991fe64e5 54 * The protocol supports a CRC, but by default it is off (except for the
legstar85 14:3e9991fe64e5 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
legstar85 14:3e9991fe64e5 56 * I'll leave the CRC off I think!
legstar85 14:3e9991fe64e5 57 *
legstar85 14:3e9991fe64e5 58 * Standard capacity cards have variable data block sizes, whereas High
legstar85 14:3e9991fe64e5 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
legstar85 14:3e9991fe64e5 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
legstar85 14:3e9991fe64e5 61 * This is set with CMD16.
legstar85 14:3e9991fe64e5 62 *
legstar85 14:3e9991fe64e5 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
legstar85 14:3e9991fe64e5 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
legstar85 14:3e9991fe64e5 65 * the card gets a read command, it responds with a response token, and then
legstar85 14:3e9991fe64e5 66 * a data token or an error.
legstar85 14:3e9991fe64e5 67 *
legstar85 14:3e9991fe64e5 68 * SPI Command Format
legstar85 14:3e9991fe64e5 69 * ------------------
legstar85 14:3e9991fe64e5 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
legstar85 14:3e9991fe64e5 71 *
legstar85 14:3e9991fe64e5 72 * +---------------+------------+------------+-----------+----------+--------------+
legstar85 14:3e9991fe64e5 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
legstar85 14:3e9991fe64e5 74 * +---------------+------------+------------+-----------+----------+--------------+
legstar85 14:3e9991fe64e5 75 *
legstar85 14:3e9991fe64e5 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
legstar85 14:3e9991fe64e5 77 *
legstar85 14:3e9991fe64e5 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
legstar85 14:3e9991fe64e5 79 *
legstar85 14:3e9991fe64e5 80 * SPI Response Format
legstar85 14:3e9991fe64e5 81 * -------------------
legstar85 14:3e9991fe64e5 82 * The main response format (R1) is a status byte (normally zero). Key flags:
legstar85 14:3e9991fe64e5 83 * idle - 1 if the card is in an idle state/initialising
legstar85 14:3e9991fe64e5 84 * cmd - 1 if an illegal command code was detected
legstar85 14:3e9991fe64e5 85 *
legstar85 14:3e9991fe64e5 86 * +-------------------------------------------------+
legstar85 14:3e9991fe64e5 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
legstar85 14:3e9991fe64e5 88 * +-------------------------------------------------+
legstar85 14:3e9991fe64e5 89 *
legstar85 14:3e9991fe64e5 90 * R1b is the same, except it is followed by a busy signal (zeros) until
legstar85 14:3e9991fe64e5 91 * the first non-zero byte when it is ready again.
legstar85 14:3e9991fe64e5 92 *
legstar85 14:3e9991fe64e5 93 * Data Response Token
legstar85 14:3e9991fe64e5 94 * -------------------
legstar85 14:3e9991fe64e5 95 * Every data block written to the card is acknowledged by a byte
legstar85 14:3e9991fe64e5 96 * response token
legstar85 14:3e9991fe64e5 97 *
legstar85 14:3e9991fe64e5 98 * +----------------------+
legstar85 14:3e9991fe64e5 99 * | xxx | 0 | status | 1 |
legstar85 14:3e9991fe64e5 100 * +----------------------+
legstar85 14:3e9991fe64e5 101 * 010 - OK!
legstar85 14:3e9991fe64e5 102 * 101 - CRC Error
legstar85 14:3e9991fe64e5 103 * 110 - Write Error
legstar85 14:3e9991fe64e5 104 *
legstar85 14:3e9991fe64e5 105 * Single Block Read and Write
legstar85 14:3e9991fe64e5 106 * ---------------------------
legstar85 14:3e9991fe64e5 107 *
legstar85 14:3e9991fe64e5 108 * Block transfers have a byte header, followed by the data, followed
legstar85 14:3e9991fe64e5 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
legstar85 14:3e9991fe64e5 110 *
legstar85 14:3e9991fe64e5 111 * +------+---------+---------+- - - -+---------+-----------+----------+
legstar85 14:3e9991fe64e5 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
legstar85 14:3e9991fe64e5 113 * +------+---------+---------+- - - -+---------+-----------+----------+
legstar85 14:3e9991fe64e5 114 */
legstar85 14:3e9991fe64e5 115 #include "SDFileSystem.h"
legstar85 14:3e9991fe64e5 116 #include "mbed_debug.h"
legstar85 14:3e9991fe64e5 117
legstar85 14:3e9991fe64e5 118 #define SD_COMMAND_TIMEOUT 5000
legstar85 14:3e9991fe64e5 119
legstar85 14:3e9991fe64e5 120 #define SD_DBG 0
legstar85 14:3e9991fe64e5 121
legstar85 14:3e9991fe64e5 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
legstar85 14:3e9991fe64e5 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0) {
legstar85 14:3e9991fe64e5 124 _cs = 1;
legstar85 14:3e9991fe64e5 125
legstar85 14:3e9991fe64e5 126 // Set default to 100kHz for initialisation and 1MHz for data transfer
legstar85 14:3e9991fe64e5 127 _init_sck = 100000;
legstar85 14:3e9991fe64e5 128 _transfer_sck = 1000000;
legstar85 14:3e9991fe64e5 129 }
legstar85 14:3e9991fe64e5 130
legstar85 14:3e9991fe64e5 131 #define R1_IDLE_STATE (1 << 0)
legstar85 14:3e9991fe64e5 132 #define R1_ERASE_RESET (1 << 1)
legstar85 14:3e9991fe64e5 133 #define R1_ILLEGAL_COMMAND (1 << 2)
legstar85 14:3e9991fe64e5 134 #define R1_COM_CRC_ERROR (1 << 3)
legstar85 14:3e9991fe64e5 135 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
legstar85 14:3e9991fe64e5 136 #define R1_ADDRESS_ERROR (1 << 5)
legstar85 14:3e9991fe64e5 137 #define R1_PARAMETER_ERROR (1 << 6)
legstar85 14:3e9991fe64e5 138
legstar85 14:3e9991fe64e5 139 // Types
legstar85 14:3e9991fe64e5 140 // - v1.x Standard Capacity
legstar85 14:3e9991fe64e5 141 // - v2.x Standard Capacity
legstar85 14:3e9991fe64e5 142 // - v2.x High Capacity
legstar85 14:3e9991fe64e5 143 // - Not recognised as an SD Card
legstar85 14:3e9991fe64e5 144 #define SDCARD_FAIL 0
legstar85 14:3e9991fe64e5 145 #define SDCARD_V1 1
legstar85 14:3e9991fe64e5 146 #define SDCARD_V2 2
legstar85 14:3e9991fe64e5 147 #define SDCARD_V2HC 3
legstar85 14:3e9991fe64e5 148
legstar85 14:3e9991fe64e5 149 int SDFileSystem::initialise_card() {
legstar85 14:3e9991fe64e5 150 // Set to SCK for initialisation, and clock card with cs = 1
legstar85 14:3e9991fe64e5 151 _spi.frequency(_init_sck);
legstar85 14:3e9991fe64e5 152 _cs = 1;
legstar85 14:3e9991fe64e5 153 for (int i = 0; i < 16; i++) {
legstar85 14:3e9991fe64e5 154 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 155 }
legstar85 14:3e9991fe64e5 156
legstar85 14:3e9991fe64e5 157 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
legstar85 14:3e9991fe64e5 158 if (_cmd(0, 0) != R1_IDLE_STATE) {
legstar85 14:3e9991fe64e5 159 debug("No disk, or could not put SD card in to SPI idle state\n");
legstar85 14:3e9991fe64e5 160 return SDCARD_FAIL;
legstar85 14:3e9991fe64e5 161 }
legstar85 14:3e9991fe64e5 162
legstar85 14:3e9991fe64e5 163 // send CMD8 to determine whther it is ver 2.x
legstar85 14:3e9991fe64e5 164 int r = _cmd8();
legstar85 14:3e9991fe64e5 165 if (r == R1_IDLE_STATE) {
legstar85 14:3e9991fe64e5 166 return initialise_card_v2();
legstar85 14:3e9991fe64e5 167 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
legstar85 14:3e9991fe64e5 168 return initialise_card_v1();
legstar85 14:3e9991fe64e5 169 } else {
legstar85 14:3e9991fe64e5 170 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
legstar85 14:3e9991fe64e5 171 return SDCARD_FAIL;
legstar85 14:3e9991fe64e5 172 }
legstar85 14:3e9991fe64e5 173 }
legstar85 14:3e9991fe64e5 174
legstar85 14:3e9991fe64e5 175 int SDFileSystem::initialise_card_v1() {
legstar85 14:3e9991fe64e5 176 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
legstar85 14:3e9991fe64e5 177 _cmd(55, 0);
legstar85 14:3e9991fe64e5 178 if (_cmd(41, 0) == 0) {
legstar85 14:3e9991fe64e5 179 cdv = 512;
legstar85 14:3e9991fe64e5 180 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
legstar85 14:3e9991fe64e5 181 return SDCARD_V1;
legstar85 14:3e9991fe64e5 182 }
legstar85 14:3e9991fe64e5 183 }
legstar85 14:3e9991fe64e5 184
legstar85 14:3e9991fe64e5 185 debug("Timeout waiting for v1.x card\n");
legstar85 14:3e9991fe64e5 186 return SDCARD_FAIL;
legstar85 14:3e9991fe64e5 187 }
legstar85 14:3e9991fe64e5 188
legstar85 14:3e9991fe64e5 189 int SDFileSystem::initialise_card_v2() {
legstar85 14:3e9991fe64e5 190 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
legstar85 14:3e9991fe64e5 191 wait_ms(50);
legstar85 14:3e9991fe64e5 192 _cmd58();
legstar85 14:3e9991fe64e5 193 _cmd(55, 0);
legstar85 14:3e9991fe64e5 194 if (_cmd(41, 0x40000000) == 0) {
legstar85 14:3e9991fe64e5 195 _cmd58();
legstar85 14:3e9991fe64e5 196 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
legstar85 14:3e9991fe64e5 197 cdv = 1;
legstar85 14:3e9991fe64e5 198 return SDCARD_V2;
legstar85 14:3e9991fe64e5 199 }
legstar85 14:3e9991fe64e5 200 }
legstar85 14:3e9991fe64e5 201
legstar85 14:3e9991fe64e5 202 debug("Timeout waiting for v2.x card\n");
legstar85 14:3e9991fe64e5 203 return SDCARD_FAIL;
legstar85 14:3e9991fe64e5 204 }
legstar85 14:3e9991fe64e5 205
legstar85 14:3e9991fe64e5 206 int SDFileSystem::disk_initialize() {
legstar85 14:3e9991fe64e5 207 _is_initialized = initialise_card();
legstar85 14:3e9991fe64e5 208 if (_is_initialized == 0) {
legstar85 14:3e9991fe64e5 209 debug("Fail to initialize card\n");
legstar85 14:3e9991fe64e5 210 return 1;
legstar85 14:3e9991fe64e5 211 }
legstar85 14:3e9991fe64e5 212 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
legstar85 14:3e9991fe64e5 213 _sectors = _sd_sectors();
legstar85 14:3e9991fe64e5 214
legstar85 14:3e9991fe64e5 215 // Set block length to 512 (CMD16)
legstar85 14:3e9991fe64e5 216 if (_cmd(16, 512) != 0) {
legstar85 14:3e9991fe64e5 217 debug("Set 512-byte block timed out\n");
legstar85 14:3e9991fe64e5 218 return 1;
legstar85 14:3e9991fe64e5 219 }
legstar85 14:3e9991fe64e5 220
legstar85 14:3e9991fe64e5 221 // Set SCK for data transfer
legstar85 14:3e9991fe64e5 222 _spi.frequency(_transfer_sck);
legstar85 14:3e9991fe64e5 223 return 0;
legstar85 14:3e9991fe64e5 224 }
legstar85 14:3e9991fe64e5 225
legstar85 14:3e9991fe64e5 226 int SDFileSystem::disk_write(const uint8_t* buffer, uint32_t block_number, uint32_t count) {
legstar85 14:3e9991fe64e5 227 if (!_is_initialized) {
legstar85 14:3e9991fe64e5 228 return -1;
legstar85 14:3e9991fe64e5 229 }
legstar85 14:3e9991fe64e5 230
legstar85 14:3e9991fe64e5 231 for (uint32_t b = block_number; b < block_number + count; b++) {
legstar85 14:3e9991fe64e5 232 // set write address for single block (CMD24)
legstar85 14:3e9991fe64e5 233 if (_cmd(24, b * cdv) != 0) {
legstar85 14:3e9991fe64e5 234 return 1;
legstar85 14:3e9991fe64e5 235 }
legstar85 14:3e9991fe64e5 236
legstar85 14:3e9991fe64e5 237 // send the data block
legstar85 14:3e9991fe64e5 238 _write(buffer, 512);
legstar85 14:3e9991fe64e5 239 buffer += 512;
legstar85 14:3e9991fe64e5 240 }
legstar85 14:3e9991fe64e5 241
legstar85 14:3e9991fe64e5 242 return 0;
legstar85 14:3e9991fe64e5 243 }
legstar85 14:3e9991fe64e5 244
legstar85 14:3e9991fe64e5 245 int SDFileSystem::disk_read(uint8_t* buffer, uint32_t block_number, uint32_t count) {
legstar85 14:3e9991fe64e5 246 if (!_is_initialized) {
legstar85 14:3e9991fe64e5 247 return -1;
legstar85 14:3e9991fe64e5 248 }
legstar85 14:3e9991fe64e5 249
legstar85 14:3e9991fe64e5 250 for (uint32_t b = block_number; b < block_number + count; b++) {
legstar85 14:3e9991fe64e5 251 // set read address for single block (CMD17)
legstar85 14:3e9991fe64e5 252 if (_cmd(17, b * cdv) != 0) {
legstar85 14:3e9991fe64e5 253 return 1;
legstar85 14:3e9991fe64e5 254 }
legstar85 14:3e9991fe64e5 255
legstar85 14:3e9991fe64e5 256 // receive the data
legstar85 14:3e9991fe64e5 257 _read(buffer, 512);
legstar85 14:3e9991fe64e5 258 buffer += 512;
legstar85 14:3e9991fe64e5 259 }
legstar85 14:3e9991fe64e5 260
legstar85 14:3e9991fe64e5 261 return 0;
legstar85 14:3e9991fe64e5 262 }
legstar85 14:3e9991fe64e5 263
legstar85 14:3e9991fe64e5 264 int SDFileSystem::disk_status() {
legstar85 14:3e9991fe64e5 265 // FATFileSystem::disk_status() returns 0 when initialized
legstar85 14:3e9991fe64e5 266 if (_is_initialized) {
legstar85 14:3e9991fe64e5 267 return 0;
legstar85 14:3e9991fe64e5 268 } else {
legstar85 14:3e9991fe64e5 269 return 1;
legstar85 14:3e9991fe64e5 270 }
legstar85 14:3e9991fe64e5 271 }
legstar85 14:3e9991fe64e5 272
legstar85 14:3e9991fe64e5 273 int SDFileSystem::disk_sync() { return 0; }
legstar85 14:3e9991fe64e5 274 uint32_t SDFileSystem::disk_sectors() { return _sectors; }
legstar85 14:3e9991fe64e5 275
legstar85 14:3e9991fe64e5 276
legstar85 14:3e9991fe64e5 277 // PRIVATE FUNCTIONS
legstar85 14:3e9991fe64e5 278 int SDFileSystem::_cmd(int cmd, int arg) {
legstar85 14:3e9991fe64e5 279 _cs = 0;
legstar85 14:3e9991fe64e5 280
legstar85 14:3e9991fe64e5 281 // send a command
legstar85 14:3e9991fe64e5 282 _spi.write(0x40 | cmd);
legstar85 14:3e9991fe64e5 283 _spi.write(arg >> 24);
legstar85 14:3e9991fe64e5 284 _spi.write(arg >> 16);
legstar85 14:3e9991fe64e5 285 _spi.write(arg >> 8);
legstar85 14:3e9991fe64e5 286 _spi.write(arg >> 0);
legstar85 14:3e9991fe64e5 287 _spi.write(0x95);
legstar85 14:3e9991fe64e5 288
legstar85 14:3e9991fe64e5 289 // wait for the repsonse (response[7] == 0)
legstar85 14:3e9991fe64e5 290 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
legstar85 14:3e9991fe64e5 291 int response = _spi.write(0xFF);
legstar85 14:3e9991fe64e5 292 if (!(response & 0x80)) {
legstar85 14:3e9991fe64e5 293 _cs = 1;
legstar85 14:3e9991fe64e5 294 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 295 return response;
legstar85 14:3e9991fe64e5 296 }
legstar85 14:3e9991fe64e5 297 }
legstar85 14:3e9991fe64e5 298 _cs = 1;
legstar85 14:3e9991fe64e5 299 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 300 return -1; // timeout
legstar85 14:3e9991fe64e5 301 }
legstar85 14:3e9991fe64e5 302 int SDFileSystem::_cmdx(int cmd, int arg) {
legstar85 14:3e9991fe64e5 303 _cs = 0;
legstar85 14:3e9991fe64e5 304
legstar85 14:3e9991fe64e5 305 // send a command
legstar85 14:3e9991fe64e5 306 _spi.write(0x40 | cmd);
legstar85 14:3e9991fe64e5 307 _spi.write(arg >> 24);
legstar85 14:3e9991fe64e5 308 _spi.write(arg >> 16);
legstar85 14:3e9991fe64e5 309 _spi.write(arg >> 8);
legstar85 14:3e9991fe64e5 310 _spi.write(arg >> 0);
legstar85 14:3e9991fe64e5 311 _spi.write(0x95);
legstar85 14:3e9991fe64e5 312
legstar85 14:3e9991fe64e5 313 // wait for the repsonse (response[7] == 0)
legstar85 14:3e9991fe64e5 314 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
legstar85 14:3e9991fe64e5 315 int response = _spi.write(0xFF);
legstar85 14:3e9991fe64e5 316 if (!(response & 0x80)) {
legstar85 14:3e9991fe64e5 317 return response;
legstar85 14:3e9991fe64e5 318 }
legstar85 14:3e9991fe64e5 319 }
legstar85 14:3e9991fe64e5 320 _cs = 1;
legstar85 14:3e9991fe64e5 321 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 322 return -1; // timeout
legstar85 14:3e9991fe64e5 323 }
legstar85 14:3e9991fe64e5 324
legstar85 14:3e9991fe64e5 325
legstar85 14:3e9991fe64e5 326 int SDFileSystem::_cmd58() {
legstar85 14:3e9991fe64e5 327 _cs = 0;
legstar85 14:3e9991fe64e5 328 int arg = 0;
legstar85 14:3e9991fe64e5 329
legstar85 14:3e9991fe64e5 330 // send a command
legstar85 14:3e9991fe64e5 331 _spi.write(0x40 | 58);
legstar85 14:3e9991fe64e5 332 _spi.write(arg >> 24);
legstar85 14:3e9991fe64e5 333 _spi.write(arg >> 16);
legstar85 14:3e9991fe64e5 334 _spi.write(arg >> 8);
legstar85 14:3e9991fe64e5 335 _spi.write(arg >> 0);
legstar85 14:3e9991fe64e5 336 _spi.write(0x95);
legstar85 14:3e9991fe64e5 337
legstar85 14:3e9991fe64e5 338 // wait for the repsonse (response[7] == 0)
legstar85 14:3e9991fe64e5 339 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
legstar85 14:3e9991fe64e5 340 int response = _spi.write(0xFF);
legstar85 14:3e9991fe64e5 341 if (!(response & 0x80)) {
legstar85 14:3e9991fe64e5 342 int ocr = _spi.write(0xFF) << 24;
legstar85 14:3e9991fe64e5 343 ocr |= _spi.write(0xFF) << 16;
legstar85 14:3e9991fe64e5 344 ocr |= _spi.write(0xFF) << 8;
legstar85 14:3e9991fe64e5 345 ocr |= _spi.write(0xFF) << 0;
legstar85 14:3e9991fe64e5 346 _cs = 1;
legstar85 14:3e9991fe64e5 347 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 348 return response;
legstar85 14:3e9991fe64e5 349 }
legstar85 14:3e9991fe64e5 350 }
legstar85 14:3e9991fe64e5 351 _cs = 1;
legstar85 14:3e9991fe64e5 352 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 353 return -1; // timeout
legstar85 14:3e9991fe64e5 354 }
legstar85 14:3e9991fe64e5 355
legstar85 14:3e9991fe64e5 356 int SDFileSystem::_cmd8() {
legstar85 14:3e9991fe64e5 357 _cs = 0;
legstar85 14:3e9991fe64e5 358
legstar85 14:3e9991fe64e5 359 // send a command
legstar85 14:3e9991fe64e5 360 _spi.write(0x40 | 8); // CMD8
legstar85 14:3e9991fe64e5 361 _spi.write(0x00); // reserved
legstar85 14:3e9991fe64e5 362 _spi.write(0x00); // reserved
legstar85 14:3e9991fe64e5 363 _spi.write(0x01); // 3.3v
legstar85 14:3e9991fe64e5 364 _spi.write(0xAA); // check pattern
legstar85 14:3e9991fe64e5 365 _spi.write(0x87); // crc
legstar85 14:3e9991fe64e5 366
legstar85 14:3e9991fe64e5 367 // wait for the repsonse (response[7] == 0)
legstar85 14:3e9991fe64e5 368 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
legstar85 14:3e9991fe64e5 369 char response[5];
legstar85 14:3e9991fe64e5 370 response[0] = _spi.write(0xFF);
legstar85 14:3e9991fe64e5 371 if (!(response[0] & 0x80)) {
legstar85 14:3e9991fe64e5 372 for (int j = 1; j < 5; j++) {
legstar85 14:3e9991fe64e5 373 response[i] = _spi.write(0xFF);
legstar85 14:3e9991fe64e5 374 }
legstar85 14:3e9991fe64e5 375 _cs = 1;
legstar85 14:3e9991fe64e5 376 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 377 return response[0];
legstar85 14:3e9991fe64e5 378 }
legstar85 14:3e9991fe64e5 379 }
legstar85 14:3e9991fe64e5 380 _cs = 1;
legstar85 14:3e9991fe64e5 381 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 382 return -1; // timeout
legstar85 14:3e9991fe64e5 383 }
legstar85 14:3e9991fe64e5 384
legstar85 14:3e9991fe64e5 385 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
legstar85 14:3e9991fe64e5 386 _cs = 0;
legstar85 14:3e9991fe64e5 387
legstar85 14:3e9991fe64e5 388 // read until start byte (0xFF)
legstar85 14:3e9991fe64e5 389 while (_spi.write(0xFF) != 0xFE);
legstar85 14:3e9991fe64e5 390
legstar85 14:3e9991fe64e5 391 // read data
legstar85 14:3e9991fe64e5 392 for (uint32_t i = 0; i < length; i++) {
legstar85 14:3e9991fe64e5 393 buffer[i] = _spi.write(0xFF);
legstar85 14:3e9991fe64e5 394 }
legstar85 14:3e9991fe64e5 395 _spi.write(0xFF); // checksum
legstar85 14:3e9991fe64e5 396 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 397
legstar85 14:3e9991fe64e5 398 _cs = 1;
legstar85 14:3e9991fe64e5 399 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 400 return 0;
legstar85 14:3e9991fe64e5 401 }
legstar85 14:3e9991fe64e5 402
legstar85 14:3e9991fe64e5 403 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
legstar85 14:3e9991fe64e5 404 _cs = 0;
legstar85 14:3e9991fe64e5 405
legstar85 14:3e9991fe64e5 406 // indicate start of block
legstar85 14:3e9991fe64e5 407 _spi.write(0xFE);
legstar85 14:3e9991fe64e5 408
legstar85 14:3e9991fe64e5 409 // write the data
legstar85 14:3e9991fe64e5 410 for (uint32_t i = 0; i < length; i++) {
legstar85 14:3e9991fe64e5 411 _spi.write(buffer[i]);
legstar85 14:3e9991fe64e5 412 }
legstar85 14:3e9991fe64e5 413
legstar85 14:3e9991fe64e5 414 // write the checksum
legstar85 14:3e9991fe64e5 415 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 416 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 417
legstar85 14:3e9991fe64e5 418 // check the response token
legstar85 14:3e9991fe64e5 419 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
legstar85 14:3e9991fe64e5 420 _cs = 1;
legstar85 14:3e9991fe64e5 421 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 422 return 1;
legstar85 14:3e9991fe64e5 423 }
legstar85 14:3e9991fe64e5 424
legstar85 14:3e9991fe64e5 425 // wait for write to finish
legstar85 14:3e9991fe64e5 426 while (_spi.write(0xFF) == 0);
legstar85 14:3e9991fe64e5 427
legstar85 14:3e9991fe64e5 428 _cs = 1;
legstar85 14:3e9991fe64e5 429 _spi.write(0xFF);
legstar85 14:3e9991fe64e5 430 return 0;
legstar85 14:3e9991fe64e5 431 }
legstar85 14:3e9991fe64e5 432
legstar85 14:3e9991fe64e5 433 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
legstar85 14:3e9991fe64e5 434 uint32_t bits = 0;
legstar85 14:3e9991fe64e5 435 uint32_t size = 1 + msb - lsb;
legstar85 14:3e9991fe64e5 436 for (uint32_t i = 0; i < size; i++) {
legstar85 14:3e9991fe64e5 437 uint32_t position = lsb + i;
legstar85 14:3e9991fe64e5 438 uint32_t byte = 15 - (position >> 3);
legstar85 14:3e9991fe64e5 439 uint32_t bit = position & 0x7;
legstar85 14:3e9991fe64e5 440 uint32_t value = (data[byte] >> bit) & 1;
legstar85 14:3e9991fe64e5 441 bits |= value << i;
legstar85 14:3e9991fe64e5 442 }
legstar85 14:3e9991fe64e5 443 return bits;
legstar85 14:3e9991fe64e5 444 }
legstar85 14:3e9991fe64e5 445
legstar85 14:3e9991fe64e5 446 uint32_t SDFileSystem::_sd_sectors() {
legstar85 14:3e9991fe64e5 447 uint32_t c_size, c_size_mult, read_bl_len;
legstar85 14:3e9991fe64e5 448 uint32_t block_len, mult, blocknr, capacity;
legstar85 14:3e9991fe64e5 449 uint32_t hc_c_size;
legstar85 14:3e9991fe64e5 450 uint32_t blocks;
legstar85 14:3e9991fe64e5 451
legstar85 14:3e9991fe64e5 452 // CMD9, Response R2 (R1 byte + 16-byte block read)
legstar85 14:3e9991fe64e5 453 if (_cmdx(9, 0) != 0) {
legstar85 14:3e9991fe64e5 454 debug("Didn't get a response from the disk\n");
legstar85 14:3e9991fe64e5 455 return 0;
legstar85 14:3e9991fe64e5 456 }
legstar85 14:3e9991fe64e5 457
legstar85 14:3e9991fe64e5 458 uint8_t csd[16];
legstar85 14:3e9991fe64e5 459 if (_read(csd, 16) != 0) {
legstar85 14:3e9991fe64e5 460 debug("Couldn't read csd response from disk\n");
legstar85 14:3e9991fe64e5 461 return 0;
legstar85 14:3e9991fe64e5 462 }
legstar85 14:3e9991fe64e5 463
legstar85 14:3e9991fe64e5 464 // csd_structure : csd[127:126]
legstar85 14:3e9991fe64e5 465 // c_size : csd[73:62]
legstar85 14:3e9991fe64e5 466 // c_size_mult : csd[49:47]
legstar85 14:3e9991fe64e5 467 // read_bl_len : csd[83:80] - the *maximum* read block length
legstar85 14:3e9991fe64e5 468
legstar85 14:3e9991fe64e5 469 int csd_structure = ext_bits(csd, 127, 126);
legstar85 14:3e9991fe64e5 470
legstar85 14:3e9991fe64e5 471 switch (csd_structure) {
legstar85 14:3e9991fe64e5 472 case 0:
legstar85 14:3e9991fe64e5 473 cdv = 512;
legstar85 14:3e9991fe64e5 474 c_size = ext_bits(csd, 73, 62);
legstar85 14:3e9991fe64e5 475 c_size_mult = ext_bits(csd, 49, 47);
legstar85 14:3e9991fe64e5 476 read_bl_len = ext_bits(csd, 83, 80);
legstar85 14:3e9991fe64e5 477
legstar85 14:3e9991fe64e5 478 block_len = 1 << read_bl_len;
legstar85 14:3e9991fe64e5 479 mult = 1 << (c_size_mult + 2);
legstar85 14:3e9991fe64e5 480 blocknr = (c_size + 1) * mult;
legstar85 14:3e9991fe64e5 481 capacity = blocknr * block_len;
legstar85 14:3e9991fe64e5 482 blocks = capacity / 512;
legstar85 14:3e9991fe64e5 483 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
legstar85 14:3e9991fe64e5 484 break;
legstar85 14:3e9991fe64e5 485
legstar85 14:3e9991fe64e5 486 case 1:
legstar85 14:3e9991fe64e5 487 cdv = 1;
legstar85 14:3e9991fe64e5 488 hc_c_size = ext_bits(csd, 63, 48);
legstar85 14:3e9991fe64e5 489 blocks = (hc_c_size+1)*1024;
legstar85 14:3e9991fe64e5 490 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
legstar85 14:3e9991fe64e5 491 break;
legstar85 14:3e9991fe64e5 492
legstar85 14:3e9991fe64e5 493 default:
legstar85 14:3e9991fe64e5 494 debug("CSD struct unsupported\r\n");
legstar85 14:3e9991fe64e5 495 return 0;
legstar85 14:3e9991fe64e5 496 };
legstar85 14:3e9991fe64e5 497 return blocks;
legstar85 14:3e9991fe64e5 498 }