Computing Assignment / LED

LED

Dependencies:   mbed

Fork of LED2 by Charlie Bailey

ADXL362.cpp@0:287361f0056d, 2015-10-29 (annotated)

Committer:
cbailey1994
Date:
Thu Oct 29 11:14:56 2015 +0000
Revision:
0:287361f0056d
LED;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cbailey1994 0:287361f0056d 1 #include "mbed.h"
cbailey1994 0:287361f0056d 2 #include "ADXL362.h"
cbailey1994 0:287361f0056d 3
cbailey1994 0:287361f0056d 4 // Class
cbailey1994 0:287361f0056d 5
cbailey1994 0:287361f0056d 6 ADXL362::ADXL362(PinName mosi, PinName miso, PinName sclk, PinName cbs)
cbailey1994 0:287361f0056d 7 : SPI_m(mosi, miso, sclk)
cbailey1994 0:287361f0056d 8 , CBS_m(cbs) {
cbailey1994 0:287361f0056d 9 CBS_m=1;
cbailey1994 0:287361f0056d 10 }
cbailey1994 0:287361f0056d 11
cbailey1994 0:287361f0056d 12 // SPI
cbailey1994 0:287361f0056d 13
cbailey1994 0:287361f0056d 14 void ADXL362::init_spi(){
cbailey1994 0:287361f0056d 15 // spi 8 bits, mode 0, 1 MHz for adxl362
cbailey1994 0:287361f0056d 16 SPI_m.format(8,0);
cbailey1994 0:287361f0056d 17 // 5 MHz, max for acc - works fine
cbailey1994 0:287361f0056d 18 SPI_m.frequency(5000000);
cbailey1994 0:287361f0056d 19 }
cbailey1994 0:287361f0056d 20
cbailey1994 0:287361f0056d 21
cbailey1994 0:287361f0056d 22
cbailey1994 0:287361f0056d 23 void ADXL362::init_adxl362(){
cbailey1994 0:287361f0056d 24 //uint8_t reg;
cbailey1994 0:287361f0056d 25 // reset the adxl362
cbailey1994 0:287361f0056d 26 wait_ms(200);
cbailey1994 0:287361f0056d 27 ACC_WriteReg(RESET, 0x52);
cbailey1994 0:287361f0056d 28 wait_ms(200);
cbailey1994 0:287361f0056d 29
cbailey1994 0:287361f0056d 30 // set FIFO
cbailey1994 0:287361f0056d 31 ACC_WriteReg(FIFO_CTL,0x0A); // stream mode, AH bit
cbailey1994 0:287361f0056d 32 //ACC_WriteReg(FIFO_CTL,0x02); // stream mode, no AH bit
cbailey1994 0:287361f0056d 33 //reg = ACC_ReadReg(FIFO_CTL);
cbailey1994 0:287361f0056d 34 //pc.printf("FIFO_CTL = 0x%X\r\n", reg);
cbailey1994 0:287361f0056d 35
cbailey1994 0:287361f0056d 36 // Not used but keep in case it is important to set FIFO parameters.
cbailey1994 0:287361f0056d 37 //ACC_WriteReg(FIFO_SAM,SAMPLE_SET * 3); // fifo depth
cbailey1994 0:287361f0056d 38 //reg = ACC_ReadReg(FIFO_SAM);
cbailey1994 0:287361f0056d 39 //pc.printf("FIFO_SAM = 0x%X\r\n", reg);
cbailey1994 0:287361f0056d 40
cbailey1994 0:287361f0056d 41 // set adxl362 to 4g range, 25Hz
cbailey1994 0:287361f0056d 42 //ACC_WriteReg(FILTER_CTL,0x51);
cbailey1994 0:287361f0056d 43 // 2g, 25Hz
cbailey1994 0:287361f0056d 44 ACC_WriteReg(FILTER_CTL,0x11);
cbailey1994 0:287361f0056d 45 //reg = ACC_ReadReg(FILTER_CTL);
cbailey1994 0:287361f0056d 46 //printf("FILTER_CTL = 0x%X\r\n", reg);
cbailey1994 0:287361f0056d 47
cbailey1994 0:287361f0056d 48 // map adxl362 interrupts
cbailey1994 0:287361f0056d 49 //ACC_WriteReg(INTMAP1,0x01); //data ready
cbailey1994 0:287361f0056d 50 ACC_WriteReg(INTMAP1,0x04); //watermark
cbailey1994 0:287361f0056d 51 //reg = ACC_ReadReg(INTMAP1);
cbailey1994 0:287361f0056d 52 //pc.printf("INTMAP1 = 0x%X\r\n", reg);
cbailey1994 0:287361f0056d 53
cbailey1994 0:287361f0056d 54 // set adxl362 to measurement mode, ultralow noise
cbailey1994 0:287361f0056d 55 ACC_WriteReg(POWER_CTL,0x22);
cbailey1994 0:287361f0056d 56 //reg = ACC_ReadReg(POWER_CTL);
cbailey1994 0:287361f0056d 57 //pc.printf("POWER_CTL = 0x%X\r\n", reg);
cbailey1994 0:287361f0056d 58 }
cbailey1994 0:287361f0056d 59
cbailey1994 0:287361f0056d 60 void ADXL362::ACC_GetXYZ8(int8_t* x, int8_t* y, int8_t* z)
cbailey1994 0:287361f0056d 61 {
cbailey1994 0:287361f0056d 62 CBS_m = DOWN;
cbailey1994 0:287361f0056d 63 SPI_m.write(RD_SPI);
cbailey1994 0:287361f0056d 64 SPI_m.write(0x08);
cbailey1994 0:287361f0056d 65
cbailey1994 0:287361f0056d 66 *x = SPI_m.write(0x00);
cbailey1994 0:287361f0056d 67 *y = SPI_m.write(0x00);
cbailey1994 0:287361f0056d 68 *z = SPI_m.write(0x00);
cbailey1994 0:287361f0056d 69
cbailey1994 0:287361f0056d 70 CBS_m = UP;
cbailey1994 0:287361f0056d 71 }
cbailey1994 0:287361f0056d 72
cbailey1994 0:287361f0056d 73
cbailey1994 0:287361f0056d 74 uint8_t ADXL362::ACC_ReadReg( uint8_t reg )
cbailey1994 0:287361f0056d 75 {
cbailey1994 0:287361f0056d 76 CBS_m = DOWN;
cbailey1994 0:287361f0056d 77 SPI_m.write(RD_SPI);
cbailey1994 0:287361f0056d 78 SPI_m.write(reg);
cbailey1994 0:287361f0056d 79 uint8_t val = SPI_m.write(0x00);
cbailey1994 0:287361f0056d 80 CBS_m = UP;
cbailey1994 0:287361f0056d 81 return (val);
cbailey1994 0:287361f0056d 82 }
cbailey1994 0:287361f0056d 83
cbailey1994 0:287361f0056d 84 void ADXL362::ACC_WriteReg( uint8_t reg, uint8_t cmd )
cbailey1994 0:287361f0056d 85 {
cbailey1994 0:287361f0056d 86 CBS_m = DOWN;
cbailey1994 0:287361f0056d 87 SPI_m.write(WR_SPI);
cbailey1994 0:287361f0056d 88 SPI_m.write(reg);
cbailey1994 0:287361f0056d 89 SPI_m.write(cmd);
cbailey1994 0:287361f0056d 90 CBS_m = UP;
cbailey1994 0:287361f0056d 91 }