local copy of sx1276 library
Dependents: SX1276_GPS demo_SX1276_standalone
Fork of SX1276Lib by
sx1276/sx1276.h@1:f979673946c0, 2014-08-19 (annotated)
- Committer:
- GregCr
- Date:
- Tue Aug 19 07:10:31 2014 +0000
- Revision:
- 1:f979673946c0
- Parent:
- 0:e6ceb13d2d05
- Child:
- 4:f0ce52e94d3f
Added board detection following default status of Antenna Switch pin
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
GregCr | 0:e6ceb13d2d05 | 1 | /* |
GregCr | 0:e6ceb13d2d05 | 2 | / _____) _ | | |
GregCr | 0:e6ceb13d2d05 | 3 | ( (____ _____ ____ _| |_ _____ ____| |__ |
GregCr | 0:e6ceb13d2d05 | 4 | \____ \| ___ | (_ _) ___ |/ ___) _ \ |
GregCr | 0:e6ceb13d2d05 | 5 | _____) ) ____| | | || |_| ____( (___| | | | |
GregCr | 0:e6ceb13d2d05 | 6 | (______/|_____)_|_|_| \__)_____)\____)_| |_| |
GregCr | 0:e6ceb13d2d05 | 7 | ( C )2014 Semtech |
GregCr | 0:e6ceb13d2d05 | 8 | |
GregCr | 0:e6ceb13d2d05 | 9 | Description: Actual implementation of a SX1276 radio, inherits Radio |
GregCr | 0:e6ceb13d2d05 | 10 | |
GregCr | 0:e6ceb13d2d05 | 11 | License: Revised BSD License, see LICENSE.TXT file include in the project |
GregCr | 0:e6ceb13d2d05 | 12 | |
GregCr | 0:e6ceb13d2d05 | 13 | Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin |
GregCr | 0:e6ceb13d2d05 | 14 | */ |
GregCr | 0:e6ceb13d2d05 | 15 | #ifndef __SX1276_H__ |
GregCr | 0:e6ceb13d2d05 | 16 | #define __SX1276_H__ |
GregCr | 0:e6ceb13d2d05 | 17 | |
GregCr | 0:e6ceb13d2d05 | 18 | #include "radio.h" |
GregCr | 0:e6ceb13d2d05 | 19 | #include "./registers/sx1276Regs-Fsk.h" |
GregCr | 0:e6ceb13d2d05 | 20 | #include "./registers/sx1276Regs-LoRa.h" |
GregCr | 0:e6ceb13d2d05 | 21 | #include "./typedefs/typedefs.h" |
GregCr | 0:e6ceb13d2d05 | 22 | |
GregCr | 0:e6ceb13d2d05 | 23 | #define XTAL_FREQ 32000000 |
GregCr | 0:e6ceb13d2d05 | 24 | #define FREQ_STEP 61.03515625 |
GregCr | 0:e6ceb13d2d05 | 25 | |
GregCr | 0:e6ceb13d2d05 | 26 | #define RX_BUFFER_SIZE 256 |
GregCr | 0:e6ceb13d2d05 | 27 | |
GregCr | 0:e6ceb13d2d05 | 28 | #define DEFAULT_TIMEOUT 200 //usec |
GregCr | 0:e6ceb13d2d05 | 29 | #define RSSI_OFFSET -139.0 |
GregCr | 0:e6ceb13d2d05 | 30 | |
GregCr | 0:e6ceb13d2d05 | 31 | |
GregCr | 0:e6ceb13d2d05 | 32 | /*! |
GregCr | 0:e6ceb13d2d05 | 33 | * Constant values need to compute the RSSI value |
GregCr | 0:e6ceb13d2d05 | 34 | */ |
GregCr | 0:e6ceb13d2d05 | 35 | #define NOISE_ABSOLUTE_ZERO -174.0 |
GregCr | 0:e6ceb13d2d05 | 36 | #define NOISE_FIGURE_LF 4.0 |
GregCr | 0:e6ceb13d2d05 | 37 | #define NOISE_FIGURE_HF 6.0 |
GregCr | 0:e6ceb13d2d05 | 38 | #define RSSI_OFFSET_LF -164.0 |
GregCr | 0:e6ceb13d2d05 | 39 | #define RSSI_OFFSET_HF -157.0 |
GregCr | 0:e6ceb13d2d05 | 40 | |
GregCr | 0:e6ceb13d2d05 | 41 | #define RF_MID_BAND_THRESH 525000000 |
GregCr | 0:e6ceb13d2d05 | 42 | |
GregCr | 0:e6ceb13d2d05 | 43 | /*! |
GregCr | 0:e6ceb13d2d05 | 44 | * Actual implementation of a SX1276 radio, inherits Radio |
GregCr | 0:e6ceb13d2d05 | 45 | */ |
GregCr | 0:e6ceb13d2d05 | 46 | class SX1276 : public Radio |
GregCr | 0:e6ceb13d2d05 | 47 | { |
GregCr | 0:e6ceb13d2d05 | 48 | protected: |
GregCr | 0:e6ceb13d2d05 | 49 | /*! |
GregCr | 0:e6ceb13d2d05 | 50 | * SPI Interface |
GregCr | 0:e6ceb13d2d05 | 51 | */ |
GregCr | 0:e6ceb13d2d05 | 52 | SPI spi; // mosi, miso, sclk |
GregCr | 0:e6ceb13d2d05 | 53 | DigitalOut nss; |
GregCr | 0:e6ceb13d2d05 | 54 | |
GregCr | 0:e6ceb13d2d05 | 55 | /*! |
GregCr | 0:e6ceb13d2d05 | 56 | * SX1276 Reset pin |
GregCr | 0:e6ceb13d2d05 | 57 | */ |
GregCr | 0:e6ceb13d2d05 | 58 | DigitalOut reset; |
GregCr | 0:e6ceb13d2d05 | 59 | |
GregCr | 0:e6ceb13d2d05 | 60 | /*! |
GregCr | 0:e6ceb13d2d05 | 61 | * SX1276 DIO pins |
GregCr | 0:e6ceb13d2d05 | 62 | */ |
GregCr | 0:e6ceb13d2d05 | 63 | InterruptIn dio0; |
GregCr | 0:e6ceb13d2d05 | 64 | InterruptIn dio1; |
GregCr | 0:e6ceb13d2d05 | 65 | InterruptIn dio2; |
GregCr | 0:e6ceb13d2d05 | 66 | InterruptIn dio3; |
GregCr | 0:e6ceb13d2d05 | 67 | InterruptIn dio4; |
GregCr | 0:e6ceb13d2d05 | 68 | DigitalIn dio5; |
GregCr | 0:e6ceb13d2d05 | 69 | |
GregCr | 0:e6ceb13d2d05 | 70 | bool isRadioActive; |
GregCr | 0:e6ceb13d2d05 | 71 | |
GregCr | 1:f979673946c0 | 72 | uint8_t boardConnected; //1 = SX1276MB1LAS; 0 = SX1276MB1MAS |
GregCr | 1:f979673946c0 | 73 | |
GregCr | 0:e6ceb13d2d05 | 74 | uint8_t *rxBuffer; |
GregCr | 0:e6ceb13d2d05 | 75 | |
GregCr | 0:e6ceb13d2d05 | 76 | uint8_t previousOpMode; |
GregCr | 0:e6ceb13d2d05 | 77 | |
GregCr | 0:e6ceb13d2d05 | 78 | /*! |
GregCr | 0:e6ceb13d2d05 | 79 | * Hardware DIO IRQ functions |
GregCr | 0:e6ceb13d2d05 | 80 | */ |
GregCr | 0:e6ceb13d2d05 | 81 | DioIrqHandler *dioIrq; |
GregCr | 0:e6ceb13d2d05 | 82 | |
GregCr | 0:e6ceb13d2d05 | 83 | /*! |
GregCr | 0:e6ceb13d2d05 | 84 | * Tx and Rx timers |
GregCr | 0:e6ceb13d2d05 | 85 | */ |
GregCr | 0:e6ceb13d2d05 | 86 | Timeout txTimeoutTimer; |
GregCr | 0:e6ceb13d2d05 | 87 | Timeout rxTimeoutTimer; |
GregCr | 0:e6ceb13d2d05 | 88 | Timeout rxTimeoutSyncWord; |
GregCr | 0:e6ceb13d2d05 | 89 | |
GregCr | 0:e6ceb13d2d05 | 90 | /*! |
GregCr | 0:e6ceb13d2d05 | 91 | * rxTx: [1: Tx, 0: Rx] |
GregCr | 0:e6ceb13d2d05 | 92 | */ |
GregCr | 0:e6ceb13d2d05 | 93 | uint8_t rxTx; |
GregCr | 0:e6ceb13d2d05 | 94 | |
GregCr | 0:e6ceb13d2d05 | 95 | RadioSettings_t settings; |
GregCr | 0:e6ceb13d2d05 | 96 | |
GregCr | 0:e6ceb13d2d05 | 97 | static const FskBandwidth_t FskBandwidths[] ; |
GregCr | 0:e6ceb13d2d05 | 98 | protected: |
GregCr | 0:e6ceb13d2d05 | 99 | |
GregCr | 0:e6ceb13d2d05 | 100 | /*! |
GregCr | 0:e6ceb13d2d05 | 101 | * Performs the Rx chain calibration for LF and HF bands |
GregCr | 0:e6ceb13d2d05 | 102 | * \remark Must be called just after the reset so all registers are at their |
GregCr | 0:e6ceb13d2d05 | 103 | * default values |
GregCr | 0:e6ceb13d2d05 | 104 | */ |
GregCr | 0:e6ceb13d2d05 | 105 | void RxChainCalibration( void ); |
GregCr | 0:e6ceb13d2d05 | 106 | |
GregCr | 0:e6ceb13d2d05 | 107 | public: |
GregCr | 0:e6ceb13d2d05 | 108 | SX1276( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int8_t rssi, int8_t snr ), void ( *rxTimeout ) ( ), void ( *rxError ) ( ), |
GregCr | 0:e6ceb13d2d05 | 109 | PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset, |
GregCr | 0:e6ceb13d2d05 | 110 | PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5 ); |
GregCr | 0:e6ceb13d2d05 | 111 | SX1276( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int8_t rssi, int8_t snr ), void ( *rxTimeout ) ( ), void ( *rxError ) ( ) ); |
GregCr | 0:e6ceb13d2d05 | 112 | virtual ~SX1276( ); |
GregCr | 0:e6ceb13d2d05 | 113 | |
GregCr | 0:e6ceb13d2d05 | 114 | //------------------------------------------------------------------------- |
GregCr | 0:e6ceb13d2d05 | 115 | // Redefined Radio functions |
GregCr | 0:e6ceb13d2d05 | 116 | //------------------------------------------------------------------------- |
GregCr | 0:e6ceb13d2d05 | 117 | /*! |
GregCr | 0:e6ceb13d2d05 | 118 | * Return current radio status |
GregCr | 0:e6ceb13d2d05 | 119 | * |
GregCr | 0:e6ceb13d2d05 | 120 | * @param status Radio status. [IDLE, RX_RUNNING, TX_RUNNING] |
GregCr | 0:e6ceb13d2d05 | 121 | */ |
GregCr | 0:e6ceb13d2d05 | 122 | virtual RadioState GetState( void ); |
GregCr | 0:e6ceb13d2d05 | 123 | |
GregCr | 0:e6ceb13d2d05 | 124 | /*! |
GregCr | 0:e6ceb13d2d05 | 125 | * @brief Sets the channel frequency |
GregCr | 0:e6ceb13d2d05 | 126 | * |
GregCr | 0:e6ceb13d2d05 | 127 | * @param [IN] freq Channel RF frequency |
GregCr | 0:e6ceb13d2d05 | 128 | */ |
GregCr | 0:e6ceb13d2d05 | 129 | virtual void SetChannel( uint32_t freq ); |
GregCr | 0:e6ceb13d2d05 | 130 | |
GregCr | 0:e6ceb13d2d05 | 131 | /*! |
GregCr | 0:e6ceb13d2d05 | 132 | * @brief Sets the channels configuration |
GregCr | 0:e6ceb13d2d05 | 133 | * |
GregCr | 0:e6ceb13d2d05 | 134 | * @param [IN] modem Radio modem to be used [0: FSK, 1: LoRa] |
GregCr | 0:e6ceb13d2d05 | 135 | * @param [IN] freq Channel RF frequency |
GregCr | 0:e6ceb13d2d05 | 136 | * @param [IN] rssiThresh RSSI threshold |
GregCr | 0:e6ceb13d2d05 | 137 | * |
GregCr | 0:e6ceb13d2d05 | 138 | * @retval isFree [true: Channel is free, false: Channel is not free] |
GregCr | 0:e6ceb13d2d05 | 139 | */ |
GregCr | 0:e6ceb13d2d05 | 140 | virtual bool IsChannelFree( ModemType modem, uint32_t freq, int8_t rssiThresh ); |
GregCr | 0:e6ceb13d2d05 | 141 | |
GregCr | 0:e6ceb13d2d05 | 142 | /*! |
GregCr | 0:e6ceb13d2d05 | 143 | * @brief Generates a 32 bits random value based on the RSSI readings |
GregCr | 0:e6ceb13d2d05 | 144 | * |
GregCr | 0:e6ceb13d2d05 | 145 | * \remark This function sets the radio in LoRa modem mode and disables |
GregCr | 0:e6ceb13d2d05 | 146 | * all interrupts. |
GregCr | 0:e6ceb13d2d05 | 147 | * After calling this function either Radio.SetRxConfig or |
GregCr | 0:e6ceb13d2d05 | 148 | * Radio.SetTxConfig functions must be called. |
GregCr | 0:e6ceb13d2d05 | 149 | * |
GregCr | 0:e6ceb13d2d05 | 150 | * @retval randomValue 32 bits random value |
GregCr | 0:e6ceb13d2d05 | 151 | */ |
GregCr | 0:e6ceb13d2d05 | 152 | virtual uint32_t Random( void ); |
GregCr | 0:e6ceb13d2d05 | 153 | |
GregCr | 0:e6ceb13d2d05 | 154 | /*! |
GregCr | 0:e6ceb13d2d05 | 155 | * @brief Sets the reception parameters |
GregCr | 0:e6ceb13d2d05 | 156 | * |
GregCr | 0:e6ceb13d2d05 | 157 | * @param [IN] modem Radio modem to be used [0: FSK, 1: LoRa] |
GregCr | 0:e6ceb13d2d05 | 158 | * @param [IN] bandwidth Sets the bandwidth |
GregCr | 0:e6ceb13d2d05 | 159 | * FSK : >= 2600 and <= 250000 Hz |
GregCr | 0:e6ceb13d2d05 | 160 | * LoRa: [0: 125 kHz, 1: 250 kHz, |
GregCr | 0:e6ceb13d2d05 | 161 | * 2: 500 kHz, 3: Reserved] |
GregCr | 0:e6ceb13d2d05 | 162 | * @param [IN] datarate Sets the Datarate |
GregCr | 0:e6ceb13d2d05 | 163 | * FSK : 600..300000 bits/s |
GregCr | 0:e6ceb13d2d05 | 164 | * LoRa: [6: 64, 7: 128, 8: 256, 9: 512, |
GregCr | 0:e6ceb13d2d05 | 165 | * 10: 1024, 11: 2048, 12: 4096 chips] |
GregCr | 0:e6ceb13d2d05 | 166 | * @param [IN] coderate Sets the coding rate ( LoRa only ) |
GregCr | 0:e6ceb13d2d05 | 167 | * FSK : N/A ( set to 0 ) |
GregCr | 0:e6ceb13d2d05 | 168 | * LoRa: [1: 4/5, 2: 4/6, 3: 4/7, 4: 4/8] |
GregCr | 0:e6ceb13d2d05 | 169 | * @param [IN] bandwidthAfc Sets the AFC Bandwidth ( FSK only ) |
GregCr | 0:e6ceb13d2d05 | 170 | * FSK : >= 2600 and <= 250000 Hz |
GregCr | 0:e6ceb13d2d05 | 171 | * LoRa: N/A ( set to 0 ) |
GregCr | 0:e6ceb13d2d05 | 172 | * @param [IN] preambleLen Sets the Preamble length ( LoRa only ) |
GregCr | 0:e6ceb13d2d05 | 173 | * FSK : N/A ( set to 0 ) |
GregCr | 0:e6ceb13d2d05 | 174 | * LoRa: Length in symbols ( the hardware adds 4 more symbols ) |
GregCr | 0:e6ceb13d2d05 | 175 | * @param [IN] symbTimeout Sets the RxSingle timeout value ( LoRa only ) |
GregCr | 0:e6ceb13d2d05 | 176 | * FSK : N/A ( set to 0 ) |
GregCr | 0:e6ceb13d2d05 | 177 | * LoRa: timeout in symbols |
GregCr | 0:e6ceb13d2d05 | 178 | * @param [IN] fixLen Fixed length packets [0: variable, 1: fixed] |
GregCr | 0:e6ceb13d2d05 | 179 | * @param [IN] crcOn Enables/Disables the CRC [0: OFF, 1: ON] |
GregCr | 0:e6ceb13d2d05 | 180 | * @param [IN] iqInverted Inverts IQ signals ( LoRa only ) |
GregCr | 0:e6ceb13d2d05 | 181 | * FSK : N/A ( set to 0 ) |
GregCr | 0:e6ceb13d2d05 | 182 | * LoRa: [0: not inverted, 1: inverted] |
GregCr | 0:e6ceb13d2d05 | 183 | * @param [IN] rxContinuous Sets the reception in continuous mode |
GregCr | 0:e6ceb13d2d05 | 184 | * [false: single mode, true: continuous mode] |
GregCr | 0:e6ceb13d2d05 | 185 | */ |
GregCr | 0:e6ceb13d2d05 | 186 | virtual void SetRxConfig ( ModemType modem, uint32_t bandwidth, |
GregCr | 0:e6ceb13d2d05 | 187 | uint32_t datarate, uint8_t coderate, |
GregCr | 0:e6ceb13d2d05 | 188 | uint32_t bandwidthAfc, uint16_t preambleLen, |
GregCr | 0:e6ceb13d2d05 | 189 | uint16_t symbTimeout, bool fixLen, |
GregCr | 0:e6ceb13d2d05 | 190 | bool crcOn, bool iqInverted, bool rxContinuous ); |
GregCr | 0:e6ceb13d2d05 | 191 | |
GregCr | 0:e6ceb13d2d05 | 192 | /*! |
GregCr | 0:e6ceb13d2d05 | 193 | * @brief Sets the transmission parameters |
GregCr | 0:e6ceb13d2d05 | 194 | * |
GregCr | 0:e6ceb13d2d05 | 195 | * @param [IN] modem Radio modem to be used [0: FSK, 1: LoRa] |
GregCr | 0:e6ceb13d2d05 | 196 | * @param [IN] power Sets the output power [dBm] |
GregCr | 0:e6ceb13d2d05 | 197 | * @param [IN] fdev Sets the frequency deviation ( FSK only ) |
GregCr | 0:e6ceb13d2d05 | 198 | * FSK : [Hz] |
GregCr | 0:e6ceb13d2d05 | 199 | * LoRa: 0 |
GregCr | 0:e6ceb13d2d05 | 200 | * @param [IN] bandwidth Sets the bandwidth ( LoRa only ) |
GregCr | 0:e6ceb13d2d05 | 201 | * FSK : 0 |
GregCr | 0:e6ceb13d2d05 | 202 | * LoRa: [0: 125 kHz, 1: 250 kHz, |
GregCr | 0:e6ceb13d2d05 | 203 | * 2: 500 kHz, 3: Reserved] |
GregCr | 0:e6ceb13d2d05 | 204 | * @param [IN] datarate Sets the Datarate |
GregCr | 0:e6ceb13d2d05 | 205 | * FSK : 600..300000 bits/s |
GregCr | 0:e6ceb13d2d05 | 206 | * LoRa: [6: 64, 7: 128, 8: 256, 9: 512, |
GregCr | 0:e6ceb13d2d05 | 207 | * 10: 1024, 11: 2048, 12: 4096 chips] |
GregCr | 0:e6ceb13d2d05 | 208 | * @param [IN] coderate Sets the coding rate ( LoRa only ) |
GregCr | 0:e6ceb13d2d05 | 209 | * FSK : N/A ( set to 0 ) |
GregCr | 0:e6ceb13d2d05 | 210 | * LoRa: [1: 4/5, 2: 4/6, 3: 4/7, 4: 4/8] |
GregCr | 0:e6ceb13d2d05 | 211 | * @param [IN] preambleLen Sets the preamble length |
GregCr | 0:e6ceb13d2d05 | 212 | * @param [IN] fixLen Fixed length packets [0: variable, 1: fixed] |
GregCr | 0:e6ceb13d2d05 | 213 | * @param [IN] crcOn Enables disables the CRC [0: OFF, 1: ON] |
GregCr | 0:e6ceb13d2d05 | 214 | * @param [IN] iqInverted Inverts IQ signals ( LoRa only ) |
GregCr | 0:e6ceb13d2d05 | 215 | * FSK : N/A ( set to 0 ) |
GregCr | 0:e6ceb13d2d05 | 216 | * LoRa: [0: not inverted, 1: inverted] |
GregCr | 0:e6ceb13d2d05 | 217 | * @param [IN] timeout Transmission timeout [us] |
GregCr | 0:e6ceb13d2d05 | 218 | */ |
GregCr | 0:e6ceb13d2d05 | 219 | virtual void SetTxConfig( ModemType modem, int8_t power, uint32_t fdev, |
GregCr | 0:e6ceb13d2d05 | 220 | uint32_t bandwidth, uint32_t datarate, |
GregCr | 0:e6ceb13d2d05 | 221 | uint8_t coderate, uint16_t preambleLen, |
GregCr | 0:e6ceb13d2d05 | 222 | bool fixLen, bool crcOn, |
GregCr | 0:e6ceb13d2d05 | 223 | bool iqInverted, uint32_t timeout ); |
GregCr | 0:e6ceb13d2d05 | 224 | |
GregCr | 0:e6ceb13d2d05 | 225 | /*! |
GregCr | 0:e6ceb13d2d05 | 226 | * @brief Computes the packet time on air for the given payload |
GregCr | 0:e6ceb13d2d05 | 227 | * |
GregCr | 0:e6ceb13d2d05 | 228 | * \Remark Can only be called once SetRxConfig or SetTxConfig have been called |
GregCr | 0:e6ceb13d2d05 | 229 | * |
GregCr | 0:e6ceb13d2d05 | 230 | * @param [IN] modem Radio modem to be used [0: FSK, 1: LoRa] |
GregCr | 0:e6ceb13d2d05 | 231 | * @param [IN] pktLen Packet payload length |
GregCr | 0:e6ceb13d2d05 | 232 | * |
GregCr | 0:e6ceb13d2d05 | 233 | * @retval airTime Computed airTime for the given packet payload length |
GregCr | 0:e6ceb13d2d05 | 234 | */ |
GregCr | 0:e6ceb13d2d05 | 235 | virtual double TimeOnAir ( ModemType modem, uint8_t pktLen ); |
GregCr | 0:e6ceb13d2d05 | 236 | |
GregCr | 0:e6ceb13d2d05 | 237 | /*! |
GregCr | 0:e6ceb13d2d05 | 238 | * @brief Sends the buffer of size. Prepares the packet to be sent and sets |
GregCr | 0:e6ceb13d2d05 | 239 | * the radio in transmission |
GregCr | 0:e6ceb13d2d05 | 240 | * |
GregCr | 0:e6ceb13d2d05 | 241 | * @param [IN]: buffer Buffer pointer |
GregCr | 0:e6ceb13d2d05 | 242 | * @param [IN]: size Buffer size |
GregCr | 0:e6ceb13d2d05 | 243 | */ |
GregCr | 0:e6ceb13d2d05 | 244 | virtual void Send( uint8_t *buffer, uint8_t size ); |
GregCr | 0:e6ceb13d2d05 | 245 | |
GregCr | 0:e6ceb13d2d05 | 246 | /*! |
GregCr | 0:e6ceb13d2d05 | 247 | * @brief Sets the radio in sleep mode |
GregCr | 0:e6ceb13d2d05 | 248 | */ |
GregCr | 0:e6ceb13d2d05 | 249 | virtual void Sleep( void ); |
GregCr | 0:e6ceb13d2d05 | 250 | |
GregCr | 0:e6ceb13d2d05 | 251 | /*! |
GregCr | 0:e6ceb13d2d05 | 252 | * @brief Sets the radio in standby mode |
GregCr | 0:e6ceb13d2d05 | 253 | */ |
GregCr | 0:e6ceb13d2d05 | 254 | virtual void Standby( void ); |
GregCr | 0:e6ceb13d2d05 | 255 | |
GregCr | 0:e6ceb13d2d05 | 256 | /*! |
GregCr | 0:e6ceb13d2d05 | 257 | * @brief Sets the radio in reception mode for the given time |
GregCr | 0:e6ceb13d2d05 | 258 | * @param [IN] timeout Reception timeout [us] |
GregCr | 0:e6ceb13d2d05 | 259 | * [0: continuous, others timeout] |
GregCr | 0:e6ceb13d2d05 | 260 | */ |
GregCr | 0:e6ceb13d2d05 | 261 | virtual void Rx( uint32_t timeout ); |
GregCr | 0:e6ceb13d2d05 | 262 | |
GregCr | 0:e6ceb13d2d05 | 263 | /*! |
GregCr | 0:e6ceb13d2d05 | 264 | * @brief Sets the radio in transmission mode for the given time |
GregCr | 0:e6ceb13d2d05 | 265 | * @param [IN] timeout Transmission timeout [us] |
GregCr | 0:e6ceb13d2d05 | 266 | * [0: continuous, others timeout] |
GregCr | 0:e6ceb13d2d05 | 267 | */ |
GregCr | 0:e6ceb13d2d05 | 268 | virtual void Tx( uint32_t timeout ); |
GregCr | 0:e6ceb13d2d05 | 269 | |
GregCr | 0:e6ceb13d2d05 | 270 | /*! |
GregCr | 0:e6ceb13d2d05 | 271 | * @brief Reads the current RSSI value |
GregCr | 0:e6ceb13d2d05 | 272 | * |
GregCr | 0:e6ceb13d2d05 | 273 | * @retval rssiValue Current RSSI value in [dBm] |
GregCr | 0:e6ceb13d2d05 | 274 | */ |
GregCr | 0:e6ceb13d2d05 | 275 | virtual int8_t GetRssi ( ModemType modem ); |
GregCr | 0:e6ceb13d2d05 | 276 | |
GregCr | 0:e6ceb13d2d05 | 277 | /*! |
GregCr | 0:e6ceb13d2d05 | 278 | * @brief Writes the radio register at the specified address |
GregCr | 0:e6ceb13d2d05 | 279 | * |
GregCr | 0:e6ceb13d2d05 | 280 | * @param [IN]: addr Register address |
GregCr | 0:e6ceb13d2d05 | 281 | * @param [IN]: data New register value |
GregCr | 0:e6ceb13d2d05 | 282 | */ |
GregCr | 0:e6ceb13d2d05 | 283 | virtual void Write ( uint8_t addr, uint8_t data ) = 0; |
GregCr | 0:e6ceb13d2d05 | 284 | |
GregCr | 0:e6ceb13d2d05 | 285 | /*! |
GregCr | 0:e6ceb13d2d05 | 286 | * @brief Reads the radio register at the specified address |
GregCr | 0:e6ceb13d2d05 | 287 | * |
GregCr | 0:e6ceb13d2d05 | 288 | * @param [IN]: addr Register address |
GregCr | 0:e6ceb13d2d05 | 289 | * @retval data Register value |
GregCr | 0:e6ceb13d2d05 | 290 | */ |
GregCr | 0:e6ceb13d2d05 | 291 | virtual uint8_t Read ( uint8_t addr ) = 0; |
GregCr | 0:e6ceb13d2d05 | 292 | |
GregCr | 0:e6ceb13d2d05 | 293 | /*! |
GregCr | 0:e6ceb13d2d05 | 294 | * @brief Writes multiple radio registers starting at address |
GregCr | 0:e6ceb13d2d05 | 295 | * |
GregCr | 0:e6ceb13d2d05 | 296 | * @param [IN] addr First Radio register address |
GregCr | 0:e6ceb13d2d05 | 297 | * @param [IN] buffer Buffer containing the new register's values |
GregCr | 0:e6ceb13d2d05 | 298 | * @param [IN] size Number of registers to be written |
GregCr | 0:e6ceb13d2d05 | 299 | */ |
GregCr | 0:e6ceb13d2d05 | 300 | virtual void Write( uint8_t addr, uint8_t *buffer, uint8_t size ) = 0; |
GregCr | 0:e6ceb13d2d05 | 301 | |
GregCr | 0:e6ceb13d2d05 | 302 | /*! |
GregCr | 0:e6ceb13d2d05 | 303 | * @brief Reads multiple radio registers starting at address |
GregCr | 0:e6ceb13d2d05 | 304 | * |
GregCr | 0:e6ceb13d2d05 | 305 | * @param [IN] addr First Radio register address |
GregCr | 0:e6ceb13d2d05 | 306 | * @param [OUT] buffer Buffer where to copy the registers data |
GregCr | 0:e6ceb13d2d05 | 307 | * @param [IN] size Number of registers to be read |
GregCr | 0:e6ceb13d2d05 | 308 | */ |
GregCr | 0:e6ceb13d2d05 | 309 | virtual void Read ( uint8_t addr, uint8_t *buffer, uint8_t size ) = 0; |
GregCr | 0:e6ceb13d2d05 | 310 | |
GregCr | 0:e6ceb13d2d05 | 311 | /*! |
GregCr | 0:e6ceb13d2d05 | 312 | * @brief Writes the buffer contents to the SX1276 FIFO |
GregCr | 0:e6ceb13d2d05 | 313 | * |
GregCr | 0:e6ceb13d2d05 | 314 | * @param [IN] buffer Buffer containing data to be put on the FIFO. |
GregCr | 0:e6ceb13d2d05 | 315 | * @param [IN] size Number of bytes to be written to the FIFO |
GregCr | 0:e6ceb13d2d05 | 316 | */ |
GregCr | 0:e6ceb13d2d05 | 317 | virtual void WriteFifo( uint8_t *buffer, uint8_t size ) = 0; |
GregCr | 0:e6ceb13d2d05 | 318 | |
GregCr | 0:e6ceb13d2d05 | 319 | /*! |
GregCr | 0:e6ceb13d2d05 | 320 | * @brief Reads the contents of the SX1276 FIFO |
GregCr | 0:e6ceb13d2d05 | 321 | * |
GregCr | 0:e6ceb13d2d05 | 322 | * @param [OUT] buffer Buffer where to copy the FIFO read data. |
GregCr | 0:e6ceb13d2d05 | 323 | * @param [IN] size Number of bytes to be read from the FIFO |
GregCr | 0:e6ceb13d2d05 | 324 | */ |
GregCr | 0:e6ceb13d2d05 | 325 | virtual void ReadFifo( uint8_t *buffer, uint8_t size ) = 0; |
GregCr | 0:e6ceb13d2d05 | 326 | /*! |
GregCr | 0:e6ceb13d2d05 | 327 | * @brief Resets the SX1276 |
GregCr | 0:e6ceb13d2d05 | 328 | */ |
GregCr | 0:e6ceb13d2d05 | 329 | virtual void Reset( void ) = 0; |
GregCr | 0:e6ceb13d2d05 | 330 | |
GregCr | 0:e6ceb13d2d05 | 331 | //------------------------------------------------------------------------- |
GregCr | 0:e6ceb13d2d05 | 332 | // Board relative functions |
GregCr | 0:e6ceb13d2d05 | 333 | //------------------------------------------------------------------------- |
GregCr | 0:e6ceb13d2d05 | 334 | |
GregCr | 0:e6ceb13d2d05 | 335 | protected: |
GregCr | 0:e6ceb13d2d05 | 336 | /*! |
GregCr | 0:e6ceb13d2d05 | 337 | * @brief Initializes the radio I/Os pins interface |
GregCr | 0:e6ceb13d2d05 | 338 | */ |
GregCr | 0:e6ceb13d2d05 | 339 | virtual void IoInit( void ) = 0; |
GregCr | 0:e6ceb13d2d05 | 340 | |
GregCr | 0:e6ceb13d2d05 | 341 | /*! |
GregCr | 0:e6ceb13d2d05 | 342 | * @brief Initializes the radio registers |
GregCr | 0:e6ceb13d2d05 | 343 | */ |
GregCr | 0:e6ceb13d2d05 | 344 | virtual void RadioRegistersInit( ) = 0; |
GregCr | 0:e6ceb13d2d05 | 345 | |
GregCr | 0:e6ceb13d2d05 | 346 | /*! |
GregCr | 0:e6ceb13d2d05 | 347 | * @brief Initializes the radio SPI |
GregCr | 0:e6ceb13d2d05 | 348 | */ |
GregCr | 0:e6ceb13d2d05 | 349 | virtual void SpiInit( void ) = 0; |
GregCr | 0:e6ceb13d2d05 | 350 | |
GregCr | 0:e6ceb13d2d05 | 351 | /*! |
GregCr | 0:e6ceb13d2d05 | 352 | * @brief Initializes DIO IRQ handlers |
GregCr | 0:e6ceb13d2d05 | 353 | * |
GregCr | 0:e6ceb13d2d05 | 354 | * @param [IN] irqHandlers Array containing the IRQ callback functions |
GregCr | 0:e6ceb13d2d05 | 355 | */ |
GregCr | 0:e6ceb13d2d05 | 356 | virtual void IoIrqInit( DioIrqHandler *irqHandlers ) = 0; |
GregCr | 0:e6ceb13d2d05 | 357 | |
GregCr | 0:e6ceb13d2d05 | 358 | /*! |
GregCr | 0:e6ceb13d2d05 | 359 | * @brief De-initializes the radio I/Os pins interface. |
GregCr | 0:e6ceb13d2d05 | 360 | * |
GregCr | 0:e6ceb13d2d05 | 361 | * \remark Useful when going in MCU lowpower modes |
GregCr | 0:e6ceb13d2d05 | 362 | */ |
GregCr | 0:e6ceb13d2d05 | 363 | virtual void IoDeInit( void ) = 0; |
GregCr | 0:e6ceb13d2d05 | 364 | |
GregCr | 0:e6ceb13d2d05 | 365 | /*! |
GregCr | 0:e6ceb13d2d05 | 366 | * @brief Gets the board PA selection configuration |
GregCr | 0:e6ceb13d2d05 | 367 | * |
GregCr | 0:e6ceb13d2d05 | 368 | * @param [IN] channel Channel frequency in Hz |
GregCr | 0:e6ceb13d2d05 | 369 | * @retval PaSelect RegPaConfig PaSelect value |
GregCr | 0:e6ceb13d2d05 | 370 | */ |
GregCr | 0:e6ceb13d2d05 | 371 | virtual uint8_t GetPaSelect( uint32_t channel ) = 0; |
GregCr | 0:e6ceb13d2d05 | 372 | |
GregCr | 0:e6ceb13d2d05 | 373 | /*! |
GregCr | 0:e6ceb13d2d05 | 374 | * @brief Set the RF Switch I/Os pins in Low Power mode |
GregCr | 0:e6ceb13d2d05 | 375 | * |
GregCr | 0:e6ceb13d2d05 | 376 | * @param [IN] status enable or disable |
GregCr | 0:e6ceb13d2d05 | 377 | */ |
GregCr | 0:e6ceb13d2d05 | 378 | virtual void SetAntSwLowPower( bool status ) = 0; |
GregCr | 0:e6ceb13d2d05 | 379 | |
GregCr | 0:e6ceb13d2d05 | 380 | /*! |
GregCr | 0:e6ceb13d2d05 | 381 | * @brief Initializes the RF Switch I/Os pins interface |
GregCr | 0:e6ceb13d2d05 | 382 | */ |
GregCr | 0:e6ceb13d2d05 | 383 | virtual void AntSwInit( void ) = 0; |
GregCr | 0:e6ceb13d2d05 | 384 | |
GregCr | 0:e6ceb13d2d05 | 385 | /*! |
GregCr | 0:e6ceb13d2d05 | 386 | * @brief De-initializes the RF Switch I/Os pins interface |
GregCr | 0:e6ceb13d2d05 | 387 | * |
GregCr | 0:e6ceb13d2d05 | 388 | * \remark Needed to decrease the power consumption in MCU lowpower modes |
GregCr | 0:e6ceb13d2d05 | 389 | */ |
GregCr | 0:e6ceb13d2d05 | 390 | virtual void AntSwDeInit( void ) = 0; |
GregCr | 0:e6ceb13d2d05 | 391 | |
GregCr | 0:e6ceb13d2d05 | 392 | /*! |
GregCr | 0:e6ceb13d2d05 | 393 | * @brief Controls the antena switch if necessary. |
GregCr | 0:e6ceb13d2d05 | 394 | * |
GregCr | 0:e6ceb13d2d05 | 395 | * \remark see errata note |
GregCr | 0:e6ceb13d2d05 | 396 | * |
GregCr | 0:e6ceb13d2d05 | 397 | * @param [IN] rxTx [1: Tx, 0: Rx] |
GregCr | 0:e6ceb13d2d05 | 398 | */ |
GregCr | 0:e6ceb13d2d05 | 399 | virtual void SetAntSw( uint8_t rxTx ) = 0; |
GregCr | 0:e6ceb13d2d05 | 400 | |
GregCr | 0:e6ceb13d2d05 | 401 | /*! |
GregCr | 0:e6ceb13d2d05 | 402 | * @brief Checks if the given RF frequency is supported by the hardware |
GregCr | 0:e6ceb13d2d05 | 403 | * |
GregCr | 0:e6ceb13d2d05 | 404 | * @param [IN] frequency RF frequency to be checked |
GregCr | 0:e6ceb13d2d05 | 405 | * @retval isSupported [true: supported, false: unsupported] |
GregCr | 0:e6ceb13d2d05 | 406 | */ |
GregCr | 0:e6ceb13d2d05 | 407 | virtual bool CheckRfFrequency( uint32_t frequency ) = 0; |
GregCr | 0:e6ceb13d2d05 | 408 | protected: |
GregCr | 0:e6ceb13d2d05 | 409 | |
GregCr | 0:e6ceb13d2d05 | 410 | /*! |
GregCr | 0:e6ceb13d2d05 | 411 | * @brief Sets the SX1276 operating mode |
GregCr | 0:e6ceb13d2d05 | 412 | * |
GregCr | 0:e6ceb13d2d05 | 413 | * @param [IN] opMode New operating mode |
GregCr | 0:e6ceb13d2d05 | 414 | */ |
GregCr | 0:e6ceb13d2d05 | 415 | virtual void SetOpMode( uint8_t opMode ); |
GregCr | 0:e6ceb13d2d05 | 416 | |
GregCr | 0:e6ceb13d2d05 | 417 | /*! |
GregCr | 0:e6ceb13d2d05 | 418 | * @brief Configures the SX1276 with the given modem |
GregCr | 0:e6ceb13d2d05 | 419 | * |
GregCr | 0:e6ceb13d2d05 | 420 | * @param [IN] modem Modem to be used [0: FSK, 1: LoRa] |
GregCr | 0:e6ceb13d2d05 | 421 | */ |
GregCr | 0:e6ceb13d2d05 | 422 | virtual void SetModem( ModemType modem ); |
GregCr | 0:e6ceb13d2d05 | 423 | |
GregCr | 0:e6ceb13d2d05 | 424 | /* |
GregCr | 0:e6ceb13d2d05 | 425 | * SX1276 DIO IRQ callback functions prototype |
GregCr | 0:e6ceb13d2d05 | 426 | */ |
GregCr | 0:e6ceb13d2d05 | 427 | |
GregCr | 0:e6ceb13d2d05 | 428 | /*! |
GregCr | 0:e6ceb13d2d05 | 429 | * @brief DIO 0 IRQ callback |
GregCr | 0:e6ceb13d2d05 | 430 | */ |
GregCr | 0:e6ceb13d2d05 | 431 | virtual void OnDio0Irq( void ); |
GregCr | 0:e6ceb13d2d05 | 432 | |
GregCr | 0:e6ceb13d2d05 | 433 | /*! |
GregCr | 0:e6ceb13d2d05 | 434 | * @brief DIO 1 IRQ callback |
GregCr | 0:e6ceb13d2d05 | 435 | */ |
GregCr | 0:e6ceb13d2d05 | 436 | virtual void OnDio1Irq( void ); |
GregCr | 0:e6ceb13d2d05 | 437 | |
GregCr | 0:e6ceb13d2d05 | 438 | /*! |
GregCr | 0:e6ceb13d2d05 | 439 | * @brief DIO 2 IRQ callback |
GregCr | 0:e6ceb13d2d05 | 440 | */ |
GregCr | 0:e6ceb13d2d05 | 441 | virtual void OnDio2Irq( void ); |
GregCr | 0:e6ceb13d2d05 | 442 | |
GregCr | 0:e6ceb13d2d05 | 443 | /*! |
GregCr | 0:e6ceb13d2d05 | 444 | * @brief DIO 3 IRQ callback |
GregCr | 0:e6ceb13d2d05 | 445 | */ |
GregCr | 0:e6ceb13d2d05 | 446 | virtual void OnDio3Irq( void ); |
GregCr | 0:e6ceb13d2d05 | 447 | |
GregCr | 0:e6ceb13d2d05 | 448 | /*! |
GregCr | 0:e6ceb13d2d05 | 449 | * @brief DIO 4 IRQ callback |
GregCr | 0:e6ceb13d2d05 | 450 | */ |
GregCr | 0:e6ceb13d2d05 | 451 | virtual void OnDio4Irq( void ); |
GregCr | 0:e6ceb13d2d05 | 452 | |
GregCr | 0:e6ceb13d2d05 | 453 | /*! |
GregCr | 0:e6ceb13d2d05 | 454 | * @brief DIO 5 IRQ callback |
GregCr | 0:e6ceb13d2d05 | 455 | */ |
GregCr | 0:e6ceb13d2d05 | 456 | virtual void OnDio5Irq( void ); |
GregCr | 0:e6ceb13d2d05 | 457 | |
GregCr | 0:e6ceb13d2d05 | 458 | /*! |
GregCr | 0:e6ceb13d2d05 | 459 | * @brief Tx & Rx timeout timer callback |
GregCr | 0:e6ceb13d2d05 | 460 | */ |
GregCr | 0:e6ceb13d2d05 | 461 | virtual void OnTimeoutIrq( void ); |
GregCr | 0:e6ceb13d2d05 | 462 | |
GregCr | 0:e6ceb13d2d05 | 463 | /*! |
GregCr | 0:e6ceb13d2d05 | 464 | * Returns the known FSK bandwidth registers value |
GregCr | 0:e6ceb13d2d05 | 465 | * |
GregCr | 0:e6ceb13d2d05 | 466 | * \param [IN] bandwidth Bandwidth value in Hz |
GregCr | 0:e6ceb13d2d05 | 467 | * \retval regValue Bandwidth register value. |
GregCr | 0:e6ceb13d2d05 | 468 | */ |
GregCr | 0:e6ceb13d2d05 | 469 | static uint8_t GetFskBandwidthRegValue( uint32_t bandwidth ); |
GregCr | 0:e6ceb13d2d05 | 470 | }; |
GregCr | 0:e6ceb13d2d05 | 471 | |
GregCr | 0:e6ceb13d2d05 | 472 | #endif //__SX1276_H__ |
GregCr | 0:e6ceb13d2d05 | 473 |