Capstone
Library files for InAir9 module containing SX1272
Diff: sx1272/sx1272.cpp
- Revision:
- 7:b988b60083a1
- Parent:
- 0:45c4f0364ca4
--- a/sx1272/sx1272.cpp Wed Feb 17 09:17:18 2016 +0000
+++ b/sx1272/sx1272.cpp Mon Apr 24 09:26:08 2017 +0000
@@ -15,8 +15,8 @@
#include "sx1272.h"
const FskBandwidth_t SX1272::FskBandwidths[] =
-{
- { 2600 , 0x17 },
+{
+ { 2600 , 0x17 },
{ 3100 , 0x0F },
{ 3900 , 0x07 },
{ 5200 , 0x16 },
@@ -37,7 +37,7 @@
{ 166700, 0x11 },
{ 200000, 0x09 },
{ 250000, 0x01 },
- { 300000, 0x00 }, // Invalid Badwidth
+ { 300000, 0x00 }, // Invalid Bandwidth
};
@@ -52,12 +52,10 @@
isRadioActive( false )
{
wait_ms( 10 );
- this->rxTx = 0;
- this->rxBuffer = new uint8_t[RX_BUFFER_SIZE];
- currentOpMode = RF_OPMODE_STANDBY;
-
+ this->rxtxBuffer = new uint8_t[RX_BUFFER_SIZE];
+
this->RadioEvents = events;
-
+
this->dioIrq = new DioIrqHandler[6];
this->dioIrq[0] = &SX1272::OnDio0Irq;
@@ -66,13 +64,13 @@
this->dioIrq[3] = &SX1272::OnDio3Irq;
this->dioIrq[4] = &SX1272::OnDio4Irq;
this->dioIrq[5] = NULL;
-
+
this->settings.State = RF_IDLE;
}
SX1272::~SX1272( )
{
- delete this->rxBuffer;
+ delete this->rxtxBuffer;
delete this->dioIrq;
}
@@ -98,19 +96,19 @@
bool SX1272::IsChannelFree( RadioModems_t modem, uint32_t freq, int16_t rssiThresh )
{
int16_t rssi = 0;
-
+
SetModem( modem );
SetChannel( freq );
-
+
SetOpMode( RF_OPMODE_RECEIVER );
wait_ms( 1 );
-
+
rssi = GetRssi( modem );
-
+
Sleep( );
-
+
if( rssi > rssiThresh )
{
return false;
@@ -124,7 +122,7 @@
uint32_t rnd = 0;
/*
- * Radio setup for random number generation
+ * Radio setup for random number generation
*/
// Set LoRa modem ON
SetModem( MODEM_LORA );
@@ -198,7 +196,8 @@
this->settings.Fsk.IqInverted = iqInverted;
this->settings.Fsk.RxContinuous = rxContinuous;
this->settings.Fsk.PreambleLen = preambleLen;
-
+ this->settings.Fsk.RxSingleTimeout = symbTimeout * ( ( 1.0 / ( double )datarate ) * 8.0 ) * 1e3;
+
datarate = ( uint16_t )( ( double )XTAL_FREQ / ( double )datarate );
Write( REG_BITRATEMSB, ( uint8_t )( datarate >> 8 ) );
Write( REG_BITRATELSB, ( uint8_t )( datarate & 0xFF ) );
@@ -208,18 +207,23 @@
Write( REG_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
Write( REG_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
-
+
if( fixLen == 1 )
{
Write( REG_PAYLOADLENGTH, payloadLen );
}
-
+ else
+ {
+ Write( REG_PAYLOADLENGTH, 0xFF ); // Set payload length to the maximum
+ }
+
Write( REG_PACKETCONFIG1,
- ( Read( REG_PACKETCONFIG1 ) &
+ ( Read( REG_PACKETCONFIG1 ) &
RF_PACKETCONFIG1_CRC_MASK &
RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
( crcOn << 4 ) );
+ Write( REG_PACKETCONFIG2, ( Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
}
break;
case MODEM_LORA:
@@ -244,7 +248,7 @@
{
datarate = 6;
}
-
+
if( ( ( bandwidth == 0 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
( ( bandwidth == 1 ) && ( datarate == 12 ) ) )
{
@@ -255,14 +259,14 @@
this->settings.LoRa.LowDatarateOptimize = 0x00;
}
- Write( REG_LR_MODEMCONFIG1,
+ Write( REG_LR_MODEMCONFIG1,
( Read( REG_LR_MODEMCONFIG1 ) &
RFLR_MODEMCONFIG1_BW_MASK &
RFLR_MODEMCONFIG1_CODINGRATE_MASK &
RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK &
RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK &
RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK ) |
- ( bandwidth << 6 ) | ( coderate << 3 ) |
+ ( bandwidth << 6 ) | ( coderate << 3 ) |
( fixLen << 2 ) | ( crcOn << 1 ) |
this->settings.LoRa.LowDatarateOptimize );
@@ -274,7 +278,7 @@
( ( symbTimeout >> 8 ) & ~RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) );
Write( REG_LR_SYMBTIMEOUTLSB, ( uint8_t )( symbTimeout & 0xFF ) );
-
+
Write( REG_LR_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
Write( REG_LR_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
@@ -291,11 +295,11 @@
if( datarate == 6 )
{
- Write( REG_LR_DETECTOPTIMIZE,
+ Write( REG_LR_DETECTOPTIMIZE,
( Read( REG_LR_DETECTOPTIMIZE ) &
RFLR_DETECTIONOPTIMIZE_MASK ) |
RFLR_DETECTIONOPTIMIZE_SF6 );
- Write( REG_LR_DETECTIONTHRESHOLD,
+ Write( REG_LR_DETECTIONTHRESHOLD,
RFLR_DETECTIONTHRESH_SF6 );
}
else
@@ -304,119 +308,23 @@
( Read( REG_LR_DETECTOPTIMIZE ) &
RFLR_DETECTIONOPTIMIZE_MASK ) |
RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
- Write( REG_LR_DETECTIONTHRESHOLD,
+ Write( REG_LR_DETECTIONTHRESHOLD,
RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
}
}
break;
}
}
-#if defined ( TARGET_MOTE_L152RC )
-/* PD_2=0 PD_2=1
-op PaB rfo rfo
-0 4.6 18.5 27.0
-1 5.6 21.1 28.1
-2 6.7 23.3 29.1
-3 7.7 25.3 30.1
-4 8.8 26.2 30.7
-5 9.8 27.3 31.2
-6 10.7 28.1 31.6
-7 11.7 28.6 32.2
-8 12.8 29.2 32.4
-9 13.7 29.9 32.9
-10 14.7 30.5 33.1
-11 15.6 30.8 33.4
-12 16.4 30.9 33.6
-13 17.1 31.0 33.7
-14 17.8 31.1 33.7
-15 18.4 31.1 33.7
-*/
-// txpow: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
-static const uint8_t PaBTable[20] = { 0, 0, 0, 0, 0, 1, 2, 3, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15 };
-// txpow: 20 21 22 23 24 25 26 27 28 29 30
-static const uint8_t RfoTable[11] = { 1, 1, 1, 2, 2, 3, 4, 5, 6, 8, 9 };
-#endif
-
-void SX1272::SetTxConfig( RadioModems_t modem, int8_t power, uint32_t fdev,
+void SX1272::SetTxConfig( RadioModems_t modem, int8_t power, uint32_t fdev,
uint32_t bandwidth, uint32_t datarate,
uint8_t coderate, uint16_t preambleLen,
- bool fixLen, bool crcOn, bool freqHopOn,
+ bool fixLen, bool crcOn, bool freqHopOn,
uint8_t hopPeriod, bool iqInverted, uint32_t timeout )
{
- uint8_t paConfig = 0;
- uint8_t paDac = 0;
-
SetModem( modem );
-
- paConfig = Read( REG_PACONFIG );
- paDac = Read( REG_PADAC );
-
-#if defined ( TARGET_MOTE_L152RC )
- if( power > 19 )
- {
- paConfig = ( paConfig & RF_PACONFIG_PASELECT_MASK ) | RF_PACONFIG_PASELECT_RFO;
- paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | RfoTable[power - 20];
- }
- else
- {
- paConfig = ( paConfig & RF_PACONFIG_PASELECT_MASK ) | RF_PACONFIG_PASELECT_PABOOST;
- paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | PaBTable[power];
- }
-#else
- paConfig = ( paConfig & RF_PACONFIG_PASELECT_MASK ) | GetPaSelect( this->settings.Channel );
- if( ( paConfig & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST )
- {
- if( power > 17 )
- {
- paDac = ( paDac & RF_PADAC_20DBM_MASK ) | RF_PADAC_20DBM_ON;
- }
- else
- {
- paDac = ( paDac & RF_PADAC_20DBM_MASK ) | RF_PADAC_20DBM_OFF;
- }
- if( ( paDac & RF_PADAC_20DBM_ON ) == RF_PADAC_20DBM_ON )
- {
- if( power < 5 )
- {
- power = 5;
- }
- if( power > 20 )
- {
- power = 20;
- }
- paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 5 ) & 0x0F );
- }
- else
- {
- if( power < 2 )
- {
- power = 2;
- }
- if( power > 17 )
- {
- power = 17;
- }
- paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 2 ) & 0x0F );
- }
- }
- else
- {
- if( power < -1 )
- {
- power = -1;
- }
- if( power > 14 )
- {
- power = 14;
- }
- paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power + 1 ) & 0x0F );
- }
-#endif
-
- Write( REG_PACONFIG, paConfig );
- Write( REG_PADAC, paDac );
+ SetRfTxPower( power );
switch( modem )
{
@@ -431,7 +339,7 @@
this->settings.Fsk.CrcOn = crcOn;
this->settings.Fsk.IqInverted = iqInverted;
this->settings.Fsk.TxTimeout = timeout;
-
+
fdev = ( uint16_t )( ( double )fdev / ( double )FREQ_STEP );
Write( REG_FDEVMSB, ( uint8_t )( fdev >> 8 ) );
Write( REG_FDEVLSB, ( uint8_t )( fdev & 0xFF ) );
@@ -444,12 +352,12 @@
Write( REG_PREAMBLELSB, preambleLen & 0xFF );
Write( REG_PACKETCONFIG1,
- ( Read( REG_PACKETCONFIG1 ) &
+ ( Read( REG_PACKETCONFIG1 ) &
RF_PACKETCONFIG1_CRC_MASK &
RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
( crcOn << 4 ) );
-
+ Write( REG_PACKETCONFIG2, ( Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
}
break;
case MODEM_LORA:
@@ -490,14 +398,14 @@
Write( REG_LR_HOPPERIOD, this->settings.LoRa.HopPeriod );
}
- Write( REG_LR_MODEMCONFIG1,
+ Write( REG_LR_MODEMCONFIG1,
( Read( REG_LR_MODEMCONFIG1 ) &
RFLR_MODEMCONFIG1_BW_MASK &
RFLR_MODEMCONFIG1_CODINGRATE_MASK &
RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK &
RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK &
RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK ) |
- ( bandwidth << 6 ) | ( coderate << 3 ) |
+ ( bandwidth << 6 ) | ( coderate << 3 ) |
( fixLen << 2 ) | ( crcOn << 1 ) |
this->settings.LoRa.LowDatarateOptimize );
@@ -506,17 +414,17 @@
RFLR_MODEMCONFIG2_SF_MASK ) |
( datarate << 4 ) );
-
+
Write( REG_LR_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
Write( REG_LR_PREAMBLELSB, preambleLen & 0xFF );
-
+
if( datarate == 6 )
{
- Write( REG_LR_DETECTOPTIMIZE,
+ Write( REG_LR_DETECTOPTIMIZE,
( Read( REG_LR_DETECTOPTIMIZE ) &
RFLR_DETECTIONOPTIMIZE_MASK ) |
RFLR_DETECTIONOPTIMIZE_SF6 );
- Write( REG_LR_DETECTIONTHRESHOLD,
+ Write( REG_LR_DETECTIONTHRESHOLD,
RFLR_DETECTIONTHRESH_SF6 );
}
else
@@ -525,7 +433,7 @@
( Read( REG_LR_DETECTOPTIMIZE ) &
RFLR_DETECTIONOPTIMIZE_MASK ) |
RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
- Write( REG_LR_DETECTIONTHRESHOLD,
+ Write( REG_LR_DETECTIONTHRESHOLD,
RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
}
}
@@ -533,7 +441,7 @@
}
}
-double SX1272::TimeOnAir( RadioModems_t modem, uint8_t pktLen )
+uint32_t SX1272::TimeOnAir( RadioModems_t modem, uint8_t pktLen )
{
uint32_t airTime = 0;
@@ -547,7 +455,7 @@
( ( ( Read( REG_PACKETCONFIG1 ) & ~RF_PACKETCONFIG1_ADDRSFILTERING_MASK ) != 0x00 ) ? 1.0 : 0 ) +
pktLen +
( ( this->settings.Fsk.CrcOn == 0x01 ) ? 2.0 : 0 ) ) /
- this->settings.Fsk.Datarate ) * 1e6 );
+ this->settings.Fsk.Datarate ) * 1e3 );
}
break;
case MODEM_LORA:
@@ -575,15 +483,15 @@
double tmp = ceil( ( 8 * pktLen - 4 * this->settings.LoRa.Datarate +
28 + 16 * this->settings.LoRa.CrcOn -
( this->settings.LoRa.FixLen ? 20 : 0 ) ) /
- ( double )( 4 * this->settings.LoRa.Datarate -
- ( ( this->settings.LoRa.LowDatarateOptimize > 0 ) ? 2 : 0 ) ) ) *
+ ( double )( 4 * ( this->settings.LoRa.Datarate -
+ ( ( this->settings.LoRa.LowDatarateOptimize > 0 ) ? 2 : 0 ) ) ) ) *
( this->settings.LoRa.Coderate + 4 );
double nPayload = 8 + ( ( tmp > 0 ) ? tmp : 0 );
double tPayload = nPayload * ts;
- // Time on air
+ // Time on air
double tOnAir = tPreamble + tPayload;
- // return us secs
- airTime = floor( tOnAir * 1e6 + 0.999 );
+ // return ms secs
+ airTime = floor( tOnAir * 1e3 + 0.999 );
}
break;
}
@@ -608,14 +516,15 @@
else
{
Write( REG_PAYLOADLENGTH, size );
- }
-
+ }
+
if( ( size > 0 ) && ( size <= 64 ) )
{
this->settings.FskPacketHandler.ChunkSize = size;
}
else
{
+ memcpy( rxtxBuffer, buffer, size );
this->settings.FskPacketHandler.ChunkSize = 32;
}
@@ -636,14 +545,14 @@
{
Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
- }
-
+ }
+
this->settings.LoRaPacketHandler.Size = size;
// Initializes the payload size
Write( REG_LR_PAYLOADLENGTH, size );
- // Full buffer used for Tx
+ // Full buffer used for Tx
Write( REG_LR_FIFOTXBASEADDR, 0 );
Write( REG_LR_FIFOADDRPTR, 0 );
@@ -665,7 +574,7 @@
void SX1272::Sleep( void )
{
- txTimeoutTimer.detach( );
+ txTimeoutTimer.detach( );
rxTimeoutTimer.detach( );
SetOpMode( RF_OPMODE_SLEEP );
@@ -674,7 +583,7 @@
void SX1272::Standby( void )
{
- txTimeoutTimer.detach( );
+ txTimeoutTimer.detach( );
rxTimeoutTimer.detach( );
SetOpMode( RF_OPMODE_STANDBY );
@@ -684,13 +593,13 @@
void SX1272::Rx( uint32_t timeout )
{
bool rxContinuous = false;
-
+
switch( this->settings.Modem )
{
case MODEM_FSK:
{
rxContinuous = this->settings.Fsk.RxContinuous;
-
+
// DIO0=PayloadReady
// DIO1=FifoLevel
// DIO2=SyncAddr
@@ -698,17 +607,21 @@
// DIO4=Preamble
// DIO5=ModeReady
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
+ RF_DIOMAPPING1_DIO1_MASK &
RF_DIOMAPPING1_DIO2_MASK ) |
RF_DIOMAPPING1_DIO0_00 |
+ RF_DIOMAPPING1_DIO1_00 |
RF_DIOMAPPING1_DIO2_11 );
-
+
Write( REG_DIOMAPPING2, ( Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
- RF_DIOMAPPING2_MAP_MASK ) |
+ RF_DIOMAPPING2_MAP_MASK ) |
RF_DIOMAPPING2_DIO4_11 |
RF_DIOMAPPING2_MAP_PREAMBLEDETECT );
-
+
this->settings.FskPacketHandler.FifoThresh = Read( REG_FIFOTHRESH ) & 0x3F;
-
+
+ Write( REG_RXCONFIG, RF_RXCONFIG_AFCAUTO_ON | RF_RXCONFIG_AGCAUTO_ON | RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT );
+
this->settings.FskPacketHandler.PreambleDetected = false;
this->settings.FskPacketHandler.SyncWordDetected = false;
this->settings.FskPacketHandler.NbBytes = 0;
@@ -726,10 +639,10 @@
{
Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
- }
-
+ }
+
rxContinuous = this->settings.LoRa.RxContinuous;
-
+
if( this->settings.LoRa.FreqHopOn == true )
{
Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
@@ -740,7 +653,7 @@
RFLR_IRQFLAGS_CADDONE |
//RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
RFLR_IRQFLAGS_CADDETECTED );
-
+
// DIO0=RxDone, DIO2=FhssChangeChannel
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_00 | RFLR_DIOMAPPING1_DIO2_00 );
}
@@ -754,7 +667,7 @@
RFLR_IRQFLAGS_CADDONE |
RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
RFLR_IRQFLAGS_CADDETECTED );
-
+
// DIO0=RxDone
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_00 );
}
@@ -764,25 +677,22 @@
break;
}
- memset( rxBuffer, 0, ( size_t )RX_BUFFER_SIZE );
+ memset( rxtxBuffer, 0, ( size_t )RX_BUFFER_SIZE );
this->settings.State = RF_RX_RUNNING;
if( timeout != 0 )
{
- rxTimeoutTimer.attach_us( this, &SX1272::OnTimeoutIrq, timeout );
+ rxTimeoutTimer.attach_us( mbed::callback( this, &SX1272::OnTimeoutIrq ), timeout * 1e3 );
}
if( this->settings.Modem == MODEM_FSK )
{
SetOpMode( RF_OPMODE_RECEIVER );
-
+
if( rxContinuous == false )
{
- rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ( 8.0 * ( this->settings.Fsk.PreambleLen +
- ( ( Read( REG_SYNCCONFIG ) &
- ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
- 1.0 ) + 10.0 ) /
- ( double )this->settings.Fsk.Datarate ) * 1e6 );
+ rxTimeoutSyncWord.attach_us( mbed::callback( this, &SX1272::OnTimeoutIrq ),
+ this->settings.Fsk.RxSingleTimeout * 1e3 );
}
}
else
@@ -806,13 +716,15 @@
case MODEM_FSK:
{
// DIO0=PacketSent
- // DIO1=FifoLevel
+ // DIO1=FifoEmpty
// DIO2=FifoFull
// DIO3=FifoEmpty
// DIO4=LowBat
// DIO5=ModeReady
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
- RF_DIOMAPPING1_DIO2_MASK ) );
+ RF_DIOMAPPING1_DIO1_MASK &
+ RF_DIOMAPPING1_DIO2_MASK ) |
+ RF_DIOMAPPING1_DIO1_01 );
Write( REG_DIOMAPPING2, ( Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
RF_DIOMAPPING2_MAP_MASK ) );
@@ -831,7 +743,7 @@
RFLR_IRQFLAGS_CADDONE |
//RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
RFLR_IRQFLAGS_CADDETECTED );
-
+
// DIO0=TxDone, DIO2=FhssChangeChannel
Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_01 | RFLR_DIOMAPPING1_DIO2_00 );
}
@@ -854,7 +766,7 @@
}
this->settings.State = RF_TX_RUNNING;
- txTimeoutTimer.attach_us( this, &SX1272::OnTimeoutIrq, timeout );
+ txTimeoutTimer.attach_us( mbed::callback( this, &SX1272::OnTimeoutIrq ), timeout * 1e3 );
SetOpMode( RF_OPMODE_TRANSMITTER );
}
@@ -864,7 +776,7 @@
{
case MODEM_FSK:
{
-
+
}
break;
case MODEM_LORA:
@@ -876,12 +788,12 @@
RFLR_IRQFLAGS_TXDONE |
//RFLR_IRQFLAGS_CADDONE |
RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL // |
- //RFLR_IRQFLAGS_CADDETECTED
+ //RFLR_IRQFLAGS_CADDETECTED
);
-
+
// DIO3=CADDone
- Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_00 );
-
+ Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO3_MASK ) | RFLR_DIOMAPPING1_DIO3_00 );
+
this->settings.State = RF_CAD;
SetOpMode( RFLR_OPMODE_CAD );
}
@@ -891,6 +803,24 @@
}
}
+void SX1272::SetTxContinuousWave( uint32_t freq, int8_t power, uint16_t time )
+{
+ uint32_t timeout = ( uint32_t )( time * 1e6 );
+
+ SetChannel( freq );
+
+ SetTxConfig( MODEM_FSK, power, 0, 0, 4800, 0, 5, false, false, 0, 0, 0, timeout );
+
+ Write( REG_PACKETCONFIG2, ( Read( REG_PACKETCONFIG2 ) & RF_PACKETCONFIG2_DATAMODE_MASK ) );
+ // Disable radio interrupts
+ Write( REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_11 | RF_DIOMAPPING1_DIO1_11 );
+ Write( REG_DIOMAPPING2, RF_DIOMAPPING2_DIO4_10 | RF_DIOMAPPING2_DIO5_10 );
+
+ this->settings.State = RF_TX_RUNNING;
+ txTimeoutTimer.attach_us( mbed::callback( this, &SX1272::OnTimeoutIrq ), timeout );
+ SetOpMode( RF_OPMODE_TRANSMITTER );
+}
+
int16_t SX1272::GetRssi( RadioModems_t modem )
{
int16_t rssi = 0;
@@ -912,31 +842,29 @@
void SX1272::SetOpMode( uint8_t opMode )
{
- if( opMode != currentOpMode )
+ if( opMode == RF_OPMODE_SLEEP )
{
- currentOpMode = opMode;
- if( opMode == RF_OPMODE_SLEEP )
- {
- SetAntSwLowPower( true );
- }
- else
- {
- SetAntSwLowPower( false );
- if( opMode == RF_OPMODE_TRANSMITTER )
- {
- SetAntSw( 1 );
- }
- else
- {
- SetAntSw( 0 );
- }
- }
- Write( REG_OPMODE, ( Read( REG_OPMODE ) & RF_OPMODE_MASK ) | opMode );
+ SetAntSwLowPower( true );
}
+ else
+ {
+ SetAntSwLowPower( false );
+ SetAntSw( opMode );
+ }
+ Write( REG_OPMODE, ( Read( REG_OPMODE ) & RF_OPMODE_MASK ) | opMode );
}
void SX1272::SetModem( RadioModems_t modem )
{
+ if( ( Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_ON ) != 0 )
+ {
+ this->settings.Modem = MODEM_LORA;
+ }
+ else
+ {
+ this->settings.Modem = MODEM_FSK;
+ }
+
if( this->settings.Modem == modem )
{
return;
@@ -947,14 +875,14 @@
{
default:
case MODEM_FSK:
- SetOpMode( RF_OPMODE_SLEEP );
+ Sleep( );
Write( REG_OPMODE, ( Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_OFF );
-
+
Write( REG_DIOMAPPING1, 0x00 );
Write( REG_DIOMAPPING2, 0x30 ); // DIO5=ModeReady
break;
case MODEM_LORA:
- SetOpMode( RF_OPMODE_SLEEP );
+ Sleep( );
Write( REG_OPMODE, ( Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_ON );
Write( REG_DIOMAPPING1, 0x00 );
@@ -981,6 +909,22 @@
}
}
+void SX1272::SetPublicNetwork( bool enable )
+{
+ SetModem( MODEM_LORA );
+ this->settings.LoRa.PublicNetwork = enable;
+ if( enable == true )
+ {
+ // Change LoRa modem SyncWord
+ Write( REG_LR_SYNCWORD, LORA_MAC_PUBLIC_SYNCWORD );
+ }
+ else
+ {
+ // Change LoRa modem SyncWord
+ Write( REG_LR_SYNCWORD, LORA_MAC_PRIVATE_SYNCWORD );
+ }
+}
+
void SX1272::OnTimeoutIrq( void )
{
switch( this->settings.State )
@@ -994,7 +938,7 @@
this->settings.FskPacketHandler.Size = 0;
// Clear Irqs
- Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
+ Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
RF_IRQFLAGS1_PREAMBLEDETECT |
RF_IRQFLAGS1_SYNCADDRESSMATCH );
Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
@@ -1003,6 +947,8 @@
{
// Continuous mode restart Rx chain
Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
+ rxTimeoutSyncWord.attach_us( mbed::callback( this, &SX1272::OnTimeoutIrq ),
+ this->settings.Fsk.RxSingleTimeout * 1e3 );
}
else
{
@@ -1016,6 +962,28 @@
}
break;
case RF_TX_RUNNING:
+ // Tx timeout shouldn't happen.
+ // But it has been observed that when it happens it is a result of a corrupted SPI transfer
+ // it depends on the platform design.
+ //
+ // The workaround is to put the radio in a known state. Thus, we re-initialize it.
+
+ // BEGIN WORKAROUND
+
+ // Reset the radio
+ Reset( );
+
+ // Initialize radio default values
+ SetOpMode( RF_OPMODE_SLEEP );
+
+ RadioRegistersInit( );
+
+ SetModem( MODEM_FSK );
+
+ // Restore previous network type setting.
+ SetPublicNetwork( this->settings.LoRa.PublicNetwork );
+ // END WORKAROUND
+
this->settings.State = RF_IDLE;
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->TxTimeout != NULL ) )
{
@@ -1032,7 +1000,7 @@
volatile uint8_t irqFlags = 0;
switch( this->settings.State )
- {
+ {
case RF_RX_RUNNING:
//TimerStop( &RxTimeoutTimer );
// RxDone interrupt
@@ -1045,27 +1013,26 @@
if( ( irqFlags & RF_IRQFLAGS2_CRCOK ) != RF_IRQFLAGS2_CRCOK )
{
// Clear Irqs
- Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
+ Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
RF_IRQFLAGS1_PREAMBLEDETECT |
RF_IRQFLAGS1_SYNCADDRESSMATCH );
Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
-
+
+ rxTimeoutTimer.detach( );
+
if( this->settings.Fsk.RxContinuous == false )
{
+ rxTimeoutSyncWord.detach( );
this->settings.State = RF_IDLE;
- rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ( 8.0 * ( this->settings.Fsk.PreambleLen +
- ( ( Read( REG_SYNCCONFIG ) &
- ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
- 1.0 ) + 10.0 ) /
- ( double )this->settings.Fsk.Datarate ) * 1e6 ) ;
}
else
{
// Continuous mode restart Rx chain
Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
+ rxTimeoutSyncWord.attach_us( mbed::callback( this, &SX1272::OnTimeoutIrq ),
+ this->settings.Fsk.RxSingleTimeout * 1e3 );
}
- rxTimeoutTimer.detach( );
-
+
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxError != NULL ) )
{
this->RadioEvents->RxError( );
@@ -1089,35 +1056,34 @@
{
this->settings.FskPacketHandler.Size = Read( REG_PAYLOADLENGTH );
}
- ReadFifo( rxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
+ ReadFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
}
else
{
- ReadFifo( rxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
+ ReadFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
}
+ rxTimeoutTimer.detach( );
+
if( this->settings.Fsk.RxContinuous == false )
{
this->settings.State = RF_IDLE;
- rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq, ( 8.0 * ( this->settings.Fsk.PreambleLen +
- ( ( Read( REG_SYNCCONFIG ) &
- ~RF_SYNCCONFIG_SYNCSIZE_MASK ) +
- 1.0 ) + 10.0 ) /
- ( double )this->settings.Fsk.Datarate ) * 1e6 ) ;
+ rxTimeoutSyncWord.detach( );
}
else
{
// Continuous mode restart Rx chain
Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
+ rxTimeoutSyncWord.attach_us( mbed::callback( this, &SX1272::OnTimeoutIrq ),
+ this->settings.Fsk.RxSingleTimeout * 1e3 );
}
- rxTimeoutTimer.detach( );
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxDone != NULL ) )
{
- this->RadioEvents->RxDone( rxBuffer, this->settings.FskPacketHandler.Size, this->settings.FskPacketHandler.RssiValue, 0 );
- }
+ this->RadioEvents->RxDone( rxtxBuffer, this->settings.FskPacketHandler.Size, this->settings.FskPacketHandler.RssiValue, 0 );
+ }
this->settings.FskPacketHandler.PreambleDetected = false;
this->settings.FskPacketHandler.SyncWordDetected = false;
this->settings.FskPacketHandler.NbBytes = 0;
@@ -1169,13 +1135,13 @@
snr;
}
else
- {
+ {
this->settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET + rssi + ( rssi >> 4 );
}
this->settings.LoRaPacketHandler.Size = Read( REG_LR_RXNBBYTES );
- ReadFifo( rxBuffer, this->settings.LoRaPacketHandler.Size );
-
+ ReadFifo( rxtxBuffer, this->settings.LoRaPacketHandler.Size );
+
if( this->settings.LoRa.RxContinuous == false )
{
this->settings.State = RF_IDLE;
@@ -1184,7 +1150,7 @@
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxDone != NULL ) )
{
- this->RadioEvents->RxDone( rxBuffer, this->settings.LoRaPacketHandler.Size, this->settings.LoRaPacketHandler.RssiValue, this->settings.LoRaPacketHandler.SnrValue );
+ this->RadioEvents->RxDone( rxtxBuffer, this->settings.LoRaPacketHandler.Size, this->settings.LoRaPacketHandler.RssiValue, this->settings.LoRaPacketHandler.SnrValue );
}
}
break;
@@ -1193,7 +1159,7 @@
}
break;
case RF_TX_RUNNING:
- txTimeoutTimer.detach( );
+ txTimeoutTimer.detach( );
// TxDone interrupt
switch( this->settings.Modem )
{
@@ -1207,7 +1173,7 @@
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->TxDone != NULL ) )
{
this->RadioEvents->TxDone( );
- }
+ }
break;
}
break;
@@ -1219,7 +1185,7 @@
void SX1272::OnDio1Irq( void )
{
switch( this->settings.State )
- {
+ {
case RF_RX_RUNNING:
switch( this->settings.Modem )
{
@@ -1240,18 +1206,21 @@
if( ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes ) > this->settings.FskPacketHandler.FifoThresh )
{
- ReadFifo( ( rxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.FifoThresh );
+ ReadFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.FifoThresh );
this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.FifoThresh;
}
else
{
- ReadFifo( ( rxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
+ ReadFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
}
break;
case MODEM_LORA:
// Sync time out
rxTimeoutTimer.detach( );
+ // Clear Irq
+ Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXTIMEOUT );
+
this->settings.State = RF_IDLE;
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxTimeout != NULL ) )
{
@@ -1266,16 +1235,16 @@
switch( this->settings.Modem )
{
case MODEM_FSK:
- // FifoLevel interrupt
+ // FifoEmpty interrupt
if( ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes ) > this->settings.FskPacketHandler.ChunkSize )
{
- WriteFifo( ( rxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.ChunkSize );
+ WriteFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.ChunkSize );
this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.ChunkSize;
}
- else
+ else
{
// Write the last chunk of data
- WriteFifo( rxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
+ WriteFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes;
}
break;
@@ -1293,17 +1262,23 @@
void SX1272::OnDio2Irq( void )
{
switch( this->settings.State )
- {
+ {
case RF_RX_RUNNING:
switch( this->settings.Modem )
{
case MODEM_FSK:
+ // Checks if DIO4 is connected. If it is not PreambleDtected is set to true.
+ if( this->dioIrq[4] == NULL )
+ {
+ this->settings.FskPacketHandler.PreambleDetected = true;
+ }
+
if( ( this->settings.FskPacketHandler.PreambleDetected == true ) && ( this->settings.FskPacketHandler.SyncWordDetected == false ) )
{
rxTimeoutSyncWord.detach( );
-
+
this->settings.FskPacketHandler.SyncWordDetected = true;
-
+
this->settings.FskPacketHandler.RssiValue = -( Read( REG_RSSIVALUE ) >> 1 );
this->settings.FskPacketHandler.AfcValue = ( int32_t )( double )( ( ( uint16_t )Read( REG_AFCMSB ) << 8 ) |
@@ -1317,7 +1292,7 @@
{
// Clear Irq
Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
-
+
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->FhssChangeChannel != NULL ) )
{
this->RadioEvents->FhssChangeChannel( ( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
@@ -1338,7 +1313,7 @@
{
// Clear Irq
Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
-
+
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->FhssChangeChannel != NULL ) )
{
this->RadioEvents->FhssChangeChannel( ( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
@@ -1371,7 +1346,7 @@
}
}
else
- {
+ {
// Clear Irq
Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDONE );
if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->CadDone != NULL ) )
@@ -1394,7 +1369,7 @@
if( this->settings.FskPacketHandler.PreambleDetected == false )
{
this->settings.FskPacketHandler.PreambleDetected = true;
- }
+ }
}
break;
case MODEM_LORA: