CRAC Team / CRAC-Strat_2017_homologation_gros_rob_testAck

homologation gros robot et test avec les ack de la carte a tout faire

Fork of CRAC-Strat_2017_HOMOLOGATION_PETIT_ROBOT by CRAC Team

mbed/LPC1768/system_LPC17xx.h@21:7c60d6dfcab5, 2017-05-25 (annotated)

Committer:
ClementBreteau
Date:
Thu May 25 06:36:48 2017 +0000
Revision:
21:7c60d6dfcab5
Parent:
0:ad97421fb1fb 
homologation gros robot avec test au niveau des ack

Who changed what in which revision?

UserRevisionLine numberNew contents of line
antbig 0:ad97421fb1fb 1 /******************************************************************************
antbig 0:ad97421fb1fb 2 * @file: system_LPC17xx.h
antbig 0:ad97421fb1fb 3 * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File
antbig 0:ad97421fb1fb 4 * for the NXP LPC17xx Device Series
antbig 0:ad97421fb1fb 5 * @version: V1.02
antbig 0:ad97421fb1fb 6 * @date: 27. July 2009
antbig 0:ad97421fb1fb 7 *----------------------------------------------------------------------------
antbig 0:ad97421fb1fb 8 *
antbig 0:ad97421fb1fb 9 * Copyright (C) 2009 ARM Limited. All rights reserved.
antbig 0:ad97421fb1fb 10 *
antbig 0:ad97421fb1fb 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M3
antbig 0:ad97421fb1fb 12 * processor based microcontrollers. This file can be freely distributed
antbig 0:ad97421fb1fb 13 * within development tools that are supporting such ARM based processors.
antbig 0:ad97421fb1fb 14 *
antbig 0:ad97421fb1fb 15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
antbig 0:ad97421fb1fb 16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
antbig 0:ad97421fb1fb 17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
antbig 0:ad97421fb1fb 18 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
antbig 0:ad97421fb1fb 19 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
antbig 0:ad97421fb1fb 20 *
antbig 0:ad97421fb1fb 21 ******************************************************************************/
antbig 0:ad97421fb1fb 22
antbig 0:ad97421fb1fb 23
antbig 0:ad97421fb1fb 24 #ifndef __SYSTEM_LPC17xx_H
antbig 0:ad97421fb1fb 25 #define __SYSTEM_LPC17xx_H
antbig 0:ad97421fb1fb 26
antbig 0:ad97421fb1fb 27 #ifdef __cplusplus
antbig 0:ad97421fb1fb 28 extern "C" {
antbig 0:ad97421fb1fb 29 #endif
antbig 0:ad97421fb1fb 30
antbig 0:ad97421fb1fb 31 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
antbig 0:ad97421fb1fb 32
antbig 0:ad97421fb1fb 33
antbig 0:ad97421fb1fb 34 /**
antbig 0:ad97421fb1fb 35 * Initialize the system
antbig 0:ad97421fb1fb 36 *
antbig 0:ad97421fb1fb 37 * @param none
antbig 0:ad97421fb1fb 38 * @return none
antbig 0:ad97421fb1fb 39 *
antbig 0:ad97421fb1fb 40 * @brief Setup the microcontroller system.
antbig 0:ad97421fb1fb 41 * Initialize the System and update the SystemCoreClock variable.
antbig 0:ad97421fb1fb 42 */
antbig 0:ad97421fb1fb 43 extern void SystemInit (void);
antbig 0:ad97421fb1fb 44
antbig 0:ad97421fb1fb 45 /**
antbig 0:ad97421fb1fb 46 * Update SystemCoreClock variable
antbig 0:ad97421fb1fb 47 *
antbig 0:ad97421fb1fb 48 * @param none
antbig 0:ad97421fb1fb 49 * @return none
antbig 0:ad97421fb1fb 50 *
antbig 0:ad97421fb1fb 51 * @brief Updates the SystemCoreClock with current core Clock
antbig 0:ad97421fb1fb 52 * retrieved from cpu registers.
antbig 0:ad97421fb1fb 53 */
antbig 0:ad97421fb1fb 54 extern void SystemCoreClockUpdate (void);
antbig 0:ad97421fb1fb 55
antbig 0:ad97421fb1fb 56 #ifdef __cplusplus
antbig 0:ad97421fb1fb 57 }
antbig 0:ad97421fb1fb 58 #endif
antbig 0:ad97421fb1fb 59
antbig 0:ad97421fb1fb 60 #endif /* __SYSTEM_LPC17xx_H */